| T75 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_pin_retention.109118070 |
|
|
Sep 12 12:52:27 AM UTC 24 |
Sep 12 12:57:49 AM UTC 24 |
4446762788 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pattgen_ios.1806855659 |
|
|
Sep 12 12:52:33 AM UTC 24 |
Sep 12 12:58:04 AM UTC 24 |
3199301034 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_data_integrity_escalation.3698730330 |
|
|
Sep 12 12:51:01 AM UTC 24 |
Sep 12 01:02:40 AM UTC 24 |
6159082326 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2940712139 |
|
|
Sep 12 12:55:12 AM UTC 24 |
Sep 12 01:02:43 AM UTC 24 |
3914456476 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.3367538440 |
|
|
Sep 12 12:57:56 AM UTC 24 |
Sep 12 01:02:53 AM UTC 24 |
3893631063 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_tpm.3760659591 |
|
|
Sep 12 12:57:09 AM UTC 24 |
Sep 12 01:03:03 AM UTC 24 |
3352338473 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_all_escalation_resets.3513829292 |
|
|
Sep 12 12:51:00 AM UTC 24 |
Sep 12 01:03:36 AM UTC 24 |
5676276020 ps |
| T47 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_host_tx_rx.105629256 |
|
|
Sep 12 12:57:56 AM UTC 24 |
Sep 12 01:03:50 AM UTC 24 |
2713604570 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_jtag_csr_rw.4279136355 |
|
|
Sep 12 12:27:16 AM UTC 24 |
Sep 12 01:03:51 AM UTC 24 |
18758080728 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1000419530 |
|
|
Sep 12 12:54:36 AM UTC 24 |
Sep 12 01:03:54 AM UTC 24 |
4440978102 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.1426235169 |
|
|
Sep 12 12:51:04 AM UTC 24 |
Sep 12 01:03:55 AM UTC 24 |
6336868792 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx.3696452004 |
|
|
Sep 12 12:53:22 AM UTC 24 |
Sep 12 01:04:29 AM UTC 24 |
4483075384 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx2.3242298028 |
|
|
Sep 12 12:54:00 AM UTC 24 |
Sep 12 01:04:36 AM UTC 24 |
4189402560 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx1.2008436762 |
|
|
Sep 12 12:53:19 AM UTC 24 |
Sep 12 01:04:59 AM UTC 24 |
3949250292 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_tx_rx_idx3.3605106481 |
|
|
Sep 12 12:54:04 AM UTC 24 |
Sep 12 01:05:25 AM UTC 24 |
4407731876 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_power_virus.1277624754 |
|
|
Sep 12 12:40:21 AM UTC 24 |
Sep 12 01:06:08 AM UTC 24 |
5611739928 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_device_tx_rx.1154689662 |
|
|
Sep 12 12:56:50 AM UTC 24 |
Sep 12 01:06:18 AM UTC 24 |
4228230956 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_gpio.3396415709 |
|
|
Sep 12 12:58:41 AM UTC 24 |
Sep 12 01:06:29 AM UTC 24 |
4338277791 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx.2257884781 |
|
|
Sep 12 12:56:09 AM UTC 24 |
Sep 12 01:07:32 AM UTC 24 |
4846941392 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.3694892424 |
|
|
Sep 12 12:56:06 AM UTC 24 |
Sep 12 01:08:45 AM UTC 24 |
5130561744 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pass_through_collision.1951277000 |
|
|
Sep 12 12:58:28 AM UTC 24 |
Sep 12 01:08:48 AM UTC 24 |
3938591588 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3772373548 |
|
|
Sep 12 12:56:06 AM UTC 24 |
Sep 12 01:08:51 AM UTC 24 |
4470017476 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1280845617 |
|
|
Sep 12 01:07:11 AM UTC 24 |
Sep 12 01:09:03 AM UTC 24 |
1734389697 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_entropy.2351311800 |
|
|
Sep 12 01:05:19 AM UTC 24 |
Sep 12 01:09:22 AM UTC 24 |
2793193710 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_flash_init_reduced_freq.2764850657 |
|
|
Sep 12 12:36:02 AM UTC 24 |
Sep 12 01:09:31 AM UTC 24 |
25267918289 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_spi_device_pass_through.850863494 |
|
|
Sep 12 12:57:59 AM UTC 24 |
Sep 12 01:09:43 AM UTC 24 |
7132274690 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.958807520 |
|
|
Sep 12 01:05:19 AM UTC 24 |
Sep 12 01:09:50 AM UTC 24 |
2593051864 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.4056993852 |
|
|
Sep 11 11:58:18 PM UTC 24 |
Sep 12 01:10:15 AM UTC 24 |
17103929112 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1278139829 |
|
|
Sep 12 01:04:51 AM UTC 24 |
Sep 12 01:10:16 AM UTC 24 |
3315366206 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1450079891 |
|
|
Sep 11 11:58:18 PM UTC 24 |
Sep 12 01:10:29 AM UTC 24 |
18862407687 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2231955715 |
|
|
Sep 12 01:03:57 AM UTC 24 |
Sep 12 01:11:29 AM UTC 24 |
4786477436 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_pwm_pulses.2140250758 |
|
|
Sep 12 12:52:32 AM UTC 24 |
Sep 12 01:11:41 AM UTC 24 |
8493937000 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.3889554056 |
|
|
Sep 12 01:10:18 AM UTC 24 |
Sep 12 01:12:29 AM UTC 24 |
2770832885 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/0.rom_e2e_self_hash.40549759 |
|
|
Sep 11 11:10:20 PM UTC 24 |
Sep 12 01:12:31 AM UTC 24 |
26626933344 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1622816716 |
|
|
Sep 12 01:10:45 AM UTC 24 |
Sep 12 01:12:57 AM UTC 24 |
2367684189 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3645532970 |
|
|
Sep 12 01:03:50 AM UTC 24 |
Sep 12 01:13:28 AM UTC 24 |
4150874480 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.2614915694 |
|
|
Sep 12 01:08:10 AM UTC 24 |
Sep 12 01:13:42 AM UTC 24 |
2907480542 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2631480840 |
|
|
Sep 12 01:10:40 AM UTC 24 |
Sep 12 01:14:30 AM UTC 24 |
3865641755 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops.32996760 |
|
|
Sep 12 01:03:52 AM UTC 24 |
Sep 12 01:14:47 AM UTC 24 |
4650912000 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2148140775 |
|
|
Sep 12 01:05:38 AM UTC 24 |
Sep 12 01:14:48 AM UTC 24 |
4754212038 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_sw_rst.2559539365 |
|
|
Sep 12 01:11:10 AM UTC 24 |
Sep 12 01:15:09 AM UTC 24 |
2611177244 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_sw_req.1461989572 |
|
|
Sep 12 01:11:25 AM UTC 24 |
Sep 12 01:18:40 AM UTC 24 |
4603272516 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_transition.1104410072 |
|
|
Sep 12 01:08:40 AM UTC 24 |
Sep 12 01:19:39 AM UTC 24 |
6648919219 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.253849636 |
|
|
Sep 12 01:04:15 AM UTC 24 |
Sep 12 01:19:48 AM UTC 24 |
6156668759 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.2955186593 |
|
|
Sep 12 01:13:17 AM UTC 24 |
Sep 12 01:20:15 AM UTC 24 |
4962090424 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2136776304 |
|
|
Sep 12 01:12:19 AM UTC 24 |
Sep 12 01:20:34 AM UTC 24 |
9087284606 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_flash_rma_unlocked.3150557288 |
|
|
Sep 11 11:40:53 PM UTC 24 |
Sep 12 01:20:59 AM UTC 24 |
42985386404 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access.4018644478 |
|
|
Sep 12 01:03:56 AM UTC 24 |
Sep 12 01:21:24 AM UTC 24 |
5620575048 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2981061711 |
|
|
Sep 12 01:04:50 AM UTC 24 |
Sep 12 01:21:28 AM UTC 24 |
5406847681 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_rand_baudrate.3776610581 |
|
|
Sep 12 12:54:36 AM UTC 24 |
Sep 12 01:21:36 AM UTC 24 |
8369158380 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_keymgr_sideload_otbn.820254286 |
|
|
Sep 12 12:12:01 AM UTC 24 |
Sep 12 01:23:10 AM UTC 24 |
14632169800 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_prod.3021500738 |
|
|
Sep 11 11:44:14 PM UTC 24 |
Sep 12 01:23:28 AM UTC 24 |
47787579388 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_cpu_info.3862325474 |
|
|
Sep 12 01:12:14 AM UTC 24 |
Sep 12 01:23:55 AM UTC 24 |
5441161242 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_walkthrough_prodend.2327330983 |
|
|
Sep 12 01:10:02 AM UTC 24 |
Sep 12 01:25:04 AM UTC 24 |
9432404550 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_ast_clk_rst_inputs.1479979216 |
|
|
Sep 12 12:39:27 AM UTC 24 |
Sep 12 01:25:39 AM UTC 24 |
18845770240 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3226424535 |
|
|
Sep 12 01:07:11 AM UTC 24 |
Sep 12 01:26:18 AM UTC 24 |
8270196190 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_timer_irq.1759673630 |
|
|
Sep 12 01:20:56 AM UTC 24 |
Sep 12 01:26:26 AM UTC 24 |
2737582872 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1247410463 |
|
|
Sep 12 01:21:35 AM UTC 24 |
Sep 12 01:26:32 AM UTC 24 |
3002588328 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3337998059 |
|
|
Sep 12 01:20:40 AM UTC 24 |
Sep 12 01:27:00 AM UTC 24 |
2879401480 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.337003670 |
|
|
Sep 12 01:06:04 AM UTC 24 |
Sep 12 01:27:29 AM UTC 24 |
7778649976 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.4081596319 |
|
|
Sep 12 01:19:20 AM UTC 24 |
Sep 12 01:27:39 AM UTC 24 |
5908443552 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3588128849 |
|
|
Sep 12 01:15:44 AM UTC 24 |
Sep 12 01:28:50 AM UTC 24 |
10217467800 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.3005060101 |
|
|
Sep 12 01:15:44 AM UTC 24 |
Sep 12 01:29:02 AM UTC 24 |
7780326184 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_outputs.3599728991 |
|
|
Sep 12 01:23:50 AM UTC 24 |
Sep 12 01:29:26 AM UTC 24 |
3405653976 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3612562511 |
|
|
Sep 12 01:22:26 AM UTC 24 |
Sep 12 01:29:40 AM UTC 24 |
5826644500 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3259919417 |
|
|
Sep 12 01:07:12 AM UTC 24 |
Sep 12 01:29:49 AM UTC 24 |
7249445508 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_dev.3126659455 |
|
|
Sep 11 11:44:16 PM UTC 24 |
Sep 12 01:29:52 AM UTC 24 |
47304539253 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_smoketest.2139620223 |
|
|
Sep 12 12:45:33 AM UTC 24 |
Sep 12 01:30:03 AM UTC 24 |
10412868782 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3931372498 |
|
|
Sep 12 01:20:55 AM UTC 24 |
Sep 12 01:31:17 AM UTC 24 |
4886552388 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.608465509 |
|
|
Sep 12 01:25:44 AM UTC 24 |
Sep 12 01:32:03 AM UTC 24 |
5802685830 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.217489380 |
|
|
Sep 12 01:13:36 AM UTC 24 |
Sep 12 01:33:00 AM UTC 24 |
12008956564 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_irq.3041929882 |
|
|
Sep 12 01:24:34 AM UTC 24 |
Sep 12 01:33:02 AM UTC 24 |
3931586600 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1057965447 |
|
|
Sep 12 01:13:17 AM UTC 24 |
Sep 12 01:33:45 AM UTC 24 |
8021182412 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2780011750 |
|
|
Sep 12 01:22:23 AM UTC 24 |
Sep 12 01:33:54 AM UTC 24 |
4527896434 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc.2699994171 |
|
|
Sep 12 01:30:04 AM UTC 24 |
Sep 12 01:34:43 AM UTC 24 |
2930168580 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_idle.2113342213 |
|
|
Sep 12 01:30:53 AM UTC 24 |
Sep 12 01:35:03 AM UTC 24 |
2853452936 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_masking_off.163010875 |
|
|
Sep 12 01:30:53 AM UTC 24 |
Sep 12 01:35:47 AM UTC 24 |
2956163899 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3688049854 |
|
|
Sep 12 01:27:21 AM UTC 24 |
Sep 12 01:35:54 AM UTC 24 |
4264305320 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_init.3906186051 |
|
|
Sep 12 01:04:48 AM UTC 24 |
Sep 12 01:36:22 AM UTC 24 |
24042872907 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc_jitter_en.1597294606 |
|
|
Sep 12 01:30:55 AM UTC 24 |
Sep 12 01:36:43 AM UTC 24 |
3301867259 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_mem_scramble.1254470389 |
|
|
Sep 12 01:28:43 AM UTC 24 |
Sep 12 01:36:50 AM UTC 24 |
3420031128 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_test_unlocked0.870018415 |
|
|
Sep 12 12:42:31 AM UTC 24 |
Sep 12 01:37:17 AM UTC 24 |
11350399293 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_wdog_reset.1912042444 |
|
|
Sep 12 01:27:16 AM UTC 24 |
Sep 12 01:37:20 AM UTC 24 |
4518745352 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_test.2241111966 |
|
|
Sep 12 01:30:55 AM UTC 24 |
Sep 12 01:37:31 AM UTC 24 |
3353837314 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_ping_timeout.3383891684 |
|
|
Sep 12 01:32:43 AM UTC 24 |
Sep 12 01:37:45 AM UTC 24 |
3463965064 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1080718869 |
|
|
Sep 12 01:15:09 AM UTC 24 |
Sep 12 01:38:16 AM UTC 24 |
11908246601 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1343740840 |
|
|
Sep 12 01:27:21 AM UTC 24 |
Sep 12 01:38:24 AM UTC 24 |
19167339264 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2447766811 |
|
|
Sep 12 01:14:22 AM UTC 24 |
Sep 12 01:39:16 AM UTC 24 |
13281176943 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_entropy.3325636504 |
|
|
Sep 12 01:36:37 AM UTC 24 |
Sep 12 01:40:30 AM UTC 24 |
3160159880 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_kat_test.2911928328 |
|
|
Sep 12 01:37:01 AM UTC 24 |
Sep 12 01:41:00 AM UTC 24 |
2930622686 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otbn_randomness.1313648941 |
|
|
Sep 12 01:27:38 AM UTC 24 |
Sep 12 01:41:49 AM UTC 24 |
5930498980 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_alert_info.2507177584 |
|
|
Sep 12 01:11:22 AM UTC 24 |
Sep 12 01:41:51 AM UTC 24 |
13183274624 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.18422366 |
|
|
Sep 12 01:34:37 AM UTC 24 |
Sep 12 01:41:51 AM UTC 24 |
3800992750 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_entropy.583872120 |
|
|
Sep 12 01:36:36 AM UTC 24 |
Sep 12 01:42:04 AM UTC 24 |
3116296814 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.521488351 |
|
|
Sep 12 01:10:54 AM UTC 24 |
Sep 12 01:42:53 AM UTC 24 |
34734867181 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.1814256332 |
|
|
Sep 12 01:26:18 AM UTC 24 |
Sep 12 01:42:57 AM UTC 24 |
10120274356 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_escalation.2545639415 |
|
|
Sep 12 01:31:57 AM UTC 24 |
Sep 12 01:43:09 AM UTC 24 |
5395183420 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_ast_rng_req.3579378670 |
|
|
Sep 12 01:39:54 AM UTC 24 |
Sep 12 01:43:59 AM UTC 24 |
2586883522 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_lc_walkthrough_rma.3307148634 |
|
|
Sep 11 11:46:43 PM UTC 24 |
Sep 12 01:44:21 AM UTC 24 |
46717962720 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2815539673 |
|
|
Sep 12 01:29:42 AM UTC 24 |
Sep 12 01:44:40 AM UTC 24 |
4509382272 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_kat_test.1590534922 |
|
|
Sep 12 01:39:05 AM UTC 24 |
Sep 12 01:44:41 AM UTC 24 |
2890371950 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_rnd.445734351 |
|
|
Sep 12 01:29:39 AM UTC 24 |
Sep 12 01:46:18 AM UTC 24 |
4909514668 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_jitter_en.1437940401 |
|
|
Sep 12 01:43:00 AM UTC 24 |
Sep 12 01:46:44 AM UTC 24 |
2411906447 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_boot_mode.47137437 |
|
|
Sep 12 01:37:33 AM UTC 24 |
Sep 12 01:47:11 AM UTC 24 |
3331975428 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.744828529 |
|
|
Sep 12 01:39:05 AM UTC 24 |
Sep 12 01:47:33 AM UTC 24 |
4164756608 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_idle.2066302000 |
|
|
Sep 12 01:43:04 AM UTC 24 |
Sep 12 01:47:40 AM UTC 24 |
2841964326 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc.3362436804 |
|
|
Sep 12 01:43:03 AM UTC 24 |
Sep 12 01:47:55 AM UTC 24 |
3176125264 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_kat.337359590 |
|
|
Sep 12 01:38:31 AM UTC 24 |
Sep 12 01:49:01 AM UTC 24 |
3404007350 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_shutdown_exception_c.345468576 |
|
|
Sep 12 12:41:45 AM UTC 24 |
Sep 12 01:49:05 AM UTC 24 |
14188248872 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_reset.2161255946 |
|
|
Sep 12 01:22:27 AM UTC 24 |
Sep 12 01:49:38 AM UTC 24 |
22890153400 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_oneshot.2509599116 |
|
|
Sep 12 01:43:54 AM UTC 24 |
Sep 12 01:49:45 AM UTC 24 |
3469332846 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_shutdown_output.2761152797 |
|
|
Sep 12 12:42:44 AM UTC 24 |
Sep 12 01:50:04 AM UTC 24 |
31611834192 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2922401282 |
|
|
Sep 12 01:38:31 AM UTC 24 |
Sep 12 01:50:51 AM UTC 24 |
5539505016 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2188461954 |
|
|
Sep 12 12:42:30 AM UTC 24 |
Sep 12 01:50:56 AM UTC 24 |
15814981762 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.3138887004 |
|
|
Sep 12 12:42:04 AM UTC 24 |
Sep 12 01:51:44 AM UTC 24 |
15091659100 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_cshake.3611845531 |
|
|
Sep 12 01:47:22 AM UTC 24 |
Sep 12 01:51:56 AM UTC 24 |
2816519996 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.1436777325 |
|
|
Sep 12 01:34:37 AM UTC 24 |
Sep 12 01:52:28 AM UTC 24 |
11087154688 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.3417613649 |
|
|
Sep 12 12:41:29 AM UTC 24 |
Sep 12 01:52:50 AM UTC 24 |
15095488640 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/0.chip_sw_inject_scramble_seed.263894146 |
|
|
Sep 11 09:30:25 PM UTC 24 |
Sep 12 01:53:01 AM UTC 24 |
68415013527 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.464642037 |
|
|
Sep 12 01:48:41 AM UTC 24 |
Sep 12 01:53:38 AM UTC 24 |
2542681388 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_app_rom.3521580862 |
|
|
Sep 12 01:48:30 AM UTC 24 |
Sep 12 01:53:39 AM UTC 24 |
3441923820 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac.4099279391 |
|
|
Sep 12 01:47:49 AM UTC 24 |
Sep 12 01:53:41 AM UTC 24 |
2857829992 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_idle.3891730966 |
|
|
Sep 12 01:48:47 AM UTC 24 |
Sep 12 01:54:04 AM UTC 24 |
3043544956 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_rma.265877832 |
|
|
Sep 12 12:42:44 AM UTC 24 |
Sep 12 01:54:38 AM UTC 24 |
15495268648 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_prod_end.1013893664 |
|
|
Sep 12 12:42:04 AM UTC 24 |
Sep 12 01:54:42 AM UTC 24 |
15746539427 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2572005363 |
|
|
Sep 12 12:35:40 AM UTC 24 |
Sep 12 01:55:26 AM UTC 24 |
24526817709 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_ping_ok.2848349392 |
|
|
Sep 12 01:33:50 AM UTC 24 |
Sep 12 01:55:38 AM UTC 24 |
7892391210 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sensor_ctrl_status.1819818181 |
|
|
Sep 12 01:51:41 AM UTC 24 |
Sep 12 01:55:38 AM UTC 24 |
2753638160 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_smoke.329485290 |
|
|
Sep 12 12:40:04 AM UTC 24 |
Sep 12 01:55:47 AM UTC 24 |
15578988360 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_dev.1638648798 |
|
|
Sep 12 12:42:57 AM UTC 24 |
Sep 12 01:56:53 AM UTC 24 |
15698442550 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.1883076393 |
|
|
Sep 12 01:43:00 AM UTC 24 |
Sep 12 01:58:26 AM UTC 24 |
5211877752 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_plic_sw_irq.2305858533 |
|
|
Sep 12 01:53:41 AM UTC 24 |
Sep 12 01:58:37 AM UTC 24 |
3120453136 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2345756133 |
|
|
Sep 12 01:48:48 AM UTC 24 |
Sep 12 01:58:41 AM UTC 24 |
9878412767 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.4183590440 |
|
|
Sep 12 01:35:41 AM UTC 24 |
Sep 12 01:58:47 AM UTC 24 |
6835645420 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_entropy_reqs.1941579001 |
|
|
Sep 12 01:41:42 AM UTC 24 |
Sep 12 01:59:46 AM UTC 24 |
6491972760 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.10185314 |
|
|
Sep 12 01:49:52 AM UTC 24 |
Sep 12 02:00:04 AM UTC 24 |
5503796250 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_10.2730371697 |
|
|
Sep 12 01:53:08 AM UTC 24 |
Sep 12 02:00:21 AM UTC 24 |
3751060594 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3001651797 |
|
|
Sep 12 01:14:18 AM UTC 24 |
Sep 12 02:00:32 AM UTC 24 |
23540445123 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3911319371 |
|
|
Sep 12 01:54:52 AM UTC 24 |
Sep 12 02:00:42 AM UTC 24 |
5135633852 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3268192278 |
|
|
Sep 12 01:52:22 AM UTC 24 |
Sep 12 02:00:45 AM UTC 24 |
5830986978 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.1323611188 |
|
|
Sep 12 01:49:53 AM UTC 24 |
Sep 12 02:01:22 AM UTC 24 |
4310607350 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.1671171830 |
|
|
Sep 12 01:50:29 AM UTC 24 |
Sep 12 02:01:35 AM UTC 24 |
7422115750 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_asm_init_prod.2142937529 |
|
|
Sep 12 12:42:56 AM UTC 24 |
Sep 12 02:01:56 AM UTC 24 |
16204298661 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_auto_mode.2291682844 |
|
|
Sep 12 01:37:33 AM UTC 24 |
Sep 12 02:02:37 AM UTC 24 |
6188484356 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2723334467 |
|
|
Sep 12 01:54:52 AM UTC 24 |
Sep 12 02:03:05 AM UTC 24 |
5195961952 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2300257095 |
|
|
Sep 12 01:35:20 AM UTC 24 |
Sep 12 02:03:42 AM UTC 24 |
8073226390 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_execution_main.3467074439 |
|
|
Sep 12 01:50:29 AM UTC 24 |
Sep 12 02:03:47 AM UTC 24 |
9148273009 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.3366064188 |
|
|
Sep 12 01:55:27 AM UTC 24 |
Sep 12 02:03:58 AM UTC 24 |
6666828694 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.1750424617 |
|
|
Sep 12 01:54:56 AM UTC 24 |
Sep 12 02:04:07 AM UTC 24 |
4730573480 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.386429650 |
|
|
Sep 12 01:55:26 AM UTC 24 |
Sep 12 02:04:29 AM UTC 24 |
4706478200 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.641394713 |
|
|
Sep 12 01:50:44 AM UTC 24 |
Sep 12 02:04:59 AM UTC 24 |
8541745942 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter.2694149954 |
|
|
Sep 12 01:59:38 AM UTC 24 |
Sep 12 02:05:03 AM UTC 24 |
2438106882 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3469570119 |
|
|
Sep 12 01:56:41 AM UTC 24 |
Sep 12 02:05:19 AM UTC 24 |
4375554600 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.rom_e2e_static_critical.1158863232 |
|
|
Sep 12 12:40:16 AM UTC 24 |
Sep 12 02:05:41 AM UTC 24 |
16628700826 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sensor_ctrl_alert.3861208558 |
|
|
Sep 12 01:51:41 AM UTC 24 |
Sep 12 02:05:42 AM UTC 24 |
5557464920 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_reset_frequency.3457886350 |
|
|
Sep 12 01:59:33 AM UTC 24 |
Sep 12 02:06:08 AM UTC 24 |
3291061820 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_sideload_kmac.3453235261 |
|
|
Sep 12 01:45:31 AM UTC 24 |
Sep 12 02:06:12 AM UTC 24 |
7979869068 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_20.1149061699 |
|
|
Sep 12 01:53:40 AM UTC 24 |
Sep 12 02:06:18 AM UTC 24 |
4798789770 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1674832843 |
|
|
Sep 12 01:56:39 AM UTC 24 |
Sep 12 02:06:48 AM UTC 24 |
3806840534 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2074553588 |
|
|
Sep 12 01:56:36 AM UTC 24 |
Sep 12 02:07:02 AM UTC 24 |
4574610736 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3909382365 |
|
|
Sep 12 01:57:33 AM UTC 24 |
Sep 12 02:07:10 AM UTC 24 |
4648544974 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.741883050 |
|
|
Sep 12 01:56:37 AM UTC 24 |
Sep 12 02:07:18 AM UTC 24 |
4514679146 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2637995733 |
|
|
Sep 12 01:59:37 AM UTC 24 |
Sep 12 02:07:21 AM UTC 24 |
3805422440 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_csrng.3838559598 |
|
|
Sep 12 01:41:12 AM UTC 24 |
Sep 12 02:07:31 AM UTC 24 |
7755732970 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_prod.1088904533 |
|
|
Sep 12 02:05:50 AM UTC 24 |
Sep 12 02:08:05 AM UTC 24 |
2800466521 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_dev.2716832616 |
|
|
Sep 12 02:05:02 AM UTC 24 |
Sep 12 02:08:15 AM UTC 24 |
2671440870 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.2931215239 |
|
|
Sep 12 02:01:59 AM UTC 24 |
Sep 12 02:08:37 AM UTC 24 |
4490168656 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_edn_sw_mode.593588107 |
|
|
Sep 12 01:38:34 AM UTC 24 |
Sep 12 02:08:56 AM UTC 24 |
9226320664 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_lc_ctrl_program_error.2003931607 |
|
|
Sep 12 02:01:33 AM UTC 24 |
Sep 12 02:08:58 AM UTC 24 |
5002134800 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.973907853 |
|
|
Sep 12 02:01:36 AM UTC 24 |
Sep 12 02:09:18 AM UTC 24 |
7054953548 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_sleep_frequency.502764710 |
|
|
Sep 12 02:00:27 AM UTC 24 |
Sep 12 02:09:24 AM UTC 24 |
4802872400 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.436137107 |
|
|
Sep 12 01:59:31 AM UTC 24 |
Sep 12 02:10:13 AM UTC 24 |
5416118998 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2457324594 |
|
|
Sep 12 02:07:12 AM UTC 24 |
Sep 12 02:11:19 AM UTC 24 |
2825223876 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.262173966 |
|
|
Sep 12 01:45:00 AM UTC 24 |
Sep 12 02:11:21 AM UTC 24 |
9510309027 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_core_ibex_address_translation.2696368345 |
|
|
Sep 12 02:06:30 AM UTC 24 |
Sep 12 02:11:37 AM UTC 24 |
3329369748 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2902158704 |
|
|
Sep 12 02:07:37 AM UTC 24 |
Sep 12 02:11:42 AM UTC 24 |
2423584354 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_plic_all_irqs_0.2629828455 |
|
|
Sep 12 01:52:39 AM UTC 24 |
Sep 12 02:11:43 AM UTC 24 |
6180917404 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.3072205347 |
|
|
Sep 12 02:08:29 AM UTC 24 |
Sep 12 02:11:58 AM UTC 24 |
3398949341 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_rv_dm_ndm_reset_req.1916839425 |
|
|
Sep 12 02:05:01 AM UTC 24 |
Sep 12 02:12:23 AM UTC 24 |
3776744834 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3335557329 |
|
|
Sep 12 02:08:26 AM UTC 24 |
Sep 12 02:12:26 AM UTC 24 |
3203024442 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_multistream.1461236038 |
|
|
Sep 12 01:43:59 AM UTC 24 |
Sep 12 02:12:32 AM UTC 24 |
8129841374 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.11771293 |
|
|
Sep 12 02:04:53 AM UTC 24 |
Sep 12 02:12:50 AM UTC 24 |
5175456960 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.1939505309 |
|
|
Sep 12 02:04:54 AM UTC 24 |
Sep 12 02:13:02 AM UTC 24 |
6111930080 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_testunlock0.3382697648 |
|
|
Sep 12 02:05:35 AM UTC 24 |
Sep 12 02:13:14 AM UTC 24 |
5222421177 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.1479748884 |
|
|
Sep 12 02:03:18 AM UTC 24 |
Sep 12 02:13:17 AM UTC 24 |
6418464104 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_write_clear.1462622051 |
|
|
Sep 12 02:07:10 AM UTC 24 |
Sep 12 02:13:21 AM UTC 24 |
3290152662 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.676294513 |
|
|
Sep 12 02:03:44 AM UTC 24 |
Sep 12 02:13:41 AM UTC 24 |
5334062042 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_tap_straps_rma.1276698360 |
|
|
Sep 12 02:05:36 AM UTC 24 |
Sep 12 02:13:44 AM UTC 24 |
5572359786 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_edn_concurrency.1388847822 |
|
|
Sep 12 01:38:35 AM UTC 24 |
Sep 12 02:13:45 AM UTC 24 |
9612026224 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_off_peri.2178687115 |
|
|
Sep 12 01:54:55 AM UTC 24 |
Sep 12 02:14:11 AM UTC 24 |
8937622640 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.766029025 |
|
|
Sep 12 02:08:55 AM UTC 24 |
Sep 12 02:14:15 AM UTC 24 |
3902988324 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_csrng_edn_concurrency.2039381003 |
|
|
Sep 12 12:07:24 AM UTC 24 |
Sep 12 02:14:20 AM UTC 24 |
26568446496 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_crash_alert.3128083123 |
|
|
Sep 12 02:07:11 AM UTC 24 |
Sep 12 02:14:49 AM UTC 24 |
4900813832 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.85332209 |
|
|
Sep 12 02:04:54 AM UTC 24 |
Sep 12 02:15:03 AM UTC 24 |
5700421400 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_sleep_load.1979949691 |
|
|
Sep 12 02:10:07 AM UTC 24 |
Sep 12 02:17:00 AM UTC 24 |
4856651888 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_ast_clk_outputs.4036768710 |
|
|
Sep 12 02:01:19 AM UTC 24 |
Sep 12 02:17:00 AM UTC 24 |
8350927608 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.8197941 |
|
|
Sep 12 02:09:17 AM UTC 24 |
Sep 12 02:17:31 AM UTC 24 |
4707870969 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_scrambling_smoketest.4221266845 |
|
|
Sep 12 02:14:36 AM UTC 24 |
Sep 12 02:17:39 AM UTC 24 |
2510392824 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2503028897 |
|
|
Sep 12 02:07:58 AM UTC 24 |
Sep 12 02:18:46 AM UTC 24 |
5229901185 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_idle_load.3900394483 |
|
|
Sep 12 02:10:07 AM UTC 24 |
Sep 12 02:18:56 AM UTC 24 |
3959305096 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_volatile_raw_unlock.591782745 |
|
|
Sep 12 02:16:51 AM UTC 24 |
Sep 12 02:19:10 AM UTC 24 |
2498689548 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aes_smoketest.3176481010 |
|
|
Sep 12 02:15:38 AM UTC 24 |
Sep 12 02:19:17 AM UTC 24 |
3114790054 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_jtag_csr_rw.1416235819 |
|
|
Sep 12 02:00:29 AM UTC 24 |
Sep 12 02:20:23 AM UTC 24 |
11250162300 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3003850246 |
|
|
Sep 12 01:24:04 AM UTC 24 |
Sep 12 02:21:27 AM UTC 24 |
20591768260 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_csrng_smoketest.2704086390 |
|
|
Sep 12 02:16:58 AM UTC 24 |
Sep 12 02:21:29 AM UTC 24 |
2863475500 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_raw_unlock.1747402244 |
|
|
Sep 12 02:16:48 AM UTC 24 |
Sep 12 02:21:48 AM UTC 24 |
6514480917 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_clkmgr_smoketest.565673110 |
|
|
Sep 12 02:16:45 AM UTC 24 |
Sep 12 02:21:55 AM UTC 24 |
3113673396 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_gpio_smoketest.798958071 |
|
|
Sep 12 02:17:50 AM UTC 24 |
Sep 12 02:22:14 AM UTC 24 |
2392241727 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_jtag_mem_access.2008154541 |
|
|
Sep 12 02:00:46 AM UTC 24 |
Sep 12 02:22:37 AM UTC 24 |
13996806504 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_sideload_aes.1246542011 |
|
|
Sep 12 01:45:32 AM UTC 24 |
Sep 12 02:22:58 AM UTC 24 |
11811288324 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_key_derivation.459586701 |
|
|
Sep 12 01:43:55 AM UTC 24 |
Sep 12 02:23:25 AM UTC 24 |
11178497120 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_hmac_smoketest.146175083 |
|
|
Sep 12 02:18:22 AM UTC 24 |
Sep 12 02:23:46 AM UTC 24 |
3144660548 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_aon_timer_smoketest.3814000294 |
|
|
Sep 12 02:16:50 AM UTC 24 |
Sep 12 02:24:03 AM UTC 24 |
3359419592 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_otp_ctrl_smoketest.2157154973 |
|
|
Sep 12 02:19:46 AM UTC 24 |
Sep 12 02:24:21 AM UTC 24 |
2977235358 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_entropy_src_smoketest.732707669 |
|
|
Sep 12 02:17:50 AM UTC 24 |
Sep 12 02:24:32 AM UTC 24 |
3574173880 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_kmac_smoketest.1105717273 |
|
|
Sep 12 02:18:22 AM UTC 24 |
Sep 12 02:24:37 AM UTC 24 |
2608733338 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_plic_smoketest.2021711186 |
|
|
Sep 12 02:21:02 AM UTC 24 |
Sep 12 02:25:24 AM UTC 24 |
3407667396 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rstmgr_smoketest.1306013252 |
|
|
Sep 12 02:22:33 AM UTC 24 |
Sep 12 02:25:51 AM UTC 24 |
2380155360 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1044172412 |
|
|
Sep 12 01:52:36 AM UTC 24 |
Sep 12 02:25:56 AM UTC 24 |
21982407180 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.4209537366 |
|
|
Sep 12 02:20:01 AM UTC 24 |
Sep 12 02:26:39 AM UTC 24 |
5562010424 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3215278842 |
|
|
Sep 12 02:08:28 AM UTC 24 |
Sep 12 02:26:42 AM UTC 24 |
7617113823 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3345276424 |
|
|
Sep 12 02:02:16 AM UTC 24 |
Sep 12 02:27:00 AM UTC 24 |
24131481120 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_rv_timer_smoketest.1215199989 |
|
|
Sep 12 02:22:32 AM UTC 24 |
Sep 12 02:27:10 AM UTC 24 |
2514619052 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_uart_smoketest.3596969963 |
|
|
Sep 12 02:22:51 AM UTC 24 |
Sep 12 02:27:31 AM UTC 24 |
3250830000 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_smoketest.2323010324 |
|
|
Sep 12 02:20:01 AM UTC 24 |
Sep 12 02:28:09 AM UTC 24 |
6037706750 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_sram_ctrl_smoketest.647281567 |
|
|
Sep 12 02:22:39 AM UTC 24 |
Sep 12 02:28:25 AM UTC 24 |
3574700726 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3629332264 |
|
|
Sep 12 02:08:54 AM UTC 24 |
Sep 12 02:28:33 AM UTC 24 |
8787743411 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.rom_keymgr_functest.2417630763 |
|
|
Sep 12 02:16:43 AM UTC 24 |
Sep 12 02:30:08 AM UTC 24 |
5818967380 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2652143699 |
|
|
Sep 12 02:26:40 AM UTC 24 |
Sep 12 02:31:31 AM UTC 24 |
5785105840 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_keymgr_key_derivation_prod.156849925 |
|
|
Sep 12 01:44:40 AM UTC 24 |
Sep 12 02:32:07 AM UTC 24 |
13716505134 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_prod.59947243 |
|
|
Sep 12 02:28:41 AM UTC 24 |
Sep 12 02:32:10 AM UTC 24 |
2739585336 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.395078025 |
|
|
Sep 12 02:26:40 AM UTC 24 |
Sep 12 02:32:24 AM UTC 24 |
3746078682 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.1878036544 |
|
|
Sep 12 02:25:25 AM UTC 24 |
Sep 12 02:32:50 AM UTC 24 |
4054083656 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2749352133 |
|
|
Sep 12 02:15:49 AM UTC 24 |
Sep 12 02:32:58 AM UTC 24 |
5591665170 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_data_integrity_escalation.572431259 |
|
|
Sep 12 02:23:17 AM UTC 24 |
Sep 12 02:33:09 AM UTC 24 |
4821896524 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1731574560 |
|
|
Sep 12 02:02:35 AM UTC 24 |
Sep 12 02:33:20 AM UTC 24 |
25538471978 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_rma.2930694301 |
|
|
Sep 12 02:28:04 AM UTC 24 |
Sep 12 02:33:22 AM UTC 24 |
4688136045 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.683593612 |
|
|
Sep 12 12:36:36 AM UTC 24 |
Sep 12 02:33:26 AM UTC 24 |
33261862894 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx1.3093757549 |
|
|
Sep 12 02:24:04 AM UTC 24 |
Sep 12 02:33:48 AM UTC 24 |
4654144000 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx2.1002567990 |
|
|
Sep 12 02:24:26 AM UTC 24 |
Sep 12 02:33:55 AM UTC 24 |
4227664264 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_all_escalation_resets.2582189163 |
|
|
Sep 12 02:22:55 AM UTC 24 |
Sep 12 02:34:26 AM UTC 24 |
5722019360 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_flash_rma_unlocked.1952745881 |
|
|
Sep 12 01:04:43 AM UTC 24 |
Sep 12 02:34:26 AM UTC 24 |
44132685368 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx.4245830378 |
|
|
Sep 12 02:23:37 AM UTC 24 |
Sep 12 02:34:31 AM UTC 24 |
4854412956 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_power_virus.2193126062 |
|
|
Sep 12 02:11:21 AM UTC 24 |
Sep 12 02:34:45 AM UTC 24 |
5653948664 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1461460960 |
|
|
Sep 12 02:25:26 AM UTC 24 |
Sep 12 02:35:48 AM UTC 24 |
4876254072 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_tap_straps_testunlock0.1644098267 |
|
|
Sep 12 02:27:43 AM UTC 24 |
Sep 12 02:36:24 AM UTC 24 |
5926279866 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/3.chip_sw_uart_tx_rx_idx3.1666772215 |
|
|
Sep 12 02:24:43 AM UTC 24 |
Sep 12 02:37:28 AM UTC 24 |
5083647052 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_tap_straps_testunlock0.3547863913 |
|
|
Sep 12 02:35:11 AM UTC 24 |
Sep 12 02:37:42 AM UTC 24 |
2923913301 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/4.chip_tap_straps_rma.2418648570 |
|
|
Sep 12 02:35:11 AM UTC 24 |
Sep 12 02:38:21 AM UTC 24 |
2637616409 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_10/chip_earlgrey_asic-sim-vcs/coverage/default/2.chip_sw_ast_clk_rst_inputs.221001019 |
|
|
Sep 12 02:11:17 AM UTC 24 |
Sep 12 02:39:02 AM UTC 24 |
14713189119 ps |