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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.36 98.21 96.00 97.44 94.92 98.38 98.21 98.37


Total test records in report: 3808
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T3185 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3189222424 Oct 15 01:06:08 AM UTC 24 Oct 15 01:06:11 AM UTC 24 223345853 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.602041300 Oct 15 01:06:09 AM UTC 24 Oct 15 01:06:11 AM UTC 24 270225782 ps
T378 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3126510274 Oct 15 01:06:09 AM UTC 24 Oct 15 01:06:11 AM UTC 24 316064114 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.1446387410 Oct 15 01:06:09 AM UTC 24 Oct 15 01:06:11 AM UTC 24 242770842 ps
T3186 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3056172081 Oct 15 01:06:08 AM UTC 24 Oct 15 01:06:11 AM UTC 24 506913732 ps
T3187 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.4008966264 Oct 15 01:05:32 AM UTC 24 Oct 15 01:06:11 AM UTC 24 3954616307 ps
T3188 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.1726965910 Oct 15 01:06:08 AM UTC 24 Oct 15 01:06:11 AM UTC 24 488256213 ps
T3189 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.297440920 Oct 15 01:06:09 AM UTC 24 Oct 15 01:06:12 AM UTC 24 480513170 ps
T3190 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2613151176 Oct 15 01:05:54 AM UTC 24 Oct 15 01:06:12 AM UTC 24 11233609612 ps
T344 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2466360139 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:12 AM UTC 24 257959399 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.1802370581 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:13 AM UTC 24 456299506 ps
T3191 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.554822562 Oct 15 01:05:40 AM UTC 24 Oct 15 01:06:13 AM UTC 24 3438174298 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3376315615 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:13 AM UTC 24 265006335 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.358757995 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:13 AM UTC 24 271505401 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3939153629 Oct 15 01:06:11 AM UTC 24 Oct 15 01:06:13 AM UTC 24 287926527 ps
T3192 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2774952479 Oct 15 01:06:11 AM UTC 24 Oct 15 01:06:13 AM UTC 24 248182846 ps
T3193 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1327529429 Oct 15 01:06:11 AM UTC 24 Oct 15 01:06:13 AM UTC 24 499584874 ps
T3194 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.91705038 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:13 AM UTC 24 591819447 ps
T3195 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.684419607 Oct 15 01:06:11 AM UTC 24 Oct 15 01:06:14 AM UTC 24 572238992 ps
T3196 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.297921479 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:14 AM UTC 24 561190057 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.3203750770 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:14 AM UTC 24 476577434 ps
T3197 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2846765181 Oct 15 01:06:10 AM UTC 24 Oct 15 01:06:14 AM UTC 24 584197794 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3301253405 Oct 15 01:06:11 AM UTC 24 Oct 15 01:06:14 AM UTC 24 657496922 ps
T3198 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.942812691 Oct 15 01:05:49 AM UTC 24 Oct 15 01:06:16 AM UTC 24 18596386731 ps
T3199 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3981259370 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:16 AM UTC 24 203037155 ps
T3200 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.195243808 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 179182874 ps
T341 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.1533687415 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 287544644 ps
T328 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.761224744 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 280489518 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3308914956 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 252222831 ps
T3201 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.809388370 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 510387828 ps
T3202 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.526896685 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:17 AM UTC 24 518740650 ps
T405 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.730799825 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:18 AM UTC 24 503384548 ps
T3203 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.3941180164 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:18 AM UTC 24 527184049 ps
T3204 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.3984274205 Oct 15 01:05:47 AM UTC 24 Oct 15 01:06:18 AM UTC 24 3258460270 ps
T3205 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.3281387264 Oct 15 01:06:15 AM UTC 24 Oct 15 01:06:18 AM UTC 24 607597494 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.2144235283 Oct 15 01:06:12 AM UTC 24 Oct 15 01:06:18 AM UTC 24 249949262 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.3741721159 Oct 15 01:06:12 AM UTC 24 Oct 15 01:06:18 AM UTC 24 261554416 ps
T3206 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.3860143375 Oct 15 01:06:14 AM UTC 24 Oct 15 01:06:18 AM UTC 24 196594009 ps
T3207 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.3101166675 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:18 AM UTC 24 156215105 ps
T3208 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2640624881 Oct 15 01:06:14 AM UTC 24 Oct 15 01:06:18 AM UTC 24 246074432 ps
T423 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3441552510 Oct 15 01:06:12 AM UTC 24 Oct 15 01:06:18 AM UTC 24 505259594 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.649838415 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:18 AM UTC 24 269597422 ps
T3209 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.591895232 Oct 15 01:06:14 AM UTC 24 Oct 15 01:06:18 AM UTC 24 579462661 ps
T3210 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.267923573 Oct 15 01:06:12 AM UTC 24 Oct 15 01:06:18 AM UTC 24 636002229 ps
T3211 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.1758129638 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:19 AM UTC 24 576343412 ps
T3212 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.4188950164 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:19 AM UTC 24 600046149 ps
T473 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.423867633 Oct 15 01:06:16 AM UTC 24 Oct 15 01:06:19 AM UTC 24 417962201 ps
T3213 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.475208434 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:19 AM UTC 24 663915982 ps
T388 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3571305705 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:19 AM UTC 24 651917793 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.3410368399 Oct 15 01:06:13 AM UTC 24 Oct 15 01:06:19 AM UTC 24 540377055 ps
T3214 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1266961169 Oct 15 01:05:09 AM UTC 24 Oct 15 01:06:19 AM UTC 24 2696535604 ps
T3215 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.3409589566 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 275984503 ps
T342 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.2942157554 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:22 AM UTC 24 292154963 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.208898663 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 287003999 ps
T406 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.633722751 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 463463028 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.3124156663 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:38 AM UTC 24 333377497 ps
T547 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4143659283 Oct 15 01:06:59 AM UTC 24 Oct 15 01:07:02 AM UTC 24 389719118 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.3918358890 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 234096870 ps
T3216 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3413572597 Oct 15 01:06:59 AM UTC 24 Oct 15 01:07:02 AM UTC 24 289862160 ps
T459 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.214998719 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 362383557 ps
T3217 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.160162348 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 520227207 ps
T3218 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.3829305347 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 495493655 ps
T3219 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.779415147 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 202235888 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.586979843 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:22 AM UTC 24 274286177 ps
T3220 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.936114819 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:22 AM UTC 24 155743627 ps
T3221 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2135891938 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:23 AM UTC 24 644686831 ps
T355 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1438851716 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 294643680 ps
T3222 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.1804766151 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 411794220 ps
T3223 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3630883282 Oct 15 01:06:17 AM UTC 24 Oct 15 01:06:23 AM UTC 24 314149822 ps
T3224 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1896882736 Oct 15 01:06:20 AM UTC 24 Oct 15 01:06:23 AM UTC 24 680803881 ps
T3225 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.319114516 Oct 15 01:06:17 AM UTC 24 Oct 15 01:06:23 AM UTC 24 458785432 ps
T330 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.470995724 Oct 15 01:06:17 AM UTC 24 Oct 15 01:06:23 AM UTC 24 261933249 ps
T3226 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.2903228404 Oct 15 01:05:51 AM UTC 24 Oct 15 01:06:23 AM UTC 24 1446499471 ps
T3227 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1043676413 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 606948131 ps
T3228 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2711096720 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 617053971 ps
T3229 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.876708666 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 566043918 ps
T3230 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2393380171 Oct 15 01:05:34 AM UTC 24 Oct 15 01:06:23 AM UTC 24 31468022667 ps
T396 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3557016582 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:23 AM UTC 24 787714040 ps
T3231 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.604964578 Oct 15 01:06:17 AM UTC 24 Oct 15 01:06:23 AM UTC 24 645050675 ps
T3232 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.1426025 Oct 15 01:05:00 AM UTC 24 Oct 15 01:06:24 AM UTC 24 12059403757 ps
T414 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.1476364510 Oct 15 01:06:19 AM UTC 24 Oct 15 01:06:24 AM UTC 24 777567193 ps
T3233 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.769075708 Oct 15 01:05:25 AM UTC 24 Oct 15 01:06:24 AM UTC 24 28450227860 ps
T3234 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.814855129 Oct 15 01:05:14 AM UTC 24 Oct 15 01:06:25 AM UTC 24 2523710433 ps
T397 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.4095603426 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:38 AM UTC 24 424987693 ps
T3235 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.4107364084 Oct 15 01:05:43 AM UTC 24 Oct 15 01:06:26 AM UTC 24 12503694934 ps
T3236 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.307788937 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:26 AM UTC 24 283899824 ps
T3237 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3931781883 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:26 AM UTC 24 151919055 ps
T3238 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.4208909524 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:27 AM UTC 24 264706706 ps
T3239 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.2167036768 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:27 AM UTC 24 344692778 ps
T3240 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2536360629 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:27 AM UTC 24 595590322 ps
T3241 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.1906954669 Oct 15 01:06:23 AM UTC 24 Oct 15 01:06:27 AM UTC 24 516642846 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.3375023181 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:27 AM UTC 24 180666633 ps
T3242 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.496116776 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:27 AM UTC 24 570332060 ps
T3243 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.75482010 Oct 15 01:05:18 AM UTC 24 Oct 15 01:06:27 AM UTC 24 2540539789 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.990952171 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:27 AM UTC 24 154223910 ps
T392 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.4279250561 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:27 AM UTC 24 306273738 ps
T383 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2901494165 Oct 15 01:06:21 AM UTC 24 Oct 15 01:06:27 AM UTC 24 688046199 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3797050631 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 227876996 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1686767471 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 284154457 ps
T3244 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.4031169976 Oct 15 01:05:26 AM UTC 24 Oct 15 01:06:28 AM UTC 24 2375189472 ps
T3245 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.935799741 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 389067156 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.3363532350 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 259625977 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.993301432 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 263951396 ps
T3246 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.4155799386 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 521856572 ps
T3247 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3734903996 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 510603023 ps
T3248 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.400540309 Oct 15 01:05:13 AM UTC 24 Oct 15 01:06:28 AM UTC 24 10465087131 ps
T3249 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3614783265 Oct 15 01:06:25 AM UTC 24 Oct 15 01:06:28 AM UTC 24 667858497 ps
T3250 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.1810694463 Oct 15 01:05:49 AM UTC 24 Oct 15 01:06:28 AM UTC 24 26118897278 ps
T3251 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.701868631 Oct 15 01:04:47 AM UTC 24 Oct 15 01:06:29 AM UTC 24 3824136590 ps
T3252 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.2400521307 Oct 15 01:05:38 AM UTC 24 Oct 15 01:06:29 AM UTC 24 4311872869 ps
T3253 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2076830211 Oct 15 01:06:30 AM UTC 24 Oct 15 01:06:32 AM UTC 24 275314221 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3183140527 Oct 15 01:06:30 AM UTC 24 Oct 15 01:06:32 AM UTC 24 290911337 ps
T464 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3927218408 Oct 15 01:06:30 AM UTC 24 Oct 15 01:06:32 AM UTC 24 226637681 ps
T3254 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.4255553859 Oct 15 01:06:30 AM UTC 24 Oct 15 01:06:32 AM UTC 24 541418124 ps
T3255 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1742694459 Oct 15 01:05:26 AM UTC 24 Oct 15 01:06:35 AM UTC 24 2562612493 ps
T3256 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1520355564 Oct 15 01:05:26 AM UTC 24 Oct 15 01:06:36 AM UTC 24 2697042913 ps
T3257 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.1964765346 Oct 15 01:05:49 AM UTC 24 Oct 15 01:06:36 AM UTC 24 25511575963 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3070949033 Oct 15 01:06:32 AM UTC 24 Oct 15 01:06:38 AM UTC 24 346175905 ps
T356 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.661743351 Oct 15 01:06:32 AM UTC 24 Oct 15 01:06:38 AM UTC 24 255709614 ps
T476 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2995650116 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:38 AM UTC 24 334723624 ps
T3258 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.3573885002 Oct 15 01:05:56 AM UTC 24 Oct 15 01:06:38 AM UTC 24 4350870928 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.4259102393 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:38 AM UTC 24 295190462 ps
T3259 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.199470964 Oct 15 01:06:32 AM UTC 24 Oct 15 01:06:38 AM UTC 24 549709991 ps
T444 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.373760614 Oct 15 01:07:00 AM UTC 24 Oct 15 01:07:02 AM UTC 24 456622346 ps
T3260 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2437342563 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:38 AM UTC 24 455250668 ps
T3261 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.4226320045 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:39 AM UTC 24 511311011 ps
T465 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.2647595873 Oct 15 01:06:33 AM UTC 24 Oct 15 01:06:39 AM UTC 24 307057784 ps
T3262 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1457081260 Oct 15 01:06:26 AM UTC 24 Oct 15 01:06:39 AM UTC 24 700539316 ps
T3263 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.167114597 Oct 15 01:05:38 AM UTC 24 Oct 15 01:06:41 AM UTC 24 31527441858 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.3387483661 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:41 AM UTC 24 150267184 ps
T3264 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3029231889 Oct 15 01:05:53 AM UTC 24 Oct 15 01:06:42 AM UTC 24 3926515549 ps
T3265 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.1663096300 Oct 15 01:06:36 AM UTC 24 Oct 15 01:06:42 AM UTC 24 222960009 ps
T3266 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.545819814 Oct 15 01:06:36 AM UTC 24 Oct 15 01:06:42 AM UTC 24 539949895 ps
T3267 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.379897710 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:42 AM UTC 24 282049521 ps
T3268 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.2552950522 Oct 15 01:06:23 AM UTC 24 Oct 15 01:06:43 AM UTC 24 658214429 ps
T3269 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2659653127 Oct 15 01:05:40 AM UTC 24 Oct 15 01:06:43 AM UTC 24 2287440202 ps
T118 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.2027625281 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:43 AM UTC 24 544068794 ps
T3270 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.780622890 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:43 AM UTC 24 698819184 ps
T3271 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1711561267 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:43 AM UTC 24 639368644 ps
T3272 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1304023608 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 621262860 ps
T3273 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1737346144 Oct 15 01:06:38 AM UTC 24 Oct 15 01:06:47 AM UTC 24 205508465 ps
T351 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.4166919403 Oct 15 01:06:42 AM UTC 24 Oct 15 01:06:47 AM UTC 24 320936632 ps
T3274 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.1750800598 Oct 15 01:06:44 AM UTC 24 Oct 15 01:06:47 AM UTC 24 163456953 ps
T3275 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.1194277278 Oct 15 01:06:42 AM UTC 24 Oct 15 01:06:47 AM UTC 24 432981545 ps
T453 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3251832377 Oct 15 01:06:44 AM UTC 24 Oct 15 01:06:47 AM UTC 24 180100179 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.2370316868 Oct 15 01:06:44 AM UTC 24 Oct 15 01:06:47 AM UTC 24 280328743 ps
T3276 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.1640157948 Oct 15 01:05:51 AM UTC 24 Oct 15 01:06:48 AM UTC 24 5762188955 ps
T3277 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3380724316 Oct 15 01:06:44 AM UTC 24 Oct 15 01:06:48 AM UTC 24 573341855 ps
T3278 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.4154655858 Oct 15 01:06:44 AM UTC 24 Oct 15 01:06:48 AM UTC 24 484381913 ps
T407 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.928626280 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:58 AM UTC 24 780852491 ps
T292 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3836047819 Oct 15 01:06:43 AM UTC 24 Oct 15 01:06:48 AM UTC 24 155356401 ps
T3279 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.2039378340 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:48 AM UTC 24 280751572 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.349037316 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:49 AM UTC 24 307520555 ps
T3280 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2906006254 Oct 15 01:06:43 AM UTC 24 Oct 15 01:06:49 AM UTC 24 389218831 ps
T3281 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2944721771 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:49 AM UTC 24 192088759 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3815081085 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:49 AM UTC 24 399419523 ps
T3282 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.328819462 Oct 15 01:06:43 AM UTC 24 Oct 15 01:06:49 AM UTC 24 495154347 ps
T3283 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.1682298016 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:49 AM UTC 24 147163966 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1758846772 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:49 AM UTC 24 200149300 ps
T415 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.4040448947 Oct 15 01:06:43 AM UTC 24 Oct 15 01:06:49 AM UTC 24 744020274 ps
T3284 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.4004547576 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:49 AM UTC 24 530179608 ps
T3285 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3867695462 Oct 15 01:06:23 AM UTC 24 Oct 15 01:06:49 AM UTC 24 532001921 ps
T416 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.2199020418 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:52 AM UTC 24 278842872 ps
T385 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3437022718 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:58 AM UTC 24 719557811 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3564443457 Oct 15 01:06:23 AM UTC 24 Oct 15 01:06:52 AM UTC 24 263184893 ps
T3286 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.567758457 Oct 15 01:06:56 AM UTC 24 Oct 15 01:07:01 AM UTC 24 161129051 ps
T3287 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3462971542 Oct 15 01:06:23 AM UTC 24 Oct 15 01:06:52 AM UTC 24 257688709 ps
T3288 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3685969640 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:52 AM UTC 24 165788512 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3327983618 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:52 AM UTC 24 273778579 ps
T3289 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3940406249 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:53 AM UTC 24 265232915 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.192558341 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:53 AM UTC 24 377290868 ps
T3290 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.415209636 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:53 AM UTC 24 496178379 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.121340812 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:53 AM UTC 24 255687051 ps
T3291 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.1242019401 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:53 AM UTC 24 549902070 ps
T3292 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1730144311 Oct 15 01:06:29 AM UTC 24 Oct 15 01:06:53 AM UTC 24 559360603 ps
T3293 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2113526553 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:53 AM UTC 24 466900495 ps
T429 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1347461281 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:53 AM UTC 24 717930646 ps
T432 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.4197862975 Oct 15 01:06:50 AM UTC 24 Oct 15 01:06:53 AM UTC 24 370185589 ps
T3294 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.2821468793 Oct 15 01:06:50 AM UTC 24 Oct 15 01:06:53 AM UTC 24 336478136 ps
T332 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2604972402 Oct 15 01:06:47 AM UTC 24 Oct 15 01:06:53 AM UTC 24 326320706 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.1562576968 Oct 15 01:06:49 AM UTC 24 Oct 15 01:06:53 AM UTC 24 669327914 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3713152722 Oct 15 01:06:51 AM UTC 24 Oct 15 01:06:53 AM UTC 24 247481943 ps
T466 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.498291410 Oct 15 01:06:47 AM UTC 24 Oct 15 01:06:53 AM UTC 24 324225079 ps
T3295 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1638595270 Oct 15 01:06:39 AM UTC 24 Oct 15 01:06:53 AM UTC 24 542267542 ps
T3296 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2545041180 Oct 15 01:06:50 AM UTC 24 Oct 15 01:06:53 AM UTC 24 546398985 ps
T408 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.753844078 Oct 15 01:06:40 AM UTC 24 Oct 15 01:06:53 AM UTC 24 663916963 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2605091248 Oct 15 01:06:51 AM UTC 24 Oct 15 01:06:53 AM UTC 24 548667742 ps
T3297 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.2964527467 Oct 15 01:06:51 AM UTC 24 Oct 15 01:06:53 AM UTC 24 451842618 ps
T3298 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2857127729 Oct 15 01:06:40 AM UTC 24 Oct 15 01:06:53 AM UTC 24 485415084 ps
T3299 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.206225545 Oct 15 01:06:51 AM UTC 24 Oct 15 01:06:53 AM UTC 24 539136259 ps
T3300 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.557696159 Oct 15 01:06:47 AM UTC 24 Oct 15 01:06:54 AM UTC 24 507722571 ps
T3301 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.273236654 Oct 15 01:06:48 AM UTC 24 Oct 15 01:06:54 AM UTC 24 625313551 ps
T3302 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1538862324 Oct 15 01:06:01 AM UTC 24 Oct 15 01:06:55 AM UTC 24 20803421188 ps
T3303 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.2049951081 Oct 15 01:05:34 AM UTC 24 Oct 15 01:06:56 AM UTC 24 43839339702 ps
T3304 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3834297443 Oct 15 01:04:58 AM UTC 24 Oct 15 01:06:56 AM UTC 24 4445089528 ps
T3305 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.771750035 Oct 15 01:06:31 AM UTC 24 Oct 15 01:06:57 AM UTC 24 257371947 ps
T3306 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2225391128 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 228677395 ps
T3307 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.1058940442 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 165878419 ps
T275 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.121315870 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 297791675 ps
T3308 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1191238475 Oct 15 01:06:31 AM UTC 24 Oct 15 01:06:57 AM UTC 24 607971656 ps
T3309 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4101643052 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 485165155 ps
T380 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1838004595 Oct 15 01:06:54 AM UTC 24 Oct 15 01:06:57 AM UTC 24 502887467 ps
T3310 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.387808773 Oct 15 01:06:59 AM UTC 24 Oct 15 01:07:02 AM UTC 24 601118555 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1182745533 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:02 AM UTC 24 721752823 ps
T3311 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.3435597669 Oct 15 01:06:53 AM UTC 24 Oct 15 01:07:02 AM UTC 24 165138079 ps
T399 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.121008148 Oct 15 01:06:53 AM UTC 24 Oct 15 01:07:04 AM UTC 24 888000205 ps
T3312 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.404663132 Oct 15 01:05:24 AM UTC 24 Oct 15 01:07:04 AM UTC 24 3908644738 ps
T3313 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.730572890 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:06 AM UTC 24 227284229 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.3988625507 Oct 15 01:07:03 AM UTC 24 Oct 15 01:07:22 AM UTC 24 218033729 ps
T3314 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.347116078 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:06 AM UTC 24 154709762 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.4216258917 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:06 AM UTC 24 423447780 ps
T402 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1662605899 Oct 15 01:06:51 AM UTC 24 Oct 15 01:07:07 AM UTC 24 574827683 ps
T3315 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.3834143276 Oct 15 01:07:03 AM UTC 24 Oct 15 01:07:07 AM UTC 24 306113453 ps
T3316 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.684158588 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:07 AM UTC 24 534113556 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3856247129 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:07 AM UTC 24 324291799 ps
T3317 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.3201316775 Oct 15 01:07:05 AM UTC 24 Oct 15 01:07:07 AM UTC 24 275316997 ps
T3318 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.305162570 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:07 AM UTC 24 585425913 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3109483112 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:07 AM UTC 24 581905441 ps
T3319 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3411374480 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 269366416 ps
T3320 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.2655595826 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 154400351 ps
T309 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.1996773780 Oct 15 01:07:02 AM UTC 24 Oct 15 01:07:07 AM UTC 24 314278332 ps
T3321 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.14830617 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 479207185 ps
T410 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.2126926213 Oct 15 01:07:05 AM UTC 24 Oct 15 01:07:07 AM UTC 24 641767934 ps
T3322 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.2777960398 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:07 AM UTC 24 601765791 ps
T3323 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.65109123 Oct 15 01:07:04 AM UTC 24 Oct 15 01:07:07 AM UTC 24 650685598 ps
T3324 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.1631674103 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 248576966 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.540185003 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 366991513 ps
T3325 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.776151779 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:07 AM UTC 24 526326547 ps
T3326 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.1003841219 Oct 15 01:06:54 AM UTC 24 Oct 15 01:07:08 AM UTC 24 511781629 ps
T3327 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1478260393 Oct 15 01:05:24 AM UTC 24 Oct 15 01:07:08 AM UTC 24 9180766872 ps
T3328 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1634643345 Oct 15 01:06:04 AM UTC 24 Oct 15 01:07:09 AM UTC 24 2509262458 ps
T3329 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.4096916378 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:11 AM UTC 24 147332160 ps
T3330 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.84927954 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 194290798 ps
T3331 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.2973666073 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 157394081 ps
T329 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.3864789411 Oct 15 01:07:08 AM UTC 24 Oct 15 01:07:12 AM UTC 24 261949045 ps
T3332 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3143287541 Oct 15 01:05:38 AM UTC 24 Oct 15 01:07:12 AM UTC 24 8106907784 ps
T3333 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.4189217047 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 275269137 ps
T3334 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.833892653 Oct 15 01:07:07 AM UTC 24 Oct 15 01:07:12 AM UTC 24 252538379 ps
T3335 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2640631317 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 585961905 ps
T3336 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.1525106963 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 520097990 ps
T3337 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.4016230127 Oct 15 01:06:59 AM UTC 24 Oct 15 01:07:12 AM UTC 24 528687023 ps
T3338 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.2688772876 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 475177870 ps
T3339 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3474043187 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 502329561 ps
T3340 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.2852832541 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 490517079 ps
T3341 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.2119874502 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:12 AM UTC 24 456107443 ps
T3342 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.618568326 Oct 15 01:07:07 AM UTC 24 Oct 15 01:07:12 AM UTC 24 493535515 ps
T411 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.1377553183 Oct 15 01:07:09 AM UTC 24 Oct 15 01:07:13 AM UTC 24 838432029 ps
T3343 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.166796779 Oct 15 01:05:56 AM UTC 24 Oct 15 01:07:13 AM UTC 24 2974070434 ps
T3344 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.733164547 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:17 AM UTC 24 152331441 ps
T3345 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2612152920 Oct 15 01:06:58 AM UTC 24 Oct 15 01:07:18 AM UTC 24 237166551 ps
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