| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.36 | 98.21 | 96.00 | 97.44 | 94.92 | 98.38 | 98.21 | 98.37 |
| T3752 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3287070679 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:38 AM UTC 24 | 190751151 ps | ||
| T3753 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2809455958 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:39 AM UTC 24 | 88996520 ps | ||
| T3754 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1265581276 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:39 AM UTC 24 | 183816768 ps | ||
| T3755 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3071722347 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:40 AM UTC 24 | 315041753 ps | ||
| T3756 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1600694146 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:40 AM UTC 24 | 928472364 ps | ||
| T3757 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2902550327 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:40 AM UTC 24 | 646165488 ps | ||
| T3758 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.107060588 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:41 AM UTC 24 | 41243810 ps | ||
| T3759 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.126045650 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:41 AM UTC 24 | 795178335 ps | ||
| T3760 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3916185133 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:41 AM UTC 24 | 46752641 ps | ||
| T3761 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2885285093 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:50 AM UTC 24 | 69045965 ps | ||
| T3762 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1290897083 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:51 AM UTC 24 | 69641476 ps | ||
| T3763 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.3967931067 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 49715982 ps | ||
| T3764 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.1941985042 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:41 AM UTC 24 | 92493662 ps | ||
| T3765 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3682426810 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 33878605 ps | ||
| T3766 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.568115570 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:41 AM UTC 24 | 128316433 ps | ||
| T3767 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3387220421 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 123147546 ps | ||
| T3768 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.793783897 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 112993691 ps | ||
| T3769 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3848346654 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 90855349 ps | ||
| T3770 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.550110203 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 131378286 ps | ||
| T3771 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.56760976 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 296962928 ps | ||
| T3772 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.4242413602 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:50 AM UTC 24 | 60739573 ps | ||
| T3773 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.4081201008 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:51 AM UTC 24 | 45664327 ps | ||
| T3774 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.838749152 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 39085184 ps | ||
| T3775 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.3740271094 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 138218405 ps | ||
| T3776 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3966458963 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 142880619 ps | ||
| T3777 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.167833222 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 165888902 ps | ||
| T3778 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2002490818 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 54195442 ps | ||
| T3779 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3255614264 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:42 AM UTC 24 | 40189945 ps | ||
| T3780 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.4004239980 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:43 AM UTC 24 | 221618054 ps | ||
| T3781 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1850587588 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:43 AM UTC 24 | 90777862 ps | ||
| T3782 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3452325533 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:43 AM UTC 24 | 99516678 ps | ||
| T3783 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.529881866 | Oct 15 01:09:32 AM UTC 24 | Oct 15 01:09:43 AM UTC 24 | 200873068 ps | ||
| T3784 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1497097008 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:43 AM UTC 24 | 119721108 ps | ||
| T3785 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.2125861364 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:44 AM UTC 24 | 90344651 ps | ||
| T3786 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.688674082 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:44 AM UTC 24 | 358733110 ps | ||
| T3787 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2652298480 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:44 AM UTC 24 | 664102367 ps | ||
| T514 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1909229715 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:45 AM UTC 24 | 543337032 ps | ||
| T3788 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1386562105 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:45 AM UTC 24 | 893920796 ps | ||
| T3789 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.383983233 | Oct 15 01:09:33 AM UTC 24 | Oct 15 01:09:45 AM UTC 24 | 484231207 ps | ||
| T3790 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.486585074 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:50 AM UTC 24 | 56355237 ps | ||
| T3791 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2197502405 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:50 AM UTC 24 | 93447913 ps | ||
| T3792 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.7244571 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:51 AM UTC 24 | 53219820 ps | ||
| T3793 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.639503621 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:51 AM UTC 24 | 48290104 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.695261097 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 36251775 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3769917911 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 41217477 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.830258709 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 37893353 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2205027949 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 48066207 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2778839826 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 64876160 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1082367379 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 31199011 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3029813253 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 48805993 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3147562793 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 59270566 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2084035189 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 50492480 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.860930364 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 79184541 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.606476555 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:52 AM UTC 24 | 44609623 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2440969739 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:53 AM UTC 24 | 76053994 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4256669897 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:09:53 AM UTC 24 | 93204867 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.663228817 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:10:00 AM UTC 24 | 57119747 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.3703370998 | Oct 15 01:09:49 AM UTC 24 | Oct 15 01:10:00 AM UTC 24 | 46914754 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3298721409 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 933601175 ps |
| CPU time | 4.69 seconds |
| Started | Oct 15 12:49:09 AM UTC 24 |
| Finished | Oct 15 12:49:15 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3298721409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3298721409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3252128701 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 4168715478 ps |
| CPU time | 16.32 seconds |
| Started | Oct 15 12:49:23 AM UTC 24 |
| Finished | Oct 15 12:49:40 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252128701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.3252128701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.893166491 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3725659518 ps |
| CPU time | 33.37 seconds |
| Started | Oct 15 12:49:42 AM UTC 24 |
| Finished | Oct 15 12:50:17 AM UTC 24 |
| Peak memory | 233548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=893166491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.893166491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3418765806 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 18775318092 ps |
| CPU time | 37.86 seconds |
| Started | Oct 15 12:49:02 AM UTC 24 |
| Finished | Oct 15 12:49:42 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418765806 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.3418765806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.399512473 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 574268860 ps |
| CPU time | 2.67 seconds |
| Started | Oct 15 12:49:11 AM UTC 24 |
| Finished | Oct 15 12:49:15 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399512473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.399512473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.174716824 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 48057798 ps |
| CPU time | 0.68 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:01 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=174716824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.174716824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1199784017 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 182487335 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:03 AM UTC 24 |
| Peak memory | 226904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199784017 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.1199784017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1270468589 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 5815059045 ps |
| CPU time | 7.79 seconds |
| Started | Oct 15 12:49:01 AM UTC 24 |
| Finished | Oct 15 12:49:10 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270468589 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.1270468589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.759590101 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 42535374745 ps |
| CPU time | 127.03 seconds |
| Started | Oct 15 12:49:10 AM UTC 24 |
| Finished | Oct 15 12:51:20 AM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759590101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_device_address.759590101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.1995721165 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 268435375 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:50:21 AM UTC 24 |
| Peak memory | 251924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995721165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.1995721165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.2655250718 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 8614745073 ps |
| CPU time | 52.84 seconds |
| Started | Oct 15 12:50:16 AM UTC 24 |
| Finished | Oct 15 12:51:10 AM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655250718 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.2655250718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1016218860 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 330212634 ps |
| CPU time | 2.25 seconds |
| Started | Oct 15 12:49:58 AM UTC 24 |
| Finished | Oct 15 12:50:02 AM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016218860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.1016218860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.1998357732 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 9841327905 ps |
| CPU time | 27.11 seconds |
| Started | Oct 15 12:53:07 AM UTC 24 |
| Finished | Oct 15 12:53:35 AM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998357732 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.1998357732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.1562576968 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 669327914 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1562576968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.1562576968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2161316247 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 47045630 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:51:35 AM UTC 24 |
| Finished | Oct 15 12:51:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2161316247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.2161316247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.176749417 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 4037233960 ps |
| CPU time | 39.73 seconds |
| Started | Oct 15 12:49:28 AM UTC 24 |
| Finished | Oct 15 12:50:10 AM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176749417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.176749417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.396098910 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 53426680 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:09:20 AM UTC 24 |
| Finished | Oct 15 01:09:21 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396098910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.396098910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3757035012 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 7396644841 ps |
| CPU time | 16.81 seconds |
| Started | Oct 15 12:49:41 AM UTC 24 |
| Finished | Oct 15 12:49:59 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757035012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3757035012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.544489410 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 226351831 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:49:13 AM UTC 24 |
| Finished | Oct 15 12:49:15 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544489410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_disconnected.544489410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.585722132 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 603203336 ps |
| CPU time | 3.7 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:05 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=585722132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.585722132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.4253991931 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 15196517424 ps |
| CPU time | 19.49 seconds |
| Started | Oct 15 12:56:25 AM UTC 24 |
| Finished | Oct 15 12:56:45 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253991931 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.4253991931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.1072437383 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 669866966 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:07:35 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1072437383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.1072437383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.934833976 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 487940582 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=934833976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_t x_rx_disruption.934833976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.809814690 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 22282677318 ps |
| CPU time | 47.73 seconds |
| Started | Oct 15 12:51:52 AM UTC 24 |
| Finished | Oct 15 12:52:41 AM UTC 24 |
| Peak memory | 219304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809814690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_device_address.809814690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.773224400 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 269544095 ps |
| CPU time | 1.91 seconds |
| Started | Oct 15 12:50:10 AM UTC 24 |
| Finished | Oct 15 12:50:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773224400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_rx_full.773224400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.483860518 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 134794641 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:03 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483860518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.483860518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3625046125 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 752888065 ps |
| CPU time | 2.11 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:33 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625046125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3625046125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.404622636 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 430268225 ps |
| CPU time | 2.43 seconds |
| Started | Oct 15 12:50:26 AM UTC 24 |
| Finished | Oct 15 12:50:29 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=404622636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.404622636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.294285526 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 256802172 ps |
| CPU time | 2.81 seconds |
| Started | Oct 15 01:09:18 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 234856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=294285526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.294285526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.4264785865 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 22999091005 ps |
| CPU time | 39.5 seconds |
| Started | Oct 15 12:54:46 AM UTC 24 |
| Finished | Oct 15 12:55:27 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264785865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.4264785865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.3105686433 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 293687408 ps |
| CPU time | 2.08 seconds |
| Started | Oct 15 12:50:26 AM UTC 24 |
| Finished | Oct 15 12:50:29 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105686433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.3105686433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.1261869382 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 753270097 ps |
| CPU time | 3.11 seconds |
| Started | Oct 15 12:55:43 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261869382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.1261869382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3301253405 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 657496922 ps |
| CPU time | 2.38 seconds |
| Started | Oct 15 01:06:11 AM UTC 24 |
| Finished | Oct 15 01:06:14 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301253405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.3301253405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.4089542670 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 200900798 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:49:08 AM UTC 24 |
| Finished | Oct 15 12:49:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089542670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.4089542670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3815614874 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 166652939 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:50:06 AM UTC 24 |
| Finished | Oct 15 12:50:09 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815614874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3815614874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1170575499 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 47406508 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:17 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170575499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.1170575499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3130589828 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 1153006898 ps |
| CPU time | 3.39 seconds |
| Started | Oct 15 12:50:21 AM UTC 24 |
| Finished | Oct 15 12:50:25 AM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130589828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3130589828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3557016582 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 787714040 ps |
| CPU time | 1.89 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557016582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.3557016582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.3064055014 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 186129968 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:50:01 AM UTC 24 |
| Finished | Oct 15 12:50:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064055014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.3064055014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.867162548 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 687884408 ps |
| CPU time | 2.96 seconds |
| Started | Oct 15 12:56:30 AM UTC 24 |
| Finished | Oct 15 12:56:34 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=867162548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.867162548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.2580783259 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 603561746 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:19 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580783259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.2580783259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.4106380812 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 435588804 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106380812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.4106380812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1828853615 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 770343362 ps |
| CPU time | 2.87 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828853615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.1828853615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.342834631 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 489826235 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:07:20 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342834631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.342834631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.749974365 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 695423663 ps |
| CPU time | 2.52 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:49 AM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=749974365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.749974365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.1804728695 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 403263465 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:56 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804728695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.1804728695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.1080315 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 431746894 ps |
| CPU time | 2.82 seconds |
| Started | Oct 15 12:50:11 AM UTC 24 |
| Finished | Oct 15 12:50:15 AM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_priority.1080315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.3837020665 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 3529893158 ps |
| CPU time | 31.22 seconds |
| Started | Oct 15 12:51:24 AM UTC 24 |
| Finished | Oct 15 12:51:57 AM UTC 24 |
| Peak memory | 235912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837020665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.3837020665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.261185726 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 812300617 ps |
| CPU time | 4.48 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:29 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=261185726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.261185726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3437022718 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 719557811 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:58 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437022718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.3437022718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.198079378 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 495437924 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=198079378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.198079378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.214998719 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 362383557 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214998719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.214998719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3536454253 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 42343839 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:50:20 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536454253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.3536454253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.2668793071 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 42820341488 ps |
| CPU time | 85.84 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:59:21 AM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668793071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.2668793071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2885285093 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 69045965 ps |
| CPU time | 0.73 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:50 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885285093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.2885285093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.753844078 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 663916963 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:06:40 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753844078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.753844078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.498291410 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 324225079 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:47 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=498291410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.498291410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.818110129 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 375389085 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=818110129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.818110129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2577578000 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 1443983925 ps |
| CPU time | 4.11 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:28 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577578000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2577578000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1099642271 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 511571595 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:48 AM UTC 24 |
| Peak memory | 216440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099642271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1099642271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.2365537185 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 759926384 ps |
| CPU time | 2.93 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:19 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365537185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.2365537185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.2312654502 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 2300796721 ps |
| CPU time | 21.25 seconds |
| Started | Oct 15 01:01:15 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 236084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312654502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.2312654502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1358174258 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 600398192 ps |
| CPU time | 2.19 seconds |
| Started | Oct 15 12:51:46 AM UTC 24 |
| Finished | Oct 15 12:51:50 AM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1358174258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.1358174258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.3504936839 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 169742610 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:49:06 AM UTC 24 |
| Finished | Oct 15 12:49:08 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504936839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.3504936839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.3466834832 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 574712052 ps |
| CPU time | 2.69 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:06 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3466834832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.3466834832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3813746875 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 150422313 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:49:07 AM UTC 24 |
| Finished | Oct 15 12:49:09 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813746875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.3813746875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2354378190 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 5121108628 ps |
| CPU time | 148.03 seconds |
| Started | Oct 15 12:49:13 AM UTC 24 |
| Finished | Oct 15 12:51:43 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354378190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2354378190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.2586658087 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 194849859 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:50:14 AM UTC 24 |
| Finished | Oct 15 12:50:17 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586658087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.2586658087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3815081085 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 399419523 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815081085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3815081085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1758846772 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 200149300 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758846772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.1758846772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2906006254 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 389218831 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:06:43 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906006254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.2906006254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.1377553183 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 838432029 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377553183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.1377553183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2181218537 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 551678158 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181218537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.2181218537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.222255987 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 516649497 ps |
| CPU time | 2.56 seconds |
| Started | Oct 15 12:59:29 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222255987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.222255987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.3841117202 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 295792635 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:51:55 AM UTC 24 |
| Finished | Oct 15 12:51:58 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3841117202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.3841117202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.925342185 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 299100279 ps |
| CPU time | 1.91 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925342185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.925342185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.4030813160 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 661479158 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 12:53:15 AM UTC 24 |
| Finished | Oct 15 12:53:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030813160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.4030813160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1127445918 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 197102818 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:49:50 AM UTC 24 |
| Finished | Oct 15 12:49:52 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127445918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.1127445918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.2380521669 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 257292706 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 12:55:45 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380521669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.2380521669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.541182243 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 6817792938 ps |
| CPU time | 44.77 seconds |
| Started | Oct 15 12:51:38 AM UTC 24 |
| Finished | Oct 15 12:52:24 AM UTC 24 |
| Peak memory | 231496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=541182243 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.541182243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1922991146 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 7603283707 ps |
| CPU time | 180.85 seconds |
| Started | Oct 15 12:54:41 AM UTC 24 |
| Finished | Oct 15 12:57:45 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922991146 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1922991146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.574914570 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 20065156070 ps |
| CPU time | 52.75 seconds |
| Started | Oct 15 12:56:17 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=574914570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_pkt_buffer.574914570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.2657276769 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 45656993 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 12:58:04 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657276769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.2657276769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.1460981603 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 804555313 ps |
| CPU time | 4.48 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:37 AM UTC 24 |
| Peak memory | 217768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460981603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.1460981603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.3001041194 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 86109785270 ps |
| CPU time | 196.08 seconds |
| Started | Oct 15 12:49:19 AM UTC 24 |
| Finished | Oct 15 12:52:39 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001041194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.3001041194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121105139 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 269404069 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 12:50:53 AM UTC 24 |
| Finished | Oct 15 12:50:56 AM UTC 24 |
| Peak memory | 216572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121105139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.1121105139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3045455027 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 633856866 ps |
| CPU time | 3.08 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:46 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045455027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3045455027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.2039378340 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 280751572 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039378340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.2039378340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.349037316 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 307520555 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349037316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 103.usbdev_fifo_levels.349037316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.4166919403 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 320936632 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:06:42 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166919403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.4166919403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.4040448947 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 744020274 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:06:43 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040448947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.4040448947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3836047819 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 155356401 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:06:43 AM UTC 24 |
| Finished | Oct 15 01:06:48 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836047819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.3836047819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.2370316868 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 280328743 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:06:44 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370316868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.2370316868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2604972402 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 326320706 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:06:47 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604972402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.2604972402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.273236654 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 625313551 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:48 AM UTC 24 |
| Finished | Oct 15 01:06:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=273236654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.273236654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3327983618 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 273778579 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327983618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.3327983618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3713152722 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 247481943 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:06:51 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713152722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.3713152722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.121008148 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 888000205 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 01:06:53 AM UTC 24 |
| Finished | Oct 15 01:07:04 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=121008148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.121008148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.121315870 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 297791675 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121315870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 117.usbdev_fifo_levels.121315870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3411374480 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 269366416 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411374480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.3411374480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.2641633243 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 276011077 ps |
| CPU time | 1.94 seconds |
| Started | Oct 15 12:56:30 AM UTC 24 |
| Finished | Oct 15 12:56:33 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641633243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.2641633243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1838004595 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 502887467 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838004595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1838004595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.957384760 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 205446001 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957384760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 125.usbdev_fifo_levels.957384760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.2833707182 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 172696778 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833707182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.2833707182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.1377076326 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 215208036 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:21 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377076326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.1377076326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.4216258917 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 423447780 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:06 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216258917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.4216258917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.3401607233 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 165325917 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:56:54 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401607233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.3401607233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1182745533 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 721752823 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182745533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1182745533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3856247129 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 324291799 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856247129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.3856247129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3413572597 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 289862160 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:06:59 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413572597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.3413572597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.3988625507 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 218033729 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988625507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.3988625507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3887290367 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 217874799 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 218324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887290367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3887290367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.3864789411 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 261949045 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:07:08 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864789411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.3864789411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.252904074 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 357866640 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252904074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.252904074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1307926641 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 255818114 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307926641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.1307926641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.4096916378 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 147332160 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:11 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096916378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.4096916378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.4189466142 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 267299411 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189466142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.4189466142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3288988141 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 310721592 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:21 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288988141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3288988141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.1560608920 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 290490735 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560608920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.1560608920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.438567822 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 148385595 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:07:19 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438567822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 151.usbdev_fifo_levels.438567822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.2294312132 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 246413842 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294312132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.2294312132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.1835799222 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 268576189 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835799222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.1835799222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.4066261909 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 557791956 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066261909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.4066261909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1821900712 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 458651829 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821900712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1821900712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.1744813575 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 235499253 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744813575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_fifo_levels.1744813575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.2565120283 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 296078967 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565120283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.2565120283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.4149397057 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 8759954534 ps |
| CPU time | 11.56 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:13 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149397057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.4149397057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1903129307 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 272642647 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903129307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.1903129307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3860130457 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 271991809 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:51:54 AM UTC 24 |
| Finished | Oct 15 12:51:57 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860130457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.3860130457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.3247661205 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 257088864 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:44 AM UTC 24 |
| Peak memory | 216636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247661205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.3247661205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.3645059031 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 493998870 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:14 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645059031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.3645059031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3441552510 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 505259594 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:06:12 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441552510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.3441552510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.3741721159 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 261554416 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:06:12 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741721159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.3741721159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.470995724 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 261933249 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:06:17 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470995724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 71.usbdev_fifo_levels.470995724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.3375023181 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 180666633 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375023181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.3375023181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1793342646 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 139996471 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:50:00 AM UTC 24 |
| Finished | Oct 15 12:50:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793342646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.1793342646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2818248605 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 149739700 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:51:07 AM UTC 24 |
| Finished | Oct 15 12:51:10 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818248605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.2818248605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.1493507574 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 283815928 ps |
| CPU time | 2.96 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 217716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493507574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.1493507574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.76833303 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 509098672 ps |
| CPU time | 2.3 seconds |
| Started | Oct 15 12:49:27 AM UTC 24 |
| Finished | Oct 15 12:49:30 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76833303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.76833303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2568689208 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 169161820 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:49:40 AM UTC 24 |
| Finished | Oct 15 12:49:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568689208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.2568689208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.332487264 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 163631524 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:50:10 AM UTC 24 |
| Finished | Oct 15 12:50:12 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332487264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_pid_err.332487264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.2860287097 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 213962816 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:50:20 AM UTC 24 |
| Finished | Oct 15 12:50:22 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2860287097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.2860287097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1318396517 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 3372038386 ps |
| CPU time | 31.43 seconds |
| Started | Oct 15 12:49:42 AM UTC 24 |
| Finished | Oct 15 12:50:15 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318396517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1318396517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1869261651 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 197320509 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:50:42 AM UTC 24 |
| Finished | Oct 15 12:50:45 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869261651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.1869261651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.3364995499 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 206742468 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:55:55 AM UTC 24 |
| Finished | Oct 15 12:55:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364995499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.3364995499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.3466516631 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 153906285 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:55:57 AM UTC 24 |
| Finished | Oct 15 12:55:59 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466516631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.3466516631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.1290469915 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 157712835 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290469915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.1290469915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.1846305454 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 175575194 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846305454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.1846305454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.3945346899 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 251985886 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:57:46 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945346899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.3945346899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1998041546 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 210787725 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998041546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.1998041546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.3526738300 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 357997669 ps |
| CPU time | 2.08 seconds |
| Started | Oct 15 12:51:15 AM UTC 24 |
| Finished | Oct 15 12:51:19 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526738300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.3526738300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.1850789795 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 8178214221 ps |
| CPU time | 62.02 seconds |
| Started | Oct 15 12:51:45 AM UTC 24 |
| Finished | Oct 15 12:52:49 AM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850789795 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.1850789795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.1047897966 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 199287221 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:58:50 AM UTC 24 |
| Finished | Oct 15 12:58:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047897966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.1047897966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.756532748 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 193820351 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756532748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_nak_trans.756532748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.3124691016 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 216015746 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124691016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.3124691016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.3866708667 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 296734392 ps |
| CPU time | 2.86 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:19 AM UTC 24 |
| Peak memory | 217676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866708667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.3866708667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.1057811268 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 712859173 ps |
| CPU time | 6.49 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057811268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.1057811268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1442945410 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 203054122 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:17 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442945410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.1442945410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3787479936 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 161280791 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:02 AM UTC 24 |
| Peak memory | 226904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787479936 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.3787479936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.166568733 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 66303853 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:17 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=166568733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.166568733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1497614138 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 166599744 ps |
| CPU time | 1.97 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:18 AM UTC 24 |
| Peak memory | 226924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497614138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.1497614138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.4291965030 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 322271660 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:18 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291965030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.4291965030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.1040658439 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 190726338 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:01 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040658439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.1040658439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.176662429 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 144938715 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:18 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176662429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.176662429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.463785245 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 491996598 ps |
| CPU time | 3.67 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:20 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463785245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.463785245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3591266318 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 239274894 ps |
| CPU time | 1.89 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:03 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591266318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3591266318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.336958293 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 367158197 ps |
| CPU time | 3.41 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:04 AM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=336958293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.336958293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.4078369607 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 68250849 ps |
| CPU time | 0.7 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:01 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078369607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.4078369607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.1148682342 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 92509364 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:01 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148682342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1148682342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.465898332 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 274204961 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:14 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=465898332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.465898332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.3615141846 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 196419797 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615141846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.3615141846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.3260534545 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 312641146 ps |
| CPU time | 2.08 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:02 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260534545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.3260534545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1637311078 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 73430701 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 226952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637311078 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.1637311078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1606647175 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 57231683 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:33 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606647175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.1606647175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.4096009077 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 40667938 ps |
| CPU time | 0.63 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:33 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096009077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.4096009077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.346956478 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 207087086 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346956478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.346956478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2426131285 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 142389930 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:27 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426131285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2426131285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3953275806 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 125666208 ps |
| CPU time | 2.07 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:35 AM UTC 24 |
| Peak memory | 227816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953275806 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.3953275806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2941989002 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 68443869 ps |
| CPU time | 0.85 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941989002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2941989002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2075056910 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 35658131 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075056910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.2075056910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.1487282058 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 111139517 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487282058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.1487282058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.917854650 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 101870811 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:35 AM UTC 24 |
| Peak memory | 227016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917854650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.917854650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.992295719 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 1192722387 ps |
| CPU time | 4.48 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:37 AM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=992295719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.992295719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2809455958 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 88996520 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:39 AM UTC 24 |
| Peak memory | 225140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809455958 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2809455958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1165073262 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 62728340 ps |
| CPU time | 0.84 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165073262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.1165073262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.2808705041 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 50373934 ps |
| CPU time | 0.68 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:34 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808705041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.2808705041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3162356612 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 111432969 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162356612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.3162356612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1736399782 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 198311748 ps |
| CPU time | 1.99 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:35 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736399782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1736399782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.264111088 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 1412037988 ps |
| CPU time | 4.66 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=264111088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.264111088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3059810727 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 89780705 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 226900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059810727 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.3059810727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.3528703435 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 92117682 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 214800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528703435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.3528703435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.435789131 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 56925621 ps |
| CPU time | 0.71 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:37 AM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435789131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.435789131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3287070679 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 190751151 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287070679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.3287070679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.3191339385 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 121080981 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:35 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191339385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.3191339385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.126045650 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 795178335 ps |
| CPU time | 4.25 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:41 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126045650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.126045650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1567839047 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 108313520 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 226900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567839047 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.1567839047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2989361745 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 57289547 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989361745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2989361745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3648992438 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 88309683 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:37 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648992438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3648992438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.2744938449 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 140136678 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744938449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.2744938449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.234566952 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 131489799 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234566952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.234566952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1600694146 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 928472364 ps |
| CPU time | 2.94 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:40 AM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600694146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.1600694146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1265581276 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 183816768 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:39 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265581276 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.1265581276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.2367873666 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 106842038 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367873666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.2367873666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.37671734 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 40317991 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:37 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37671734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.37671734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.281342352 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 79462070 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:38 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=281342352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.281342352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3071722347 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 315041753 ps |
| CPU time | 2.84 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:40 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071722347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3071722347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.2902550327 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 646165488 ps |
| CPU time | 3.69 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:40 AM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902550327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.2902550327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.3740271094 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 138218405 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 226964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740271094 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.3740271094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.1941985042 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 92493662 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:41 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941985042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.1941985042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.107060588 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 41243810 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:41 AM UTC 24 |
| Peak memory | 216356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107060588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.107060588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.568115570 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 128316433 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:41 AM UTC 24 |
| Peak memory | 216472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=568115570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.568115570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.529881866 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 200873068 ps |
| CPU time | 2.24 seconds |
| Started | Oct 15 01:09:32 AM UTC 24 |
| Finished | Oct 15 01:09:43 AM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529881866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.529881866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1909229715 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 543337032 ps |
| CPU time | 3.41 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:45 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909229715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1909229715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3966458963 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 142880619 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 226940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966458963 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.3966458963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3387220421 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 123147546 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387220421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3387220421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3916185133 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 46752641 ps |
| CPU time | 0.62 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:41 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916185133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.3916185133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.56760976 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 296962928 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56760976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.56760976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.4004239980 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 221618054 ps |
| CPU time | 2.24 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:43 AM UTC 24 |
| Peak memory | 234596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004239980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.4004239980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2652298480 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 664102367 ps |
| CPU time | 3.87 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:44 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652298480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2652298480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3452325533 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 99516678 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:43 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452325533 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.3452325533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3848346654 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 90855349 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848346654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.3848346654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.793783897 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 112993691 ps |
| CPU time | 0.73 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=793783897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.793783897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.167833222 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 165888902 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=167833222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.167833222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.550110203 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 131378286 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=550110203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.550110203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1386562105 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 893920796 ps |
| CPU time | 4.12 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:45 AM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386562105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1386562105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1497097008 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 119721108 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:43 AM UTC 24 |
| Peak memory | 227012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497097008 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.1497097008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1850587588 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 90777862 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:43 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850587588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1850587588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3255614264 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 40189945 ps |
| CPU time | 0.68 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255614264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3255614264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.2125861364 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 90344651 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:44 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125861364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.2125861364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.688674082 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 358733110 ps |
| CPU time | 3.13 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:44 AM UTC 24 |
| Peak memory | 234824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688674082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.688674082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.383983233 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 484231207 ps |
| CPU time | 3.53 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:45 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=383983233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.383983233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.1765277881 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 359275311 ps |
| CPU time | 3 seconds |
| Started | Oct 15 01:09:03 AM UTC 24 |
| Finished | Oct 15 01:09:15 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765277881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.1765277881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.776572282 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 720145855 ps |
| CPU time | 4.05 seconds |
| Started | Oct 15 01:09:02 AM UTC 24 |
| Finished | Oct 15 01:09:20 AM UTC 24 |
| Peak memory | 217616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=776572282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.776572282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2768110498 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 135170352 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:09:02 AM UTC 24 |
| Finished | Oct 15 01:09:17 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768110498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2768110498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2459977717 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 79144761 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:09:03 AM UTC 24 |
| Finished | Oct 15 01:09:13 AM UTC 24 |
| Peak memory | 225788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459977717 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2459977717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.648635833 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 77866427 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:09:02 AM UTC 24 |
| Finished | Oct 15 01:09:24 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648635833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.648635833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.502768878 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 45155720 ps |
| CPU time | 0.64 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:12 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=502768878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.502768878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.3742316207 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 62036511 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:09:02 AM UTC 24 |
| Finished | Oct 15 01:09:18 AM UTC 24 |
| Peak memory | 226712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742316207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.3742316207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3390692521 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 163216078 ps |
| CPU time | 3.4 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:14 AM UTC 24 |
| Peak memory | 217668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390692521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3390692521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.3551301259 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 85868840 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:09:03 AM UTC 24 |
| Finished | Oct 15 01:09:12 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551301259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.3551301259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.4249347741 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 102841852 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:09:00 AM UTC 24 |
| Finished | Oct 15 01:09:02 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249347741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.4249347741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2002490818 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 54195442 ps |
| CPU time | 0.64 seconds |
| Started | Oct 15 01:09:33 AM UTC 24 |
| Finished | Oct 15 01:09:42 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002490818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.2002490818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.486585074 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 56355237 ps |
| CPU time | 0.7 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:50 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486585074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.486585074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2197502405 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 93447913 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:50 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197502405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.2197502405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.4242413602 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 60739573 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:50 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242413602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.4242413602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.3967931067 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 49715982 ps |
| CPU time | 0.69 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967931067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.3967931067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.695261097 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 36251775 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 215272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=695261097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.695261097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3769917911 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 41217477 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769917911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.3769917911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.838749152 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 39085184 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838749152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.838749152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1414785313 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 39954590 ps |
| CPU time | 0.63 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414785313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1414785313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.44276244 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 369510706 ps |
| CPU time | 2.92 seconds |
| Started | Oct 15 01:09:08 AM UTC 24 |
| Finished | Oct 15 01:09:15 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44276244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.44276244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2923993593 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 420007113 ps |
| CPU time | 3.33 seconds |
| Started | Oct 15 01:09:08 AM UTC 24 |
| Finished | Oct 15 01:09:15 AM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923993593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2923993593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.3070715556 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 173296260 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:09:06 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070715556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.3070715556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.863786968 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 104168698 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:09:09 AM UTC 24 |
| Finished | Oct 15 01:09:12 AM UTC 24 |
| Peak memory | 228928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=863786968 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.863786968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.2182991661 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 62127272 ps |
| CPU time | 0.71 seconds |
| Started | Oct 15 01:09:07 AM UTC 24 |
| Finished | Oct 15 01:09:12 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182991661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.2182991661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1116291813 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 64041072 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:04 AM UTC 24 |
| Finished | Oct 15 01:09:06 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116291813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.1116291813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3370398191 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 108019456 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:09:05 AM UTC 24 |
| Finished | Oct 15 01:09:07 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370398191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.3370398191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.2919888610 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 233351773 ps |
| CPU time | 3.44 seconds |
| Started | Oct 15 01:09:04 AM UTC 24 |
| Finished | Oct 15 01:09:09 AM UTC 24 |
| Peak memory | 217668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919888610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.2919888610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1260663709 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 272128966 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:09:08 AM UTC 24 |
| Finished | Oct 15 01:09:13 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260663709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.1260663709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4229984675 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 289212009 ps |
| CPU time | 3.13 seconds |
| Started | Oct 15 01:09:03 AM UTC 24 |
| Finished | Oct 15 01:09:15 AM UTC 24 |
| Peak memory | 230896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229984675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.4229984675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3571559232 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 834117267 ps |
| CPU time | 2.62 seconds |
| Started | Oct 15 01:09:04 AM UTC 24 |
| Finished | Oct 15 01:09:08 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571559232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3571559232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2778839826 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 64876160 ps |
| CPU time | 0.7 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778839826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.2778839826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.830258709 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 37893353 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=830258709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.830258709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2205027949 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 48066207 ps |
| CPU time | 0.68 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205027949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2205027949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3682426810 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 33878605 ps |
| CPU time | 0.63 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682426810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.3682426810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1082367379 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 31199011 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082367379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1082367379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3147562793 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 59270566 ps |
| CPU time | 0.71 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147562793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3147562793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.7244571 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 53219820 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=7244571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_comm on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_ top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.7244571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3029813253 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 48805993 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029813253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3029813253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2804268784 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 68025443 ps |
| CPU time | 0.65 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804268784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.2804268784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1290897083 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 69641476 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290897083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.1290897083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.3034105860 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 167243505 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034105860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.3034105860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.459402700 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 249746040 ps |
| CPU time | 3.4 seconds |
| Started | Oct 15 01:09:15 AM UTC 24 |
| Finished | Oct 15 01:09:19 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=459402700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.459402700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.2656406463 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 89053320 ps |
| CPU time | 0.74 seconds |
| Started | Oct 15 01:09:14 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656406463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.2656406463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1735451553 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 74470581 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735451553 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.1735451553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.2664173558 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 45101869 ps |
| CPU time | 0.71 seconds |
| Started | Oct 15 01:09:14 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664173558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.2664173558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2499039384 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 85021568 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 01:09:12 AM UTC 24 |
| Finished | Oct 15 01:09:21 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499039384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2499039384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3050213072 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 122812249 ps |
| CPU time | 1.86 seconds |
| Started | Oct 15 01:09:13 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050213072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3050213072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2734685901 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 166591031 ps |
| CPU time | 3.44 seconds |
| Started | Oct 15 01:09:13 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 217664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734685901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.2734685901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.1911647577 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 297433271 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911647577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.1911647577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.2364240301 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 100649723 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:09:10 AM UTC 24 |
| Finished | Oct 15 01:09:12 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364240301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.2364240301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.2645357884 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 1142006312 ps |
| CPU time | 4.21 seconds |
| Started | Oct 15 01:09:12 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645357884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.2645357884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.4081201008 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 45664327 ps |
| CPU time | 0.64 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081201008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.4081201008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.1867228824 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 49134790 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867228824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.1867228824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.639503621 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 48290104 ps |
| CPU time | 0.64 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:51 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=639503621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.639503621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.606476555 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 44609623 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606476555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.606476555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2084035189 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 50492480 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084035189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2084035189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.860930364 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 79184541 ps |
| CPU time | 0.77 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:52 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860930364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.860930364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4256669897 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 93204867 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:53 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256669897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.4256669897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2440969739 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 76053994 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:09:53 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440969739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.2440969739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.663228817 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 57119747 ps |
| CPU time | 0.62 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:10:00 AM UTC 24 |
| Peak memory | 218740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=663228817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.663228817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.3703370998 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 46914754 ps |
| CPU time | 0.7 seconds |
| Started | Oct 15 01:09:49 AM UTC 24 |
| Finished | Oct 15 01:10:00 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703370998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.3703370998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1353002705 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 93341310 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:09:18 AM UTC 24 |
| Finished | Oct 15 01:09:24 AM UTC 24 |
| Peak memory | 226936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353002705 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.1353002705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.1280943521 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 80148825 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:09:17 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280943521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.1280943521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.3765304686 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 52114194 ps |
| CPU time | 0.67 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765304686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.3765304686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2778427895 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 156982916 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:09:17 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778427895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.2778427895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.1887814478 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 226945292 ps |
| CPU time | 2.1 seconds |
| Started | Oct 15 01:09:16 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 217616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887814478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.1887814478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3672526789 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 146023789 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:09:19 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672526789 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.3672526789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.450059259 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 77939703 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:09:19 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450059259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.450059259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.1506088234 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 86866160 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:09:19 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506088234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.1506088234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2316839408 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 61171407 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:09:19 AM UTC 24 |
| Finished | Oct 15 01:09:22 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316839408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2316839408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.2320898104 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 898931742 ps |
| CPU time | 4.65 seconds |
| Started | Oct 15 01:09:18 AM UTC 24 |
| Finished | Oct 15 01:09:27 AM UTC 24 |
| Peak memory | 217664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320898104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.2320898104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.941901960 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 90642644 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:09:22 AM UTC 24 |
| Finished | Oct 15 01:09:24 AM UTC 24 |
| Peak memory | 228928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=941901960 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.941901960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.3648633678 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 50485935 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:09:21 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648633678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.3648633678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1090812755 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 199389584 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:09:21 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090812755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.1090812755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.2437053633 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 185572668 ps |
| CPU time | 2.23 seconds |
| Started | Oct 15 01:09:20 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 234704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437053633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.2437053633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1738018400 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 480632799 ps |
| CPU time | 2.36 seconds |
| Started | Oct 15 01:09:20 AM UTC 24 |
| Finished | Oct 15 01:09:23 AM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738018400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.1738018400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3323057490 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 202143575 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:27 AM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323057490 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.3323057490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.2256066004 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 53633591 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256066004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.2256066004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.3050781715 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 43861312 ps |
| CPU time | 0.63 seconds |
| Started | Oct 15 01:09:22 AM UTC 24 |
| Finished | Oct 15 01:09:24 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050781715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.3050781715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.4105576862 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 120740661 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105576862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.4105576862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.1431813154 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 93775323 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 01:09:22 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431813154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.1431813154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3988388649 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 900350241 ps |
| CPU time | 4.55 seconds |
| Started | Oct 15 01:09:22 AM UTC 24 |
| Finished | Oct 15 01:09:28 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988388649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.3988388649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2061792171 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 73645093 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061792171 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2061792171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.723098332 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 48965376 ps |
| CPU time | 0.74 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723098332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.723098332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3158440306 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 128401804 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158440306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.3158440306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.4253819406 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 124671890 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253819406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.4253819406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.901984072 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 97949515 ps |
| CPU time | 2.35 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:27 AM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901984072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.901984072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.472509623 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 794630017 ps |
| CPU time | 4 seconds |
| Started | Oct 15 01:09:24 AM UTC 24 |
| Finished | Oct 15 01:09:29 AM UTC 24 |
| Peak memory | 217560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=472509623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.472509623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.3080129528 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 29511515028 ps |
| CPU time | 80.79 seconds |
| Started | Oct 15 12:49:04 AM UTC 24 |
| Finished | Oct 15 12:50:26 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080129528 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.3080129528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.874662220 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 200999895 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:49:04 AM UTC 24 |
| Finished | Oct 15 12:49:06 AM UTC 24 |
| Peak memory | 218424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874662220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_buffer.874662220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.985136203 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 499076349 ps |
| CPU time | 3.05 seconds |
| Started | Oct 15 12:49:09 AM UTC 24 |
| Finished | Oct 15 12:49:13 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985136203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.985136203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1107048068 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 3412350219 ps |
| CPU time | 42.18 seconds |
| Started | Oct 15 12:49:10 AM UTC 24 |
| Finished | Oct 15 12:49:54 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107048068 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.1107048068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_enable.3616846360 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 37790524 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:49:14 AM UTC 24 |
| Finished | Oct 15 12:49:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616846360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.3616846360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.441439802 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 886036921 ps |
| CPU time | 4.55 seconds |
| Started | Oct 15 12:49:16 AM UTC 24 |
| Finished | Oct 15 12:49:21 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=441439802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.441439802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.3132317413 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 270331114 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 12:49:16 AM UTC 24 |
| Finished | Oct 15 12:49:19 AM UTC 24 |
| Peak memory | 216608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132317413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.3132317413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.382282072 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 247302614 ps |
| CPU time | 1.78 seconds |
| Started | Oct 15 12:49:16 AM UTC 24 |
| Finished | Oct 15 12:49:19 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382282072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_fifo_levels.382282072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.1885597060 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 176645559 ps |
| CPU time | 2.96 seconds |
| Started | Oct 15 12:49:17 AM UTC 24 |
| Finished | Oct 15 12:49:21 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885597060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.1885597060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.2888210659 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 117186004060 ps |
| CPU time | 249.37 seconds |
| Started | Oct 15 12:49:19 AM UTC 24 |
| Finished | Oct 15 12:53:32 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888210659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.2888210659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.3631605880 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 91135790689 ps |
| CPU time | 182.61 seconds |
| Started | Oct 15 12:49:19 AM UTC 24 |
| Finished | Oct 15 12:52:25 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3631605880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.3631605880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.3918808071 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 110074222256 ps |
| CPU time | 233.75 seconds |
| Started | Oct 15 12:49:21 AM UTC 24 |
| Finished | Oct 15 12:53:19 AM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3918808071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.3918808071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.2976765157 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 91160121249 ps |
| CPU time | 167.03 seconds |
| Started | Oct 15 12:49:23 AM UTC 24 |
| Finished | Oct 15 12:52:12 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976765157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.2976765157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.841396954 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 184513829 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 12:49:31 AM UTC 24 |
| Finished | Oct 15 12:49:34 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=841396954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.841396954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.2576974177 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 147143173 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:49:35 AM UTC 24 |
| Finished | Oct 15 12:49:38 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576974177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.2576974177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2231471765 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 224907102 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:49:36 AM UTC 24 |
| Finished | Oct 15 12:49:39 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231471765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.2231471765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.1202508607 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 7503188564 ps |
| CPU time | 66.3 seconds |
| Started | Oct 15 12:49:37 AM UTC 24 |
| Finished | Oct 15 12:50:45 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202508607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.1202508607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.1234201398 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 241098861 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:49:38 AM UTC 24 |
| Finished | Oct 15 12:49:41 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234201398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.1234201398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3840540511 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 439753110 ps |
| CPU time | 2.31 seconds |
| Started | Oct 15 12:49:39 AM UTC 24 |
| Finished | Oct 15 12:49:43 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840540511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3840540511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.180491211 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 9525945838 ps |
| CPU time | 27.83 seconds |
| Started | Oct 15 12:49:41 AM UTC 24 |
| Finished | Oct 15 12:50:10 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180491211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.180491211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1745749743 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 254188860 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:49:43 AM UTC 24 |
| Finished | Oct 15 12:49:46 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745749743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.1745749743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.3235268458 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 207356142 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:49:43 AM UTC 24 |
| Finished | Oct 15 12:49:46 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235268458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.3235268458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.2051398056 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 2548412796 ps |
| CPU time | 32.92 seconds |
| Started | Oct 15 12:49:43 AM UTC 24 |
| Finished | Oct 15 12:50:18 AM UTC 24 |
| Peak memory | 236012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051398056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.2051398056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.358815011 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 2974613516 ps |
| CPU time | 86.14 seconds |
| Started | Oct 15 12:49:44 AM UTC 24 |
| Finished | Oct 15 12:51:13 AM UTC 24 |
| Peak memory | 229344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=358815011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.358815011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.425604549 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 1770368213 ps |
| CPU time | 50.2 seconds |
| Started | Oct 15 12:49:46 AM UTC 24 |
| Finished | Oct 15 12:50:38 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425604549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.425604549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3042409905 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 202217584 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:49:46 AM UTC 24 |
| Finished | Oct 15 12:49:49 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042409905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3042409905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3528191992 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 172743206 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:49:49 AM UTC 24 |
| Finished | Oct 15 12:49:51 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528191992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3528191992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.2042088262 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 453304478 ps |
| CPU time | 2.52 seconds |
| Started | Oct 15 12:49:50 AM UTC 24 |
| Finished | Oct 15 12:49:53 AM UTC 24 |
| Peak memory | 218932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042088262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.2042088262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.4170628916 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 173710326 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:49:52 AM UTC 24 |
| Finished | Oct 15 12:49:54 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170628916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.4170628916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.196368995 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 175320172 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:49:53 AM UTC 24 |
| Finished | Oct 15 12:49:55 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196368995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_out_stall.196368995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.3034179717 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 173972437 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:49:54 AM UTC 24 |
| Finished | Oct 15 12:49:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034179717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.3034179717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.1787416944 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 177015517 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:49:55 AM UTC 24 |
| Finished | Oct 15 12:49:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787416944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.1787416944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.31915244 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 188050254 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:49:55 AM UTC 24 |
| Finished | Oct 15 12:49:58 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31915244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_bi t_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.31915244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.1508757853 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 196810360 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:49:56 AM UTC 24 |
| Finished | Oct 15 12:49:59 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508757853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.1508757853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.3191224397 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 212983244 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:49:56 AM UTC 24 |
| Finished | Oct 15 12:49:59 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191224397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.3191224397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.2376444408 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 236926318 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 12:49:57 AM UTC 24 |
| Finished | Oct 15 12:50:00 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376444408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.2376444408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.3822835293 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 223945011 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:49:59 AM UTC 24 |
| Finished | Oct 15 12:50:01 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822835293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.3822835293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2031686951 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 59224429 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:50:00 AM UTC 24 |
| Finished | Oct 15 12:50:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031686951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2031686951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2681413597 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 9952081988 ps |
| CPU time | 39.66 seconds |
| Started | Oct 15 12:50:00 AM UTC 24 |
| Finished | Oct 15 12:50:41 AM UTC 24 |
| Peak memory | 229492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681413597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.2681413597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.3375323285 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 204291415 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:50:02 AM UTC 24 |
| Finished | Oct 15 12:50:05 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375323285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.3375323285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2434435592 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 11127297685 ps |
| CPU time | 82.43 seconds |
| Started | Oct 15 12:50:03 AM UTC 24 |
| Finished | Oct 15 12:51:27 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434435592 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.2434435592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.1793377974 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 1911651369 ps |
| CPU time | 19.68 seconds |
| Started | Oct 15 12:50:04 AM UTC 24 |
| Finished | Oct 15 12:50:25 AM UTC 24 |
| Peak memory | 229196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793377974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.1793377974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.627221107 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 6069341318 ps |
| CPU time | 28.16 seconds |
| Started | Oct 15 12:50:05 AM UTC 24 |
| Finished | Oct 15 12:50:35 AM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627221107 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.627221107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.4144935383 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 212757524 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:50:03 AM UTC 24 |
| Finished | Oct 15 12:50:06 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144935383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.4144935383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.12717226 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 163771412 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:50:03 AM UTC 24 |
| Finished | Oct 15 12:50:05 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12717226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.12717226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.600604554 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 20172444336 ps |
| CPU time | 31.72 seconds |
| Started | Oct 15 12:50:06 AM UTC 24 |
| Finished | Oct 15 12:50:39 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600604554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_resume_link_active.600604554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3917603514 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 206971680 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 12:50:11 AM UTC 24 |
| Finished | Oct 15 12:50:14 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917603514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3917603514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.552926448 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 172223082 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:50:11 AM UTC 24 |
| Finished | Oct 15 12:50:13 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552926448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_setup_stage.552926448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.2066690990 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 191767524 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:50:11 AM UTC 24 |
| Finished | Oct 15 12:50:14 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066690990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.2066690990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3736960377 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 231519209 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:50:13 AM UTC 24 |
| Finished | Oct 15 12:50:15 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736960377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.3736960377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1829557889 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 2285538964 ps |
| CPU time | 59.32 seconds |
| Started | Oct 15 12:50:13 AM UTC 24 |
| Finished | Oct 15 12:51:14 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829557889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1829557889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3579952999 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 200847885 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:50:14 AM UTC 24 |
| Finished | Oct 15 12:50:17 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579952999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3579952999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.2085179697 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 254182931 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 12:50:15 AM UTC 24 |
| Finished | Oct 15 12:50:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085179697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.2085179697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.1302710357 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 2221853666 ps |
| CPU time | 57.62 seconds |
| Started | Oct 15 12:50:14 AM UTC 24 |
| Finished | Oct 15 12:51:14 AM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302710357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.1302710357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.1110652522 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 1061805588 ps |
| CPU time | 29.13 seconds |
| Started | Oct 15 12:49:11 AM UTC 24 |
| Finished | Oct 15 12:49:42 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110652522 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.1110652522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.1706844641 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 458734142 ps |
| CPU time | 2.43 seconds |
| Started | Oct 15 12:50:17 AM UTC 24 |
| Finished | Oct 15 12:50:20 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1706844641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.1706844641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1989410809 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 86052586 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 12:51:04 AM UTC 24 |
| Finished | Oct 15 12:51:05 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989410809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.1989410809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2062741338 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5299021711 ps |
| CPU time | 8.58 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:50:28 AM UTC 24 |
| Peak memory | 229256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062741338 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.2062741338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1719656436 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 16401298070 ps |
| CPU time | 46.7 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:51:07 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719656436 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1719656436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.2878238589 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 25059885956 ps |
| CPU time | 53.81 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:51:14 AM UTC 24 |
| Peak memory | 229256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2878238589 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.2878238589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.380642245 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 154973815 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:50:18 AM UTC 24 |
| Finished | Oct 15 12:50:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380642245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_buffer.380642245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.2859051646 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 149535022 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:50:21 AM UTC 24 |
| Finished | Oct 15 12:50:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859051646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.2859051646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3209868566 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 155643989 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:50:21 AM UTC 24 |
| Finished | Oct 15 12:50:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209868566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.3209868566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3592399961 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 194511772 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:50:21 AM UTC 24 |
| Finished | Oct 15 12:50:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592399961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3592399961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1334365484 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 22193204421 ps |
| CPU time | 66.74 seconds |
| Started | Oct 15 12:50:22 AM UTC 24 |
| Finished | Oct 15 12:51:30 AM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334365484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1334365484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3644022094 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 983471646 ps |
| CPU time | 28.45 seconds |
| Started | Oct 15 12:50:22 AM UTC 24 |
| Finished | Oct 15 12:50:52 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644022094 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3644022094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.3321511221 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 722853385 ps |
| CPU time | 2.59 seconds |
| Started | Oct 15 12:50:23 AM UTC 24 |
| Finished | Oct 15 12:50:27 AM UTC 24 |
| Peak memory | 218820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321511221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.3321511221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1348702541 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 135043468 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:50:24 AM UTC 24 |
| Finished | Oct 15 12:50:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348702541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.1348702541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3195917427 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 31708223 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:50:24 AM UTC 24 |
| Finished | Oct 15 12:50:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195917427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3195917427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3810864295 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 960364159 ps |
| CPU time | 5.15 seconds |
| Started | Oct 15 12:50:25 AM UTC 24 |
| Finished | Oct 15 12:50:31 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810864295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.3810864295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.584953754 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 315680273 ps |
| CPU time | 2.68 seconds |
| Started | Oct 15 12:50:26 AM UTC 24 |
| Finished | Oct 15 12:50:30 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=584953754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.584953754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2559396546 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 120204393614 ps |
| CPU time | 251.88 seconds |
| Started | Oct 15 12:50:27 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559396546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2559396546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.2191652151 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 90178394029 ps |
| CPU time | 161.29 seconds |
| Started | Oct 15 12:50:27 AM UTC 24 |
| Finished | Oct 15 12:53:11 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2191652151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.2191652151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.335802350 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 114098322910 ps |
| CPU time | 204.67 seconds |
| Started | Oct 15 12:50:28 AM UTC 24 |
| Finished | Oct 15 12:53:56 AM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=335802350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.335802350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.21259946 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 117147179867 ps |
| CPU time | 241.6 seconds |
| Started | Oct 15 12:50:28 AM UTC 24 |
| Finished | Oct 15 12:54:33 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=21259946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_n ame 1.usbdev_freq_loclk_max.21259946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.3486428739 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 82201310720 ps |
| CPU time | 169.33 seconds |
| Started | Oct 15 12:50:29 AM UTC 24 |
| Finished | Oct 15 12:53:21 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486428739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.3486428739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.90802111 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 229293022 ps |
| CPU time | 2.01 seconds |
| Started | Oct 15 12:50:30 AM UTC 24 |
| Finished | Oct 15 12:50:33 AM UTC 24 |
| Peak memory | 227212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90802111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.90802111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.77273290 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 141610352 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:50:31 AM UTC 24 |
| Finished | Oct 15 12:50:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=77273290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_in_stall.77273290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.3803098333 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 245247935 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:50:32 AM UTC 24 |
| Finished | Oct 15 12:50:34 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803098333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.3803098333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3808890566 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 4525800934 ps |
| CPU time | 125.4 seconds |
| Started | Oct 15 12:50:29 AM UTC 24 |
| Finished | Oct 15 12:52:37 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808890566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3808890566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2659691187 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 11720699128 ps |
| CPU time | 148.97 seconds |
| Started | Oct 15 12:50:32 AM UTC 24 |
| Finished | Oct 15 12:53:03 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659691187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2659691187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.1786292700 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 248241842 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:50:34 AM UTC 24 |
| Finished | Oct 15 12:50:36 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786292700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.1786292700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.3751350410 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 28089686650 ps |
| CPU time | 59.8 seconds |
| Started | Oct 15 12:50:34 AM UTC 24 |
| Finished | Oct 15 12:51:35 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751350410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.3751350410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.995234367 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 5548413698 ps |
| CPU time | 12.71 seconds |
| Started | Oct 15 12:50:34 AM UTC 24 |
| Finished | Oct 15 12:50:48 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=995234367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_suspend.995234367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2284775206 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 3832533769 ps |
| CPU time | 101.11 seconds |
| Started | Oct 15 12:50:35 AM UTC 24 |
| Finished | Oct 15 12:52:18 AM UTC 24 |
| Peak memory | 236076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284775206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2284775206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1355619254 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 1726300815 ps |
| CPU time | 22.62 seconds |
| Started | Oct 15 12:50:35 AM UTC 24 |
| Finished | Oct 15 12:50:59 AM UTC 24 |
| Peak memory | 235864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355619254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1355619254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3022630627 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 239436514 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:50:36 AM UTC 24 |
| Finished | Oct 15 12:50:39 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022630627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.3022630627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.3929105540 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 204338679 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:50:37 AM UTC 24 |
| Finished | Oct 15 12:50:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929105540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.3929105540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3399062321 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 2311309320 ps |
| CPU time | 18.9 seconds |
| Started | Oct 15 12:50:39 AM UTC 24 |
| Finished | Oct 15 12:50:59 AM UTC 24 |
| Peak memory | 236096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399062321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.3399062321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.18552195 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 3538086042 ps |
| CPU time | 96.72 seconds |
| Started | Oct 15 12:50:40 AM UTC 24 |
| Finished | Oct 15 12:52:18 AM UTC 24 |
| Peak memory | 235868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18552195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.18552195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.329185502 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 2742079027 ps |
| CPU time | 77.04 seconds |
| Started | Oct 15 12:50:40 AM UTC 24 |
| Finished | Oct 15 12:51:59 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=329185502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.329185502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.1494297034 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 158225560 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:50:40 AM UTC 24 |
| Finished | Oct 15 12:50:42 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494297034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.1494297034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2489074908 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 141805663 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:50:41 AM UTC 24 |
| Finished | Oct 15 12:50:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489074908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.2489074908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.1569113494 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 191489569 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:50:42 AM UTC 24 |
| Finished | Oct 15 12:50:45 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569113494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.1569113494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.3214807277 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 187854864 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:50:43 AM UTC 24 |
| Finished | Oct 15 12:50:46 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214807277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.3214807277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3938687689 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 175226172 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:50:45 AM UTC 24 |
| Finished | Oct 15 12:50:47 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938687689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.3938687689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.2690655920 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 152957023 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:50:45 AM UTC 24 |
| Finished | Oct 15 12:50:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2690655920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.2690655920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2668900392 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 263786445 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:50:46 AM UTC 24 |
| Finished | Oct 15 12:50:48 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668900392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2668900392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.3712351874 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 222211620 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:50:46 AM UTC 24 |
| Finished | Oct 15 12:50:48 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712351874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.3712351874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.1879772013 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 136491097 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:50:47 AM UTC 24 |
| Finished | Oct 15 12:50:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879772013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.1879772013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.23096215 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 37772610 ps |
| CPU time | 1 seconds |
| Started | Oct 15 12:50:47 AM UTC 24 |
| Finished | Oct 15 12:50:49 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23096215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_phy_pins_sense.23096215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.4110554031 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 13380168225 ps |
| CPU time | 34.51 seconds |
| Started | Oct 15 12:50:48 AM UTC 24 |
| Finished | Oct 15 12:51:24 AM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110554031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.4110554031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.1613134132 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 155322109 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:50:48 AM UTC 24 |
| Finished | Oct 15 12:50:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613134132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.1613134132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2693464933 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 198143394 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:50:49 AM UTC 24 |
| Finished | Oct 15 12:50:52 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693464933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2693464933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.3744292865 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 4040925258 ps |
| CPU time | 40.68 seconds |
| Started | Oct 15 12:50:49 AM UTC 24 |
| Finished | Oct 15 12:51:32 AM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744292865 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.3744292865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.2996404996 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 2859009538 ps |
| CPU time | 84.12 seconds |
| Started | Oct 15 12:50:51 AM UTC 24 |
| Finished | Oct 15 12:52:17 AM UTC 24 |
| Peak memory | 231408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996404996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.2996404996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.1893002926 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 10285456145 ps |
| CPU time | 67.97 seconds |
| Started | Oct 15 12:50:52 AM UTC 24 |
| Finished | Oct 15 12:52:01 AM UTC 24 |
| Peak memory | 231556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893002926 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.1893002926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.588950266 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 187425256 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:50:49 AM UTC 24 |
| Finished | Oct 15 12:50:52 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588950266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_random_length_in_transaction.588950266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.3390890812 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 164689231 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:50:49 AM UTC 24 |
| Finished | Oct 15 12:50:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390890812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.3390890812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.4231860705 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 20183775293 ps |
| CPU time | 29.4 seconds |
| Started | Oct 15 12:50:53 AM UTC 24 |
| Finished | Oct 15 12:51:24 AM UTC 24 |
| Peak memory | 218772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231860705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.4231860705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1577133271 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 165122410 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:50:53 AM UTC 24 |
| Finished | Oct 15 12:50:56 AM UTC 24 |
| Peak memory | 216648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577133271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.1577133271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2486558739 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 227074193 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:50:53 AM UTC 24 |
| Finished | Oct 15 12:50:55 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486558739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.2486558739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.723912932 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 234540470 ps |
| CPU time | 1.82 seconds |
| Started | Oct 15 12:51:03 AM UTC 24 |
| Finished | Oct 15 12:51:06 AM UTC 24 |
| Peak memory | 251928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723912932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.723912932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.1367014809 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 398402155 ps |
| CPU time | 2.48 seconds |
| Started | Oct 15 12:50:54 AM UTC 24 |
| Finished | Oct 15 12:50:58 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367014809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.1367014809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2113313557 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 350661006 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 12:50:54 AM UTC 24 |
| Finished | Oct 15 12:50:57 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113313557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2113313557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.2417073516 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 145091699 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:50:56 AM UTC 24 |
| Finished | Oct 15 12:50:59 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417073516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.2417073516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.2575583216 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 168750798 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:50:56 AM UTC 24 |
| Finished | Oct 15 12:50:59 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575583216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.2575583216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.48164766 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 207181210 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:50:57 AM UTC 24 |
| Finished | Oct 15 12:51:01 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48164766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 1.usbdev_smoke.48164766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1305613436 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 1680952024 ps |
| CPU time | 21.7 seconds |
| Started | Oct 15 12:50:59 AM UTC 24 |
| Finished | Oct 15 12:51:22 AM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305613436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1305613436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.1939713647 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 176834359 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:50:59 AM UTC 24 |
| Finished | Oct 15 12:51:01 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939713647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.1939713647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3673618126 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 164583943 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 12:51:00 AM UTC 24 |
| Finished | Oct 15 12:51:02 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673618126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3673618126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.1928241260 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 927650013 ps |
| CPU time | 3.35 seconds |
| Started | Oct 15 12:51:00 AM UTC 24 |
| Finished | Oct 15 12:51:05 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928241260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.1928241260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.76750795 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 2560958966 ps |
| CPU time | 26.23 seconds |
| Started | Oct 15 12:51:00 AM UTC 24 |
| Finished | Oct 15 12:51:28 AM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76750795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_streaming_out.76750795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.4010932493 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 3397475767 ps |
| CPU time | 30.45 seconds |
| Started | Oct 15 12:51:01 AM UTC 24 |
| Finished | Oct 15 12:51:33 AM UTC 24 |
| Peak memory | 235872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010932493 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.4010932493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.3365350934 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 1911612935 ps |
| CPU time | 17.05 seconds |
| Started | Oct 15 12:50:23 AM UTC 24 |
| Finished | Oct 15 12:50:41 AM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365350934 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.3365350934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.4282143664 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 557003335 ps |
| CPU time | 2.42 seconds |
| Started | Oct 15 12:51:02 AM UTC 24 |
| Finished | Oct 15 12:51:06 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4282143664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.4282143664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.337799319 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 45537763 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:56:04 AM UTC 24 |
| Finished | Oct 15 12:56:06 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=337799319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.337799319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.2121585295 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 10337720749 ps |
| CPU time | 20.54 seconds |
| Started | Oct 15 12:55:40 AM UTC 24 |
| Finished | Oct 15 12:56:02 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121585295 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.2121585295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.141046944 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 16253776547 ps |
| CPU time | 24.81 seconds |
| Started | Oct 15 12:55:40 AM UTC 24 |
| Finished | Oct 15 12:56:06 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=141046944 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.141046944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.1608930371 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 29327474170 ps |
| CPU time | 53.22 seconds |
| Started | Oct 15 12:55:40 AM UTC 24 |
| Finished | Oct 15 12:56:35 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608930371 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.1608930371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.794888712 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 154145229 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:55:40 AM UTC 24 |
| Finished | Oct 15 12:55:43 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794888712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_av_buffer.794888712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.1377419512 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 160357391 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:55:40 AM UTC 24 |
| Finished | Oct 15 12:55:43 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377419512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.1377419512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.3430836351 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 419909349 ps |
| CPU time | 2.63 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:46 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430836351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.3430836351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.838962052 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 40427864135 ps |
| CPU time | 76.78 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838962052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_device_address.838962052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.1415190430 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 813445073 ps |
| CPU time | 6.66 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:50 AM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415190430 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1415190430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.3405762550 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 498248349 ps |
| CPU time | 2.61 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:46 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405762550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.3405762550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.1723696862 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 140645427 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:44 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723696862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.1723696862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_enable.924667917 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 40647997 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:55:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924667917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_enable.924667917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1888136929 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 847978040 ps |
| CPU time | 3.01 seconds |
| Started | Oct 15 12:55:43 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888136929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1888136929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.1362280632 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 479991469 ps |
| CPU time | 4.42 seconds |
| Started | Oct 15 12:55:45 AM UTC 24 |
| Finished | Oct 15 12:55:50 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362280632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.1362280632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.951659911 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 191648501 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:55:45 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951659911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.951659911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.2003480976 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 144262015 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:46 AM UTC 24 |
| Finished | Oct 15 12:55:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003480976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.2003480976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.3127591566 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 165476563 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:55:46 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127591566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.3127591566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.3584507924 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 2917539626 ps |
| CPU time | 80.19 seconds |
| Started | Oct 15 12:55:45 AM UTC 24 |
| Finished | Oct 15 12:57:07 AM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584507924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.3584507924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.154553677 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 10404595642 ps |
| CPU time | 73.19 seconds |
| Started | Oct 15 12:55:47 AM UTC 24 |
| Finished | Oct 15 12:57:02 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154553677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.154553677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.3632825821 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 202923420 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:55:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632825821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.3632825821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.923536215 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 23616023421 ps |
| CPU time | 42.44 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:56:33 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923536215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_link_resume.923536215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.3778473196 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 6257478188 ps |
| CPU time | 17.03 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:56:07 AM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778473196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.3778473196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.2365637861 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 4281222739 ps |
| CPU time | 43 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:56:34 AM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365637861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.2365637861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.189071526 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 1745522979 ps |
| CPU time | 16.94 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:56:07 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189071526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.189071526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.488043556 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 256583053 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:55:49 AM UTC 24 |
| Finished | Oct 15 12:55:52 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488043556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.488043556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.3195333500 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 229777461 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:55:51 AM UTC 24 |
| Finished | Oct 15 12:55:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195333500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.3195333500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.516211423 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 2618954198 ps |
| CPU time | 73.48 seconds |
| Started | Oct 15 12:55:51 AM UTC 24 |
| Finished | Oct 15 12:57:06 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=516211423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.516211423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.1779586572 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 2342261377 ps |
| CPU time | 63.42 seconds |
| Started | Oct 15 12:55:51 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779586572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.1779586572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.2760081062 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 2121817134 ps |
| CPU time | 15.16 seconds |
| Started | Oct 15 12:55:52 AM UTC 24 |
| Finished | Oct 15 12:56:08 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760081062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.2760081062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.2411290541 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 159287722 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:55:53 AM UTC 24 |
| Finished | Oct 15 12:55:55 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411290541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.2411290541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.2991958073 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 158097358 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:55:53 AM UTC 24 |
| Finished | Oct 15 12:55:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991958073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.2991958073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.2403072371 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 226204285 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:55:55 AM UTC 24 |
| Finished | Oct 15 12:55:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403072371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.2403072371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.1390135962 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 162321664 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:55:55 AM UTC 24 |
| Finished | Oct 15 12:55:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390135962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.1390135962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.1458981832 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 164151537 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 12:55:57 AM UTC 24 |
| Finished | Oct 15 12:55:59 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458981832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.1458981832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2559277251 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 214129282 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:55:57 AM UTC 24 |
| Finished | Oct 15 12:55:59 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559277251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2559277251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.3144129418 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 133896641 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:55:57 AM UTC 24 |
| Finished | Oct 15 12:55:59 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144129418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.3144129418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.3917711801 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 36291399 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917711801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.3917711801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.3088002261 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 10405910151 ps |
| CPU time | 28.35 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:28 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088002261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.3088002261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.1109319607 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 194570903 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109319607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.1109319607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.437155974 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 175008347 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=437155974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_pkt_sent.437155974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.1810026604 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 232647483 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810026604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.1810026604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.1719751809 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 168053200 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719751809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1719751809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.231332827 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 20175407885 ps |
| CPU time | 28.55 seconds |
| Started | Oct 15 12:55:59 AM UTC 24 |
| Finished | Oct 15 12:56:29 AM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231332827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_resume_link_active.231332827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.2788081669 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 135091352 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:56:00 AM UTC 24 |
| Finished | Oct 15 12:56:03 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788081669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.2788081669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.1369272883 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 235499770 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:56:00 AM UTC 24 |
| Finished | Oct 15 12:56:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369272883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.1369272883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.973242494 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 165963352 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:56:00 AM UTC 24 |
| Finished | Oct 15 12:56:03 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973242494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_setup_stage.973242494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.2515818352 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 157178936 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:56:01 AM UTC 24 |
| Finished | Oct 15 12:56:03 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515818352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.2515818352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.1908198153 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 255171562 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908198153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.1908198153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.2600061317 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 2324936673 ps |
| CPU time | 65.16 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:57:09 AM UTC 24 |
| Peak memory | 235996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600061317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.2600061317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.1647518001 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 204009505 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647518001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.1647518001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.2968369073 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 220175368 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:05 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968369073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.2968369073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3829825185 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 967780243 ps |
| CPU time | 2.77 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:06 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829825185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3829825185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1609047480 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 2409245050 ps |
| CPU time | 26.25 seconds |
| Started | Oct 15 12:56:02 AM UTC 24 |
| Finished | Oct 15 12:56:30 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609047480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1609047480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.2846415992 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 1815991102 ps |
| CPU time | 43.3 seconds |
| Started | Oct 15 12:55:42 AM UTC 24 |
| Finished | Oct 15 12:56:27 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846415992 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.2846415992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.2647595873 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 307057784 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:06:33 AM UTC 24 |
| Finished | Oct 15 01:06:39 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647595873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.2647595873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.1663096300 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 222960009 ps |
| CPU time | 0.84 seconds |
| Started | Oct 15 01:06:36 AM UTC 24 |
| Finished | Oct 15 01:06:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663096300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.1663096300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.545819814 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 539949895 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:06:36 AM UTC 24 |
| Finished | Oct 15 01:06:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=545819814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_t x_rx_disruption.545819814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1737346144 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 205508465 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:06:38 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737346144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1737346144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2113526553 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 466900495 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2113526553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2113526553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.192558341 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 377290868 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192558341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.192558341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.379897710 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 282049521 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:42 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379897710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 102.usbdev_fifo_levels.379897710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1638595270 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 542267542 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1638595270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.1638595270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.4004547576 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 530179608 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4004547576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.4004547576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2944721771 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 192088759 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:06:39 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944721771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2944721771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2857127729 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 485415084 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:06:40 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2857127729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.2857127729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.1194277278 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 432981545 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:06:42 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1194277278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.1194277278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.328819462 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 495154347 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:43 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=328819462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_t x_rx_disruption.328819462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3380724316 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 573341855 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:06:44 AM UTC 24 |
| Finished | Oct 15 01:06:48 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3380724316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3380724316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3251832377 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 180100179 ps |
| CPU time | 0.84 seconds |
| Started | Oct 15 01:06:44 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251832377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3251832377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.1750800598 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 163456953 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:06:44 AM UTC 24 |
| Finished | Oct 15 01:06:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750800598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.1750800598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.4154655858 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 484381913 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:06:44 AM UTC 24 |
| Finished | Oct 15 01:06:48 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4154655858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.4154655858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.557696159 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 507722571 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:06:47 AM UTC 24 |
| Finished | Oct 15 01:06:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=557696159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_t x_rx_disruption.557696159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.1168059400 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 47037637 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:56:24 AM UTC 24 |
| Finished | Oct 15 12:56:26 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168059400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.1168059400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3628477082 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 11348704556 ps |
| CPU time | 18.26 seconds |
| Started | Oct 15 12:56:04 AM UTC 24 |
| Finished | Oct 15 12:56:23 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628477082 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3628477082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.2490846040 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 15987986053 ps |
| CPU time | 29.39 seconds |
| Started | Oct 15 12:56:04 AM UTC 24 |
| Finished | Oct 15 12:56:35 AM UTC 24 |
| Peak memory | 229220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490846040 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.2490846040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.4108325384 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 26134037206 ps |
| CPU time | 41.16 seconds |
| Started | Oct 15 12:56:04 AM UTC 24 |
| Finished | Oct 15 12:56:47 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108325384 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.4108325384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3472724239 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 151164673 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:56:04 AM UTC 24 |
| Finished | Oct 15 12:56:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472724239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3472724239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.2778132532 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 159811768 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:56:06 AM UTC 24 |
| Finished | Oct 15 12:56:08 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778132532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.2778132532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.1473228982 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 509550871 ps |
| CPU time | 2.09 seconds |
| Started | Oct 15 12:56:06 AM UTC 24 |
| Finished | Oct 15 12:56:09 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473228982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.1473228982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.853958701 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 1153788074 ps |
| CPU time | 5.07 seconds |
| Started | Oct 15 12:56:06 AM UTC 24 |
| Finished | Oct 15 12:56:12 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=853958701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.853958701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.280122449 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 41835256517 ps |
| CPU time | 89.26 seconds |
| Started | Oct 15 12:56:06 AM UTC 24 |
| Finished | Oct 15 12:57:37 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280122449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_device_address.280122449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.2080159197 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 1563073879 ps |
| CPU time | 34.63 seconds |
| Started | Oct 15 12:56:06 AM UTC 24 |
| Finished | Oct 15 12:56:42 AM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080159197 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.2080159197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.2296797387 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 582798995 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:10 AM UTC 24 |
| Peak memory | 216316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296797387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.2296797387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2492699695 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 132652041 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:10 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492699695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2492699695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_enable.1615715696 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 54106507 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615715696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.1615715696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.4200786432 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 909677087 ps |
| CPU time | 3.06 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:12 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200786432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.4200786432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.1646391916 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 646951709 ps |
| CPU time | 2.45 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:11 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646391916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1646391916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.520821352 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 165976699 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:10 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520821352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_fifo_levels.520821352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2733164123 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 386702948 ps |
| CPU time | 2.55 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:56:13 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733164123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2733164123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.3900142647 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 222681602 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:56:13 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900142647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.3900142647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.904251471 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 175900223 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:56:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904251471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_stall.904251471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.2700341632 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 169027242 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:56:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700341632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.2700341632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.3936366179 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 4807603977 ps |
| CPU time | 35.24 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:56:46 AM UTC 24 |
| Peak memory | 235764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936366179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3936366179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.1212686901 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 11191119614 ps |
| CPU time | 130.32 seconds |
| Started | Oct 15 12:56:10 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 219260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212686901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.1212686901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.2450313803 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 203301753 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:56:11 AM UTC 24 |
| Finished | Oct 15 12:56:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450313803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.2450313803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.852113707 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 30883436101 ps |
| CPU time | 45.23 seconds |
| Started | Oct 15 12:56:11 AM UTC 24 |
| Finished | Oct 15 12:56:58 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852113707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_resume.852113707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.2611246416 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 5858161186 ps |
| CPU time | 9.13 seconds |
| Started | Oct 15 12:56:12 AM UTC 24 |
| Finished | Oct 15 12:56:22 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611246416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.2611246416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3540336753 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 2210776317 ps |
| CPU time | 25.24 seconds |
| Started | Oct 15 12:56:12 AM UTC 24 |
| Finished | Oct 15 12:56:38 AM UTC 24 |
| Peak memory | 235820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540336753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3540336753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1876717385 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 2299089619 ps |
| CPU time | 21.15 seconds |
| Started | Oct 15 12:56:12 AM UTC 24 |
| Finished | Oct 15 12:56:34 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876717385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1876717385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.2086828562 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 280478158 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:56:12 AM UTC 24 |
| Finished | Oct 15 12:56:14 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086828562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.2086828562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3081096303 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 231764704 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:56:13 AM UTC 24 |
| Finished | Oct 15 12:56:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081096303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3081096303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.694061110 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 1961386998 ps |
| CPU time | 53.74 seconds |
| Started | Oct 15 12:56:13 AM UTC 24 |
| Finished | Oct 15 12:57:09 AM UTC 24 |
| Peak memory | 236024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694061110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.694061110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.1206877116 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 2958642568 ps |
| CPU time | 32.6 seconds |
| Started | Oct 15 12:56:13 AM UTC 24 |
| Finished | Oct 15 12:56:47 AM UTC 24 |
| Peak memory | 231504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206877116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.1206877116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.842181421 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 2984361042 ps |
| CPU time | 22.49 seconds |
| Started | Oct 15 12:56:13 AM UTC 24 |
| Finished | Oct 15 12:56:37 AM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842181421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.842181421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.3294402333 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 152640605 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:56:13 AM UTC 24 |
| Finished | Oct 15 12:56:16 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3294402333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.3294402333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.1119014392 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 157614380 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:56:14 AM UTC 24 |
| Finished | Oct 15 12:56:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119014392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.1119014392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.2771757333 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 186196048 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:56:14 AM UTC 24 |
| Finished | Oct 15 12:56:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771757333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.2771757333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.4169510526 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 161905871 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:56:15 AM UTC 24 |
| Finished | Oct 15 12:56:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169510526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.4169510526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.3941771965 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 185745011 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:56:15 AM UTC 24 |
| Finished | Oct 15 12:56:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941771965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.3941771965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.1528320023 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 246009805 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:56:15 AM UTC 24 |
| Finished | Oct 15 12:56:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528320023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.1528320023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.1019451315 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 159717178 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:56:16 AM UTC 24 |
| Finished | Oct 15 12:56:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019451315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.1019451315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.2121277903 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 238330091 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:56:17 AM UTC 24 |
| Finished | Oct 15 12:56:20 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121277903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.2121277903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.818378507 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 144746108 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:56:17 AM UTC 24 |
| Finished | Oct 15 12:56:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818378507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.818378507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.63549623 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 80708091 ps |
| CPU time | 1 seconds |
| Started | Oct 15 12:56:17 AM UTC 24 |
| Finished | Oct 15 12:56:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=63549623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_phy_pins_sense.63549623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.3718414457 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 171759348 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:56:17 AM UTC 24 |
| Finished | Oct 15 12:56:19 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718414457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.3718414457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.517935225 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 173400088 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:56:18 AM UTC 24 |
| Finished | Oct 15 12:56:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517935225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_pkt_sent.517935225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2689905298 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 283543464 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:56:18 AM UTC 24 |
| Finished | Oct 15 12:56:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689905298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2689905298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1111291890 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 183061321 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:56:18 AM UTC 24 |
| Finished | Oct 15 12:56:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111291890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1111291890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.141542693 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 20183455627 ps |
| CPU time | 29.68 seconds |
| Started | Oct 15 12:56:20 AM UTC 24 |
| Finished | Oct 15 12:56:51 AM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141542693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_resume_link_active.141542693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.3864586676 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 142210016 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:56:20 AM UTC 24 |
| Finished | Oct 15 12:56:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864586676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.3864586676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.3586251985 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 367367108 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 12:56:20 AM UTC 24 |
| Finished | Oct 15 12:56:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586251985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.3586251985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1688615545 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 153871616 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:56:20 AM UTC 24 |
| Finished | Oct 15 12:56:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688615545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.1688615545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.3946661966 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 167509973 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:56:20 AM UTC 24 |
| Finished | Oct 15 12:56:22 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946661966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.3946661966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.386973785 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 222757199 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:56:21 AM UTC 24 |
| Finished | Oct 15 12:56:24 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386973785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.386973785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.4276032804 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 3131255704 ps |
| CPU time | 31.05 seconds |
| Started | Oct 15 12:56:21 AM UTC 24 |
| Finished | Oct 15 12:56:54 AM UTC 24 |
| Peak memory | 231548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276032804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.4276032804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2150930826 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 158369843 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:56:22 AM UTC 24 |
| Finished | Oct 15 12:56:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150930826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2150930826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.2175207405 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 188894977 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:56:22 AM UTC 24 |
| Finished | Oct 15 12:56:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175207405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.2175207405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.1560243849 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 1030269129 ps |
| CPU time | 3.18 seconds |
| Started | Oct 15 12:56:23 AM UTC 24 |
| Finished | Oct 15 12:56:27 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560243849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.1560243849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.4180349553 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 2729132321 ps |
| CPU time | 28.15 seconds |
| Started | Oct 15 12:56:23 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180349553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.4180349553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.1149604487 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 1058501935 ps |
| CPU time | 20.42 seconds |
| Started | Oct 15 12:56:08 AM UTC 24 |
| Finished | Oct 15 12:56:29 AM UTC 24 |
| Peak memory | 218640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149604487 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.1149604487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.751736143 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 482106354 ps |
| CPU time | 2.57 seconds |
| Started | Oct 15 12:56:23 AM UTC 24 |
| Finished | Oct 15 12:56:27 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=751736143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_tx _rx_disruption.751736143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.1242019401 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 549902070 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1242019401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.1242019401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1347461281 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 717930646 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347461281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1347461281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3685969640 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 165788512 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685969640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3685969640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3940406249 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 265232915 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940406249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3940406249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.121340812 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 255687051 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:49 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121340812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 112.usbdev_fifo_levels.121340812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2545041180 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 546398985 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:06:50 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2545041180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2545041180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.4197862975 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 370185589 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:06:50 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197862975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.4197862975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.2821468793 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 336478136 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:06:50 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821468793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.2821468793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.206225545 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 539136259 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:51 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=206225545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.206225545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2605091248 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 548667742 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:06:51 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605091248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2605091248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.2964527467 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 451842618 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:06:51 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2964527467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.2964527467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1662605899 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 574827683 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:51 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662605899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.1662605899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.3435597669 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 165138079 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:06:53 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435597669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.3435597669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1304023608 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 621262860 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1304023608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1304023608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2225391128 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 228677395 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225391128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.2225391128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4101643052 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 485165155 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4101643052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.4101643052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.928626280 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 780852491 ps |
| CPU time | 1.99 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:58 AM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=928626280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.928626280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.1058940442 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 165878419 ps |
| CPU time | 0.82 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058940442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.1058940442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.14830617 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 479207185 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=14830617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_tx _rx_disruption.14830617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.776151779 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 526326547 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=776151779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_t x_rx_disruption.776151779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.1457294117 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 51787184 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 12:56:52 AM UTC 24 |
| Finished | Oct 15 12:56:54 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457294117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.1457294117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.3969788417 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 5694658777 ps |
| CPU time | 13.02 seconds |
| Started | Oct 15 12:56:24 AM UTC 24 |
| Finished | Oct 15 12:56:39 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969788417 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.3969788417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.1693517414 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 24860657130 ps |
| CPU time | 36.47 seconds |
| Started | Oct 15 12:56:26 AM UTC 24 |
| Finished | Oct 15 12:57:04 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693517414 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.1693517414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.191186266 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 173998092 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:56:26 AM UTC 24 |
| Finished | Oct 15 12:56:29 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191186266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_av_buffer.191186266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.3063830841 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 139719859 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:56:27 AM UTC 24 |
| Finished | Oct 15 12:56:29 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063830841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.3063830841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.2257752391 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 197589380 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:56:31 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257752391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.2257752391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.1833565333 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 637352441 ps |
| CPU time | 2.67 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:56:32 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1833565333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.1833565333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.3431242279 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 16630705050 ps |
| CPU time | 30.02 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431242279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.3431242279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.2160241868 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 210678222 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:56:31 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160241868 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2160241868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.2830705439 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 769214389 ps |
| CPU time | 3.7 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:56:33 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830705439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.2830705439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.1537127010 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 139609734 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:56:30 AM UTC 24 |
| Finished | Oct 15 12:56:32 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537127010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.1537127010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_enable.1796275961 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 34319329 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:56:30 AM UTC 24 |
| Finished | Oct 15 12:56:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796275961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.1796275961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.1687980500 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 800985040 ps |
| CPU time | 3.58 seconds |
| Started | Oct 15 12:56:30 AM UTC 24 |
| Finished | Oct 15 12:56:34 AM UTC 24 |
| Peak memory | 219052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687980500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.1687980500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.2293403863 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 322309907 ps |
| CPU time | 2.8 seconds |
| Started | Oct 15 12:56:31 AM UTC 24 |
| Finished | Oct 15 12:56:36 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293403863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.2293403863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.3332553334 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 237315993 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:56:31 AM UTC 24 |
| Finished | Oct 15 12:56:35 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332553334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3332553334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.2949871762 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 146959137 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:56:31 AM UTC 24 |
| Finished | Oct 15 12:56:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949871762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_stall.2949871762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.151179212 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 209586497 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:56:33 AM UTC 24 |
| Finished | Oct 15 12:56:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=151179212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_trans.151179212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.1977861770 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 4370638204 ps |
| CPU time | 36.88 seconds |
| Started | Oct 15 12:56:31 AM UTC 24 |
| Finished | Oct 15 12:57:10 AM UTC 24 |
| Peak memory | 235928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977861770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.1977861770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.3805970950 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 12712698286 ps |
| CPU time | 94.03 seconds |
| Started | Oct 15 12:56:33 AM UTC 24 |
| Finished | Oct 15 12:58:09 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805970950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3805970950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.687262605 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 291698075 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:56:33 AM UTC 24 |
| Finished | Oct 15 12:56:36 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687262605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_in_err.687262605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.2176274836 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 23828914671 ps |
| CPU time | 31.7 seconds |
| Started | Oct 15 12:56:34 AM UTC 24 |
| Finished | Oct 15 12:57:07 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176274836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.2176274836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.267479208 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 5138564280 ps |
| CPU time | 10.56 seconds |
| Started | Oct 15 12:56:34 AM UTC 24 |
| Finished | Oct 15 12:56:46 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=267479208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_suspend.267479208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.1556942790 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 3059777989 ps |
| CPU time | 29.47 seconds |
| Started | Oct 15 12:56:34 AM UTC 24 |
| Finished | Oct 15 12:57:05 AM UTC 24 |
| Peak memory | 235884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556942790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.1556942790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.1644648998 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 2200123488 ps |
| CPU time | 21.17 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:58 AM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644648998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.1644648998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.74356024 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 241531988 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:39 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=74356024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.74356024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.198937740 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 205280348 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198937740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.198937740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.2796975582 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 1765519918 ps |
| CPU time | 13.18 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:50 AM UTC 24 |
| Peak memory | 235964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796975582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.2796975582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.846890736 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 1780306951 ps |
| CPU time | 15 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 219044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=846890736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.846890736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.3747065133 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 2449826554 ps |
| CPU time | 23.59 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747065133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.3747065133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.3003607415 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 167006860 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:39 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003607415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.3003607415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1221416054 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 156429026 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:56:36 AM UTC 24 |
| Finished | Oct 15 12:56:39 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221416054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1221416054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1149973573 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 180924000 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149973573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1149973573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.1007570810 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 190592600 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007570810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.1007570810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.847089328 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 212908169 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:40 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847089328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_out_stall.847089328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.728891671 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 181623224 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728891671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_out_trans_nak.728891671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.3628085648 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 187666390 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628085648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.3628085648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2667511483 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 202716154 ps |
| CPU time | 1.78 seconds |
| Started | Oct 15 12:56:38 AM UTC 24 |
| Finished | Oct 15 12:56:41 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667511483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2667511483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.220959708 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 157091788 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:56:42 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220959708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.220959708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.905442272 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 63861909 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:56:42 AM UTC 24 |
| Peak memory | 216540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905442272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_phy_pins_sense.905442272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.630596066 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 19651988111 ps |
| CPU time | 56.05 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:57:37 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630596066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.630596066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1056178509 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 183464055 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:56:42 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056178509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1056178509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.3830635991 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 167969250 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:56:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830635991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.3830635991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1226638091 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 185877493 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:56:40 AM UTC 24 |
| Finished | Oct 15 12:56:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226638091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1226638091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.1410069709 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 181967184 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:56:41 AM UTC 24 |
| Finished | Oct 15 12:56:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410069709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.1410069709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.3457260084 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 20176706690 ps |
| CPU time | 30.68 seconds |
| Started | Oct 15 12:56:41 AM UTC 24 |
| Finished | Oct 15 12:57:13 AM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457260084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.3457260084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.1320574739 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 151011106 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:56:41 AM UTC 24 |
| Finished | Oct 15 12:56:44 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320574739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.1320574739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.2533015552 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 360530357 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:56:41 AM UTC 24 |
| Finished | Oct 15 12:56:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533015552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.2533015552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.3347791405 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 165789466 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:56:42 AM UTC 24 |
| Finished | Oct 15 12:56:44 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347791405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.3347791405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2175052375 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 153693342 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175052375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2175052375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.3951753626 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 283492391 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951753626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.3951753626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.2492060444 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 2644851167 ps |
| CPU time | 64.32 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:57:56 AM UTC 24 |
| Peak memory | 235908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492060444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.2492060444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3044695929 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 204422027 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044695929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.3044695929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.1567934593 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 177941807 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567934593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.1567934593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.1518019773 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 1261200078 ps |
| CPU time | 3.43 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:55 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518019773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.1518019773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.3430721963 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 2898806423 ps |
| CPU time | 20.73 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 229196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430721963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.3430721963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1616727716 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 291713041 ps |
| CPU time | 4.54 seconds |
| Started | Oct 15 12:56:28 AM UTC 24 |
| Finished | Oct 15 12:56:34 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616727716 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1616727716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.1783472150 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 454715524 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:56:50 AM UTC 24 |
| Finished | Oct 15 12:56:53 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1783472150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.1783472150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.540185003 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 366991513 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=540185003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.540185003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.1631674103 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 248576966 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631674103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.1631674103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.1003841219 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 511781629 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1003841219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.1003841219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.2655595826 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 154400351 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:06:54 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655595826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.2655595826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.3743415458 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 516951546 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743415458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.3743415458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.3320014253 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 357193238 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320014253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.3320014253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.314275638 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 498458968 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=314275638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.314275638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.124515083 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 585989979 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=124515083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_t x_rx_disruption.124515083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.567758457 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 161129051 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:06:56 AM UTC 24 |
| Finished | Oct 15 01:07:01 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567758457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 127.usbdev_fifo_levels.567758457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.684158588 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 534113556 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=684158588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_t x_rx_disruption.684158588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.730572890 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 227284229 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:06 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=730572890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 128.usbdev_fifo_levels.730572890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.305162570 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 585425913 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=305162570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_t x_rx_disruption.305162570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3109483112 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 581905441 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109483112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3109483112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.347116078 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 154709762 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:06 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347116078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 129.usbdev_fifo_levels.347116078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.2777960398 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 601765791 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2777960398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.2777960398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.3564382996 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 35234128 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564382996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.3564382996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3798285329 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 11243537060 ps |
| CPU time | 17.58 seconds |
| Started | Oct 15 12:56:52 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798285329 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3798285329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.511835139 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 14534326525 ps |
| CPU time | 18.87 seconds |
| Started | Oct 15 12:56:52 AM UTC 24 |
| Finished | Oct 15 12:57:13 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=511835139 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.511835139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.3289011624 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 25461475460 ps |
| CPU time | 33.47 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:57:27 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289011624 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.3289011624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.3501643503 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 152321534 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501643503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.3501643503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.3243509891 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 148761283 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:55 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243509891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.3243509891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.560849594 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 363947163 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560849594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_data_toggle_clear.560849594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.2031607642 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 895345955 ps |
| CPU time | 2.68 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031607642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.2031607642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.397745356 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 36558347699 ps |
| CPU time | 62.91 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:57:57 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397745356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.397745356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.1754245238 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 2932277082 ps |
| CPU time | 23.51 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 219344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754245238 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1754245238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.2554301108 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 969647554 ps |
| CPU time | 2.49 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554301108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.2554301108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.273336232 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 160576227 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:55 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273336232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_disconnected.273336232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_enable.2480343392 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 77280679 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480343392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.2480343392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.1361920944 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 835381387 ps |
| CPU time | 2.71 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361920944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.1361920944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.3248304527 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 415077871 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248304527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.3248304527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.1036165759 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 347171936 ps |
| CPU time | 2.41 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:56:58 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036165759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.1036165759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.3441073926 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 259099014 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441073926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.3441073926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.3307755090 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 154477337 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307755090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.3307755090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.1193452708 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 175223781 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193452708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.1193452708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.1922708149 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 4406506613 ps |
| CPU time | 40.04 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:57:36 AM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922708149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1922708149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.3282280648 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 6225106673 ps |
| CPU time | 69.84 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282280648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.3282280648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.4088854927 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 202850528 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088854927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.4088854927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.2764590217 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 26799350141 ps |
| CPU time | 38.06 seconds |
| Started | Oct 15 12:56:55 AM UTC 24 |
| Finished | Oct 15 12:57:34 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764590217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.2764590217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1739348113 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 11079233906 ps |
| CPU time | 16.98 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739348113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.1739348113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.2061558733 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 5069170438 ps |
| CPU time | 48.15 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:57:46 AM UTC 24 |
| Peak memory | 235968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061558733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.2061558733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3967929590 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 3986507101 ps |
| CPU time | 28.67 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967929590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3967929590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.3776493992 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 245920667 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:56:59 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776493992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3776493992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.2874911841 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 246940465 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:56:59 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874911841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2874911841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.25138825 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 2533418474 ps |
| CPU time | 18.2 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25138825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.25138825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.3564284559 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 3018564568 ps |
| CPU time | 83.92 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564284559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3564284559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.2259483249 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 2861833029 ps |
| CPU time | 20.09 seconds |
| Started | Oct 15 12:56:56 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259483249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.2259483249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.267865568 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 173917692 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267865568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.267865568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.1954334555 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 161096089 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954334555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.1954334555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.316041766 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 179565440 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316041766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_out_iso.316041766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.1961917645 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 145732760 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961917645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.1961917645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.2030217666 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 187045845 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030217666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.2030217666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.211740136 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 188248661 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211740136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.211740136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.2075909410 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 189650528 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:01 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075909410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.2075909410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2989256456 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 159035900 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989256456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2989256456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.416719277 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 30493260 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 12:56:58 AM UTC 24 |
| Finished | Oct 15 12:57:00 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416719277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_phy_pins_sense.416719277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.611865139 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 14571279319 ps |
| CPU time | 35.57 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:43 AM UTC 24 |
| Peak memory | 233672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611865139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_pkt_buffer.611865139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.4173504843 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 177241161 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173504843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.4173504843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.882325860 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 161359664 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882325860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_sent.882325860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.3798601407 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 237081691 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798601407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.3798601407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.1870295807 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 169580387 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870295807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.1870295807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.832620850 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 20172223139 ps |
| CPU time | 28.6 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:36 AM UTC 24 |
| Peak memory | 218968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832620850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_resume_link_active.832620850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.2343645336 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 167461678 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343645336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.2343645336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.46496874 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 261790415 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=46496874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_full.46496874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.21140737 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 145332307 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21140737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_setup_stage.21140737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.2271157297 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 174064115 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271157297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2271157297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.1035413515 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 213322918 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:57:06 AM UTC 24 |
| Finished | Oct 15 12:57:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035413515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.1035413515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.4156133784 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 1887369971 ps |
| CPU time | 16.89 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:27 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156133784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.4156133784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.2279558410 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 195285830 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279558410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.2279558410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.3543503911 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 182052296 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543503911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.3543503911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.2792315997 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 1198206751 ps |
| CPU time | 3.1 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:13 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792315997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.2792315997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.2517884216 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 2441600256 ps |
| CPU time | 61.71 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:58:12 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517884216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.2517884216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.3871522772 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 721868695 ps |
| CPU time | 14 seconds |
| Started | Oct 15 12:56:53 AM UTC 24 |
| Finished | Oct 15 12:57:08 AM UTC 24 |
| Peak memory | 219320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871522772 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.3871522772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.3754073017 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 595828716 ps |
| CPU time | 2.01 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3754073017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.3754073017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.3335549793 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 635078554 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3335549793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.3335549793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2612152920 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 237166551 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612152920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.2612152920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.733164547 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 152331441 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:06:58 AM UTC 24 |
| Finished | Oct 15 01:07:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733164547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 131.usbdev_fifo_levels.733164547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.4016230127 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 528687023 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:06:59 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4016230127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.4016230127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4143659283 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 389719118 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:06:59 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143659283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.4143659283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.387808773 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 601118555 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:06:59 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=387808773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_t x_rx_disruption.387808773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.373760614 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 456622346 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:07:00 AM UTC 24 |
| Finished | Oct 15 01:07:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=373760614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.373760614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.1996773780 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 314278332 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:07:02 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996773780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.1996773780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.2401695649 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 489494318 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2401695649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.2401695649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1444536754 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 317251583 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444536754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1444536754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.466372066 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 145649037 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466372066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 134.usbdev_fifo_levels.466372066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2049068480 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 570424263 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049068480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2049068480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.3521118637 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 287932314 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521118637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.3521118637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2807580241 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 520017713 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2807580241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.2807580241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.3412075608 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 256530172 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412075608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.3412075608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.670021635 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 313461022 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=670021635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 136.usbdev_fifo_levels.670021635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.2113151276 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 547533089 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2113151276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.2113151276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.3834143276 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 306113453 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:07:03 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834143276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.3834143276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.65109123 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 650685598 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:07:04 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=65109123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_tx _rx_disruption.65109123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.2126926213 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 641767934 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:07:05 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126926213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.2126926213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.3201316775 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 275316997 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:07:05 AM UTC 24 |
| Finished | Oct 15 01:07:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201316775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.3201316775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.618568326 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 493535515 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:07:07 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=618568326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_t x_rx_disruption.618568326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.833892653 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 252538379 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:07:07 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=833892653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.833892653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.1525106963 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 520097990 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1525106963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.1525106963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.2647881685 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 67020017 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 12:57:19 AM UTC 24 |
| Finished | Oct 15 12:57:22 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647881685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.2647881685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.284688699 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 10266212170 ps |
| CPU time | 15.42 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=284688699 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.284688699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2328518717 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 19708790883 ps |
| CPU time | 29.52 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328518717 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2328518717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.604729561 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 23418315854 ps |
| CPU time | 42.22 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:53 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=604729561 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.604729561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.951294184 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 152750331 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951294184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_av_buffer.951294184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.3052942150 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 156427407 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:11 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052942150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.3052942150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.1599753249 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 423748725 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599753249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.1599753249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.1051850295 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 1287375752 ps |
| CPU time | 3.86 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051850295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.1051850295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.3605871656 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 15581762735 ps |
| CPU time | 26.44 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:37 AM UTC 24 |
| Peak memory | 219188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605871656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.3605871656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.298210697 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 5718628106 ps |
| CPU time | 46.87 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:58 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=298210697 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.298210697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.459842396 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 639112746 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459842396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.459842396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3725774829 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 154934793 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725774829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3725774829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_enable.182423962 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 82772418 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182423962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.182423962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.4000574433 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 773534811 ps |
| CPU time | 2.27 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:13 AM UTC 24 |
| Peak memory | 218960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000574433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.4000574433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.3148822929 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 224451136 ps |
| CPU time | 2.11 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148822929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.3148822929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.3876981007 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 206411708 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876981007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.3876981007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.1152957760 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 154550564 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152957760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.1152957760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3741784605 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 184119828 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741784605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3741784605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.3016522382 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 4096305053 ps |
| CPU time | 39.28 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 231644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016522382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.3016522382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.2251038776 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 5947376677 ps |
| CPU time | 37.43 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 219036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251038776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.2251038776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.2865641524 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 225197441 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:57:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865641524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.2865641524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.2815004417 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 28187663131 ps |
| CPU time | 54.02 seconds |
| Started | Oct 15 12:57:11 AM UTC 24 |
| Finished | Oct 15 12:58:07 AM UTC 24 |
| Peak memory | 218996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815004417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.2815004417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.1757956326 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 5289010889 ps |
| CPU time | 8.87 seconds |
| Started | Oct 15 12:57:12 AM UTC 24 |
| Finished | Oct 15 12:57:22 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757956326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.1757956326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.1729162753 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 3124841262 ps |
| CPU time | 30.84 seconds |
| Started | Oct 15 12:57:13 AM UTC 24 |
| Finished | Oct 15 12:57:46 AM UTC 24 |
| Peak memory | 235872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729162753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.1729162753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.3813637015 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 3460513485 ps |
| CPU time | 24.36 seconds |
| Started | Oct 15 12:57:13 AM UTC 24 |
| Finished | Oct 15 12:57:39 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813637015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.3813637015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.3188049785 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 243689274 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188049785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.3188049785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.2242875361 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 202441217 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242875361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.2242875361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.2068776054 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 1958867481 ps |
| CPU time | 18.93 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:34 AM UTC 24 |
| Peak memory | 235724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068776054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.2068776054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.3452301284 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 2359681099 ps |
| CPU time | 20.09 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:35 AM UTC 24 |
| Peak memory | 235880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452301284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.3452301284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2509445474 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 4061822103 ps |
| CPU time | 106.81 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:59:03 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509445474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2509445474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1687700016 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 197626161 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687700016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1687700016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.140824998 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 216047017 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140824998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.140824998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.21158808 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 216644838 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21158808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_nak_trans.21158808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.646065720 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 194869556 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=646065720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_out_iso.646065720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.2364871081 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 192006958 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364871081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.2364871081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.3756288840 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 188576298 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756288840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.3756288840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.1763911785 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 164846414 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:57:14 AM UTC 24 |
| Finished | Oct 15 12:57:16 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763911785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.1763911785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.2928239248 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 207879020 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:57:15 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928239248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2928239248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.1824301738 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 146886617 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:57:15 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824301738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.1824301738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.4283289564 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 40450808 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283289564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.4283289564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.3539559233 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 8612231296 ps |
| CPU time | 24.12 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:41 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539559233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.3539559233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.3845122301 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 198216062 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845122301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.3845122301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.1523663877 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 176898551 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523663877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.1523663877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.53212665 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 253113177 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53212665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_random_length_in_transaction.53212665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.2322254601 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 231524881 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322254601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.2322254601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.1132520834 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 20163787281 ps |
| CPU time | 29.69 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:47 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132520834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.1132520834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.669769169 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 200435149 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:57:16 AM UTC 24 |
| Finished | Oct 15 12:57:18 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669769169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_rx_crc_err.669769169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2811673252 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 346110310 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:57:17 AM UTC 24 |
| Finished | Oct 15 12:57:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811673252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.2811673252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3689343949 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 158348176 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 12:57:17 AM UTC 24 |
| Finished | Oct 15 12:57:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689343949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3689343949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.3949050773 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 142041742 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 12:57:17 AM UTC 24 |
| Finished | Oct 15 12:57:19 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949050773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.3949050773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.2376811222 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 225142258 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:57:17 AM UTC 24 |
| Finished | Oct 15 12:57:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376811222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.2376811222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.3677197825 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 2482706315 ps |
| CPU time | 66.05 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:58:25 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677197825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.3677197825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.891352960 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 190093651 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:57:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=891352960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.891352960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.2923365349 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 225746374 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:57:20 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923365349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.2923365349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2653044949 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 785482148 ps |
| CPU time | 2.25 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:57:21 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653044949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2653044949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.3017215344 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 3413047886 ps |
| CPU time | 29.11 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017215344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.3017215344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.4273088996 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 3860211016 ps |
| CPU time | 34.94 seconds |
| Started | Oct 15 12:57:09 AM UTC 24 |
| Finished | Oct 15 12:57:46 AM UTC 24 |
| Peak memory | 219256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273088996 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.4273088996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.1165375072 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 597982406 ps |
| CPU time | 2.21 seconds |
| Started | Oct 15 12:57:18 AM UTC 24 |
| Finished | Oct 15 12:57:21 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1165375072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.1165375072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.84927954 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 194290798 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84927954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.84927954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3474043187 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 502329561 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3474043187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.3474043187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2640631317 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 585961905 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 218492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640631317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2640631317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.4189217047 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 275269137 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189217047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.4189217047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.2852832541 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 490517079 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2852832541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.2852832541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.2688772876 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 475177870 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688772876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.2688772876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.2973666073 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 157394081 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973666073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.2973666073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.2119874502 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 456107443 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2119874502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.2119874502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.2124327957 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 644395528 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2124327957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.2124327957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.3860854628 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 382629884 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860854628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3860854628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.209934574 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 251433085 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209934574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 144.usbdev_fifo_levels.209934574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.1071642716 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 640197749 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071642716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.1071642716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.350510421 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 295741304 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:07:09 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=350510421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 145.usbdev_fifo_levels.350510421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2545425175 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 437269970 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:10 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2545425175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2545425175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.1695670090 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 285517087 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:07:10 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695670090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.1695670090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.1509871579 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 257681745 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:31 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509871579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.1509871579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2122082299 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 667068107 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:19 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2122082299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2122082299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.335912433 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 226545107 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:21 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=335912433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.335912433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.2753879448 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 620180493 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2753879448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.2753879448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.2133906030 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 463074387 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133906030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.2133906030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.2044614109 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 601934462 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:19 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2044614109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.2044614109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.3125136200 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 592403040 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125136200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.3125136200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.2986140273 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 295905692 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986140273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.2986140273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3699781331 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 581540788 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3699781331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3699781331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.2762872419 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 101345180 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:57:35 AM UTC 24 |
| Finished | Oct 15 12:57:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762872419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.2762872419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.2219226708 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 5488064004 ps |
| CPU time | 8.88 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219226708 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.2219226708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.362334250 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 13829849421 ps |
| CPU time | 19.32 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=362334250 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.362334250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.3727381451 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 26105254513 ps |
| CPU time | 42.98 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727381451 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.3727381451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.368330916 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 147165942 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:22 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=368330916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_av_buffer.368330916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3817342548 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 144054052 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:22 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817342548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.3817342548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.2393610111 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 270894310 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:23 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393610111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.2393610111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3199598720 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 321982960 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:23 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199598720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3199598720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1520153724 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 20853917691 ps |
| CPU time | 35.94 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:57 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520153724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1520153724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1501850321 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 889260948 ps |
| CPU time | 18.78 seconds |
| Started | Oct 15 12:57:20 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501850321 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1501850321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.885754765 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 612676412 ps |
| CPU time | 2.71 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:25 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=885754765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disable_endpoint.885754765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.158264724 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 149993645 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:24 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158264724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_disconnected.158264724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3139499861 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 40007545 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139499861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3139499861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.825741198 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 771610775 ps |
| CPU time | 2.87 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 218964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825741198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.825741198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.1061182605 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 279827781 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:24 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061182605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1061182605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.374168300 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 251845014 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:24 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374168300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_fifo_levels.374168300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.3625967119 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 230502954 ps |
| CPU time | 2.05 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:25 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625967119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.3625967119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.349220542 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 184415398 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349220542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.349220542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.261182083 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 149568194 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=261182083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_stall.261182083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.2771762506 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 219961312 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771762506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.2771762506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.381165521 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 4635696774 ps |
| CPU time | 46.42 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:58:10 AM UTC 24 |
| Peak memory | 231452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=381165521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.381165521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.214853671 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 9513261924 ps |
| CPU time | 107.04 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214853671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.214853671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.4033209028 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 227909269 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:57:26 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033209028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.4033209028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1270775454 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 25571553424 ps |
| CPU time | 40.03 seconds |
| Started | Oct 15 12:57:24 AM UTC 24 |
| Finished | Oct 15 12:58:05 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270775454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1270775454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.1446448428 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 8698213554 ps |
| CPU time | 17.46 seconds |
| Started | Oct 15 12:57:25 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446448428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.1446448428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.598418265 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 4032245727 ps |
| CPU time | 28.21 seconds |
| Started | Oct 15 12:57:25 AM UTC 24 |
| Finished | Oct 15 12:57:55 AM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=598418265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.598418265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.3907300294 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 3840642531 ps |
| CPU time | 39.21 seconds |
| Started | Oct 15 12:57:25 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907300294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3907300294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.444898309 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 238342823 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:57:25 AM UTC 24 |
| Finished | Oct 15 12:57:28 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444898309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.444898309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.259644698 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 189398199 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:57:25 AM UTC 24 |
| Finished | Oct 15 12:57:28 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259644698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.259644698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.1227555381 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 3241442602 ps |
| CPU time | 85.05 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:58:54 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227555381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.1227555381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2972672046 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 2886360915 ps |
| CPU time | 30.77 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:59 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972672046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2972672046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.434245832 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 197600494 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434245832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.434245832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1729194667 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 143885334 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729194667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1729194667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3484617227 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 195726506 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484617227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3484617227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.1272478957 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 158530720 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272478957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.1272478957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.1174198937 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 171096993 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:57:27 AM UTC 24 |
| Finished | Oct 15 12:57:30 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174198937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.1174198937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2750497037 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 158322362 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:57:29 AM UTC 24 |
| Finished | Oct 15 12:57:31 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750497037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2750497037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.1944988949 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 178276230 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:57:29 AM UTC 24 |
| Finished | Oct 15 12:57:32 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944988949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1944988949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.1783091599 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 150646445 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:57:29 AM UTC 24 |
| Finished | Oct 15 12:57:31 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783091599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.1783091599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.3502276970 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 37757538 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:57:29 AM UTC 24 |
| Finished | Oct 15 12:57:31 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502276970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3502276970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3135666534 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 13255093966 ps |
| CPU time | 35.61 seconds |
| Started | Oct 15 12:57:29 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135666534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3135666534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.19902174 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 164158149 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:57:30 AM UTC 24 |
| Finished | Oct 15 12:57:33 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19902174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_received.19902174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.932790856 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 250558107 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:57:30 AM UTC 24 |
| Finished | Oct 15 12:57:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932790856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_pkt_sent.932790856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3333802457 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 258266531 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:57:31 AM UTC 24 |
| Finished | Oct 15 12:57:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333802457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3333802457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2086426105 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 195041607 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:57:31 AM UTC 24 |
| Finished | Oct 15 12:57:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086426105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2086426105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.2665159477 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 20175488901 ps |
| CPU time | 32.82 seconds |
| Started | Oct 15 12:57:31 AM UTC 24 |
| Finished | Oct 15 12:58:05 AM UTC 24 |
| Peak memory | 218928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665159477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.2665159477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.4278063040 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 162576810 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:57:31 AM UTC 24 |
| Finished | Oct 15 12:57:33 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278063040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.4278063040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2602642289 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 382269190 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:57:31 AM UTC 24 |
| Finished | Oct 15 12:57:34 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602642289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2602642289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2685507717 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 232859039 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:57:32 AM UTC 24 |
| Finished | Oct 15 12:57:35 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685507717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2685507717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.2203861029 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 169007342 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:57:32 AM UTC 24 |
| Finished | Oct 15 12:57:35 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203861029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.2203861029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.2736448809 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 266190253 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 12:57:32 AM UTC 24 |
| Finished | Oct 15 12:57:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736448809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.2736448809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.2088974060 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 3057954460 ps |
| CPU time | 85.56 seconds |
| Started | Oct 15 12:57:32 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088974060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.2088974060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.4200417829 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 168075798 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:57:33 AM UTC 24 |
| Finished | Oct 15 12:57:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200417829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.4200417829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.327108643 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 150459051 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:57:35 AM UTC 24 |
| Finished | Oct 15 12:57:37 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327108643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_stall_trans.327108643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.755780039 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 415176906 ps |
| CPU time | 2.12 seconds |
| Started | Oct 15 12:57:35 AM UTC 24 |
| Finished | Oct 15 12:57:38 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755780039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_stream_len_max.755780039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.1792894596 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 2953409464 ps |
| CPU time | 29.18 seconds |
| Started | Oct 15 12:57:35 AM UTC 24 |
| Finished | Oct 15 12:58:05 AM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792894596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.1792894596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.3342844387 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 1430961978 ps |
| CPU time | 30.11 seconds |
| Started | Oct 15 12:57:22 AM UTC 24 |
| Finished | Oct 15 12:57:53 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342844387 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.3342844387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.1050704851 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 473448948 ps |
| CPU time | 2 seconds |
| Started | Oct 15 12:57:35 AM UTC 24 |
| Finished | Oct 15 12:57:38 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1050704851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.1050704851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.455879910 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 237140975 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:21 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455879910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.455879910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.4017550982 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 161999958 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017550982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.4017550982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.3583682804 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 566276443 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:07:13 AM UTC 24 |
| Finished | Oct 15 01:07:19 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3583682804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.3583682804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.1934429150 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 591683171 ps |
| CPU time | 1.86 seconds |
| Started | Oct 15 01:07:19 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1934429150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.1934429150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.548675406 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 490648542 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:19 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=548675406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.548675406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.2228722310 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 158690138 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:07:20 AM UTC 24 |
| Finished | Oct 15 01:07:22 AM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228722310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.2228722310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.428121855 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 613023815 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:20 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=428121855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_t x_rx_disruption.428121855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.2536459192 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 262699183 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536459192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.2536459192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.3583815155 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 659276721 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:24 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3583815155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.3583815155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.197434521 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 381982122 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197434521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.197434521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.601556895 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 421170506 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=601556895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_t x_rx_disruption.601556895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.4288040239 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 165902090 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288040239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.4288040239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.3014817666 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 169650553 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014817666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.3014817666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.301887507 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 443975591 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=301887507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_t x_rx_disruption.301887507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.1949894527 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 182909943 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949894527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.1949894527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.226300572 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 328005264 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226300572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 156.usbdev_fifo_levels.226300572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.3671270089 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 469048482 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3671270089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.3671270089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.4175850925 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 297750676 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175850925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.4175850925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.4085192554 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 520756844 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:07:21 AM UTC 24 |
| Finished | Oct 15 01:07:24 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4085192554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.4085192554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3610945008 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 357338897 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610945008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3610945008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3004359173 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 591839279 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3004359173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3004359173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.2880256455 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 381734937 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880256455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.2880256455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.1726793753 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 213910639 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:31 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726793753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 159.usbdev_fifo_levels.1726793753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.717081328 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 734175769 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:39 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=717081328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_t x_rx_disruption.717081328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1827969458 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 46000434 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:57:54 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827969458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1827969458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.3319984791 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 10252020101 ps |
| CPU time | 13.47 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319984791 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.3319984791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.4238952735 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 14925059855 ps |
| CPU time | 26.16 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238952735 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.4238952735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.930373954 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 29567246662 ps |
| CPU time | 39.98 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930373954 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.930373954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.3575377264 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 225338134 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575377264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.3575377264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.1478043808 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 166222629 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478043808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.1478043808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.1268673015 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 209193710 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:57:40 AM UTC 24 |
| Peak memory | 216600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268673015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.1268673015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.1155257809 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 1319111120 ps |
| CPU time | 4.77 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:57:43 AM UTC 24 |
| Peak memory | 218896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155257809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.1155257809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3349918772 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 17285406425 ps |
| CPU time | 32.44 seconds |
| Started | Oct 15 12:57:37 AM UTC 24 |
| Finished | Oct 15 12:58:11 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349918772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3349918772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.4236434679 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 152541076 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:57:39 AM UTC 24 |
| Finished | Oct 15 12:57:42 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236434679 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.4236434679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.711169314 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 906232789 ps |
| CPU time | 3.06 seconds |
| Started | Oct 15 12:57:39 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711169314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.711169314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.4071378525 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 135604444 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:57:40 AM UTC 24 |
| Finished | Oct 15 12:57:42 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071378525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.4071378525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_enable.2048706966 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 75236903 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:57:40 AM UTC 24 |
| Finished | Oct 15 12:57:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048706966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.2048706966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.2113059507 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 883231313 ps |
| CPU time | 2.98 seconds |
| Started | Oct 15 12:57:40 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113059507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.2113059507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.45832456 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 364792282 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:57:40 AM UTC 24 |
| Finished | Oct 15 12:57:42 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=45832456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.45832456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.1336116868 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 208297095 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:40 AM UTC 24 |
| Finished | Oct 15 12:57:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336116868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.1336116868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.3628060367 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 306777934 ps |
| CPU time | 2.87 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:57:45 AM UTC 24 |
| Peak memory | 218760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628060367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.3628060367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.1700132638 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 189157095 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700132638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.1700132638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.24078222 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 175467506 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:57:43 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24078222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_in_stall.24078222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.3556055317 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 251934301 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556055317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.3556055317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3759466215 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 3396383946 ps |
| CPU time | 24.21 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:58:07 AM UTC 24 |
| Peak memory | 235928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759466215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3759466215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.788245442 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 10310571505 ps |
| CPU time | 112.08 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:59:36 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=788245442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.788245442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.3730308411 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 164955304 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:57:41 AM UTC 24 |
| Finished | Oct 15 12:57:44 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730308411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.3730308411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.1697030987 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 12659996663 ps |
| CPU time | 19.06 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:58:03 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697030987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.1697030987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.3349949553 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 8944546457 ps |
| CPU time | 14.09 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:57:58 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349949553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.3349949553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.4055761211 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 2953446398 ps |
| CPU time | 83.13 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:59:08 AM UTC 24 |
| Peak memory | 229092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055761211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.4055761211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.1720366720 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 2288337600 ps |
| CPU time | 57.38 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720366720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.1720366720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.2581133933 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 242661650 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:57:46 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581133933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.2581133933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.1548695597 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 196391347 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:57:43 AM UTC 24 |
| Finished | Oct 15 12:57:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548695597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.1548695597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.211396788 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 2449018417 ps |
| CPU time | 63.76 seconds |
| Started | Oct 15 12:57:45 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 229544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211396788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.211396788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.3597408779 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 2495481989 ps |
| CPU time | 66.73 seconds |
| Started | Oct 15 12:57:45 AM UTC 24 |
| Finished | Oct 15 12:58:54 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597408779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.3597408779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.2438754900 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 156266658 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:57:45 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438754900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.2438754900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.1400830213 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 170927142 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:57:45 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400830213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.1400830213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.2095940769 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 186425209 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:57:46 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095940769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.2095940769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.1905251478 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 247821059 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:57:46 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905251478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.1905251478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.250086659 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 157622680 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:57:46 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250086659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.250086659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.1723096651 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 153025665 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:57:46 AM UTC 24 |
| Finished | Oct 15 12:57:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723096651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.1723096651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.506092147 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 235391883 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=506092147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.506092147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.602462296 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 147004768 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602462296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.602462296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.3511366967 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 33626319 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511366967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.3511366967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.4203437528 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 22584240083 ps |
| CPU time | 62.95 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:58:52 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203437528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.4203437528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.932492587 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 172993847 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932492587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_pkt_received.932492587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.1012317026 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 201737552 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012317026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.1012317026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.2196385853 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 210801048 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196385853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.2196385853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.1498209736 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 205867593 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:57:48 AM UTC 24 |
| Finished | Oct 15 12:57:50 AM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498209736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1498209736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.3435914236 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 20149358285 ps |
| CPU time | 27.43 seconds |
| Started | Oct 15 12:57:49 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435914236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.3435914236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.1753599559 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 155508469 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753599559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.1753599559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.899083535 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 333271565 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899083535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_rx_full.899083535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.4072322087 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 155069477 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072322087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.4072322087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.4143480331 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 190528464 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:52 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143480331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.4143480331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.4053987364 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 301628748 ps |
| CPU time | 1.97 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053987364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.4053987364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.245578190 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 2034491606 ps |
| CPU time | 17.54 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:58:09 AM UTC 24 |
| Peak memory | 235804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245578190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.245578190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.1429456347 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 194116398 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:57:50 AM UTC 24 |
| Finished | Oct 15 12:57:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429456347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.1429456347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.3251135052 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 154505221 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:57:51 AM UTC 24 |
| Finished | Oct 15 12:57:54 AM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251135052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.3251135052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.881729669 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 624369953 ps |
| CPU time | 2.54 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:57:56 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=881729669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_stream_len_max.881729669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3886216020 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 2031972355 ps |
| CPU time | 15.33 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 218764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886216020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3886216020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.4219457439 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 3871690636 ps |
| CPU time | 34.42 seconds |
| Started | Oct 15 12:57:39 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 219184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219457439 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.4219457439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.1146815383 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 494116613 ps |
| CPU time | 2.4 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:57:55 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1146815383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.1146815383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1664813097 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 472741026 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:07:22 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664813097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1664813097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.3009390272 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 158910307 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009390272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.3009390272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.2848129486 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 483961247 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2848129486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.2848129486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2653185225 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 184554441 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653185225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.2653185225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.3659193511 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 568618226 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659193511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.3659193511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.2020807500 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 250584788 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020807500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2020807500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.2840452361 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 644424253 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2840452361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.2840452361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.2828771234 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 187441287 ps |
| CPU time | 0.82 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828771234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.2828771234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1699465098 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 512955968 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1699465098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1699465098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3288451741 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 299704281 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288451741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3288451741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.246748764 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 557755187 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=246748764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_t x_rx_disruption.246748764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1814522763 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 493759668 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:28 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814522763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1814522763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2315204317 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 595800105 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2315204317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2315204317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.722069023 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 192664184 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=722069023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.722069023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.4197968755 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 499479021 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4197968755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.4197968755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.408052030 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 379227355 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=408052030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.408052030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1560158775 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 562548949 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1560158775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1560158775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.1755464393 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 271336399 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:07:25 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755464393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.1755464393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.120792062 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 37067693 ps |
| CPU time | 1 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:10 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120792062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.120792062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.444494338 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 4644628647 ps |
| CPU time | 8.95 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:58:02 AM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444494338 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.444494338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.3166143667 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 14704349949 ps |
| CPU time | 21.89 seconds |
| Started | Oct 15 12:57:52 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166143667 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3166143667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.767431403 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 24726102478 ps |
| CPU time | 36.56 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=767431403 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.767431403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3052697774 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 197920277 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:57:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052697774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3052697774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.3286335794 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 145952783 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:57:56 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286335794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.3286335794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.3149458154 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 326540721 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:57:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149458154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.3149458154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.3645561545 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 1244687252 ps |
| CPU time | 4.64 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:57:59 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645561545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.3645561545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.3696899487 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 3861066303 ps |
| CPU time | 34.94 seconds |
| Started | Oct 15 12:57:53 AM UTC 24 |
| Finished | Oct 15 12:58:30 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696899487 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.3696899487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.1306409612 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 829123037 ps |
| CPU time | 3.76 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 218928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306409612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.1306409612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.2450577056 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 165423926 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:57:58 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450577056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.2450577056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2319340302 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 44236153 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:57:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319340302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2319340302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.1961869310 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 941516208 ps |
| CPU time | 3.37 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961869310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.1961869310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3056364220 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 522879733 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:57:58 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056364220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3056364220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.3181123845 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 263786188 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181123845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.3181123845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.3781245859 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 181203248 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781245859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.3781245859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.1620191531 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 183569162 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620191531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.1620191531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.3585796865 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 142264267 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585796865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.3585796865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.3011793548 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 207506511 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:58:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011793548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.3011793548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.1490211108 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 3802760368 ps |
| CPU time | 103.35 seconds |
| Started | Oct 15 12:57:57 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 231408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490211108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.1490211108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.1855842815 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 13730287089 ps |
| CPU time | 90.81 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855842815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.1855842815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1261406476 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 246143382 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:58:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261406476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1261406476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.684140712 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 32782337542 ps |
| CPU time | 55.1 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:58:56 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684140712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_resume.684140712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.2504650371 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 9335109697 ps |
| CPU time | 13.78 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:58:14 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504650371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.2504650371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.3386749806 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 4658118541 ps |
| CPU time | 126.96 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 01:00:09 AM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386749806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.3386749806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.1185086329 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 2005748102 ps |
| CPU time | 51.6 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:58:53 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185086329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.1185086329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.3534299151 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 252846677 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:57:59 AM UTC 24 |
| Finished | Oct 15 12:58:02 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534299151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.3534299151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.1764419092 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 245748563 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764419092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.1764419092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.2107387016 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 3107424413 ps |
| CPU time | 86.2 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:59:29 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107387016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.2107387016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.828528348 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 2465234542 ps |
| CPU time | 24.31 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:27 AM UTC 24 |
| Peak memory | 235820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=828528348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.828528348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.495605732 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 163349310 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=495605732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.495605732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.2986463152 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 165039683 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:03 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986463152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.2986463152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.1455231030 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 163263055 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455231030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.1455231030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.1179663990 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 171715303 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179663990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.1179663990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.3830510007 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 187775223 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830510007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.3830510007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3170186244 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 147530413 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:58:01 AM UTC 24 |
| Finished | Oct 15 12:58:04 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170186244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3170186244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.1543386037 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 194401419 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:58:02 AM UTC 24 |
| Finished | Oct 15 12:58:05 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543386037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.1543386037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.3427064231 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 147540721 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 12:58:04 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427064231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.3427064231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.1205808971 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 9463163016 ps |
| CPU time | 27.39 seconds |
| Started | Oct 15 12:58:04 AM UTC 24 |
| Finished | Oct 15 12:58:33 AM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1205808971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.1205808971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.121426833 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 144412509 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:58:04 AM UTC 24 |
| Finished | Oct 15 12:58:06 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121426833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_pkt_received.121426833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.3508694105 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 160395075 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:58:05 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508694105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.3508694105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.507853571 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 164430329 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=507853571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_random_length_in_transaction.507853571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.2447370569 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 235569664 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447370569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.2447370569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.1227363153 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 20184040739 ps |
| CPU time | 32.09 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:39 AM UTC 24 |
| Peak memory | 218928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227363153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.1227363153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.4241035752 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 209377233 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241035752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.4241035752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2797477977 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 272662891 ps |
| CPU time | 2 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797477977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2797477977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.1386852302 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 148668160 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386852302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.1386852302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2315346378 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 173939823 ps |
| CPU time | 0.85 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315346378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2315346378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.1197040889 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 266872238 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:58:06 AM UTC 24 |
| Finished | Oct 15 12:58:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197040889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.1197040889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2417722247 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 2092756171 ps |
| CPU time | 21.52 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 229272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417722247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2417722247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.1040890038 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 161776168 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:10 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040890038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1040890038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.3059631575 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 163666081 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:10 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059631575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.3059631575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.3036478276 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 1205507182 ps |
| CPU time | 3.83 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:13 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036478276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.3036478276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.661244614 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 3534807618 ps |
| CPU time | 93.93 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:59:44 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661244614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_streaming_out.661244614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.3283476467 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 2973155471 ps |
| CPU time | 17.77 seconds |
| Started | Oct 15 12:57:55 AM UTC 24 |
| Finished | Oct 15 12:58:14 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283476467 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.3283476467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.3128517070 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 520706587 ps |
| CPU time | 1.87 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:11 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3128517070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.3128517070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.2961408809 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 663426723 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961408809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2961408809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.3753158447 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 564840299 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:52 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3753158447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.3753158447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.3011929547 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 267410808 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011929547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.3011929547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.3809666527 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 565458234 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3809666527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.3809666527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1688549933 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 553200932 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688549933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1688549933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.1008975550 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 501659481 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1008975550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.1008975550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.1838306481 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 511674026 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838306481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1838306481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.3851069853 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 543512545 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3851069853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.3851069853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1869407014 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 107464023 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:23 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869407014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1869407014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.4002601938 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 9358035718 ps |
| CPU time | 14.73 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:24 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002601938 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.4002601938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.1730701946 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 13527663200 ps |
| CPU time | 16.22 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:26 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730701946 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.1730701946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.2248125366 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 28649223302 ps |
| CPU time | 41.9 seconds |
| Started | Oct 15 12:58:08 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248125366 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.2248125366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.3452470748 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 154985259 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:12 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452470748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.3452470748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2864211844 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 150676010 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:12 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864211844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2864211844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2345754271 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 316018711 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:13 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345754271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2345754271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.2611948377 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 749733016 ps |
| CPU time | 3.74 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611948377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.2611948377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.228174722 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 35387178384 ps |
| CPU time | 63.4 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:59:15 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228174722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_device_address.228174722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.2395365953 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 3439003628 ps |
| CPU time | 27.76 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:40 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395365953 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2395365953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.1087680601 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 510473880 ps |
| CPU time | 2.07 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:14 AM UTC 24 |
| Peak memory | 218700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087680601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.1087680601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.1320620888 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 168247993 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:13 AM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320620888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.1320620888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3770460985 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 51801759 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770460985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3770460985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.792567835 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 949969974 ps |
| CPU time | 2.82 seconds |
| Started | Oct 15 12:58:11 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 219040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792567835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.792567835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.4126886990 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 538657741 ps |
| CPU time | 2.02 seconds |
| Started | Oct 15 12:58:12 AM UTC 24 |
| Finished | Oct 15 12:58:16 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126886990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.4126886990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.1574170701 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 286979282 ps |
| CPU time | 1.82 seconds |
| Started | Oct 15 12:58:12 AM UTC 24 |
| Finished | Oct 15 12:58:16 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574170701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.1574170701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.525343478 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 388599083 ps |
| CPU time | 2.51 seconds |
| Started | Oct 15 12:58:12 AM UTC 24 |
| Finished | Oct 15 12:58:16 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=525343478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_fifo_rst.525343478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.1894840652 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 217720365 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:58:13 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1894840652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.1894840652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.2000125796 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 150553556 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:58:13 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000125796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.2000125796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.3266846023 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 172702667 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:58:13 AM UTC 24 |
| Finished | Oct 15 12:58:15 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266846023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.3266846023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.1120280848 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 4436913699 ps |
| CPU time | 39.59 seconds |
| Started | Oct 15 12:58:12 AM UTC 24 |
| Finished | Oct 15 12:58:54 AM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120280848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1120280848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.4189230207 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 5203736978 ps |
| CPU time | 52.85 seconds |
| Started | Oct 15 12:58:13 AM UTC 24 |
| Finished | Oct 15 12:59:07 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189230207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.4189230207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.1762418627 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 170148017 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:58:16 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762418627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.1762418627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.678011687 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 9392404161 ps |
| CPU time | 14.17 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:58:30 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=678011687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_resume.678011687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1762606428 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 10937906676 ps |
| CPU time | 15.61 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762606428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1762606428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.372416867 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 3786007535 ps |
| CPU time | 97.41 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:59:54 AM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=372416867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.372416867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.3459174781 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 3929542740 ps |
| CPU time | 109.33 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 01:00:06 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459174781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3459174781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.1465831365 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 284268338 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:58:17 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465831365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.1465831365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.2104498944 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 255073663 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:58:14 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104498944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.2104498944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.1302994754 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 3604006526 ps |
| CPU time | 35.99 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:53 AM UTC 24 |
| Peak memory | 229312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302994754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.1302994754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.1933368474 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 1706973060 ps |
| CPU time | 15.55 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:33 AM UTC 24 |
| Peak memory | 229240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933368474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1933368474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.3220034237 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 181464596 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220034237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.3220034237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.3392069884 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 147084738 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392069884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.3392069884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.2386135859 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 183303943 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386135859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.2386135859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3262278107 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 170224702 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:58:16 AM UTC 24 |
| Finished | Oct 15 12:58:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262278107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3262278107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.1371636929 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 151121942 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:58:17 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371636929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.1371636929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.1990893948 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 171331431 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990893948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.1990893948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.1250732702 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 242210583 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250732702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.1250732702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.3913361659 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 244327924 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913361659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.3913361659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.84751779 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 139436251 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84751779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.84751779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.2658087636 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 80980604 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658087636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.2658087636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.1283323645 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 10253362589 ps |
| CPU time | 27.74 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 233560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283323645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.1283323645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.2211477838 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 207563855 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:21 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211477838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.2211477838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.61637022 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 175886774 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:58:18 AM UTC 24 |
| Finished | Oct 15 12:58:20 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61637022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_pkt_sent.61637022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.2356963121 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 183123056 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:58:19 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356963121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.2356963121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2220884523 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 202527834 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:58:19 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220884523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2220884523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.2901986125 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 20168729142 ps |
| CPU time | 29.01 seconds |
| Started | Oct 15 12:58:19 AM UTC 24 |
| Finished | Oct 15 12:58:50 AM UTC 24 |
| Peak memory | 219000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901986125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.2901986125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.4020296089 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 137115027 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:58:20 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020296089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.4020296089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.4050725983 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 252695886 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:58:20 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050725983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.4050725983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.4238036808 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 181997066 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:58:20 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238036808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.4238036808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.9776881 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 152086475 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:58:20 AM UTC 24 |
| Finished | Oct 15 12:58:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=9776881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_setup_trans_ignored.9776881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1967147070 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 232459993 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 12:58:20 AM UTC 24 |
| Finished | Oct 15 12:58:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967147070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1967147070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.3239750999 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 2438713502 ps |
| CPU time | 19.43 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239750999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.3239750999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.1013058142 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 160753020 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013058142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.1013058142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.1827970376 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 223492948 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827970376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.1827970376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.1062793616 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 1320908178 ps |
| CPU time | 5.63 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:28 AM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062793616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.1062793616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1503941850 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 1970997141 ps |
| CPU time | 19.13 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 235764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503941850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1503941850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.4022657811 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 1521225039 ps |
| CPU time | 33.21 seconds |
| Started | Oct 15 12:58:10 AM UTC 24 |
| Finished | Oct 15 12:58:45 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022657811 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.4022657811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.784231513 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 518970416 ps |
| CPU time | 2.37 seconds |
| Started | Oct 15 12:58:21 AM UTC 24 |
| Finished | Oct 15 12:58:25 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=784231513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_tx _rx_disruption.784231513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.3010647962 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 368227045 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010647962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.3010647962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.896720822 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 569586551 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=896720822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_t x_rx_disruption.896720822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1840819345 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 161073514 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:56 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840819345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1840819345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.3877556859 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 548857434 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3877556859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.3877556859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.1328845256 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 477792002 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328845256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.1328845256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.756076451 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 455213760 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=756076451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_t x_rx_disruption.756076451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.3442646492 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 420333508 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442646492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.3442646492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.2329942888 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 525515545 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:07:26 AM UTC 24 |
| Finished | Oct 15 01:08:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2329942888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.2329942888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.2402724524 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 666654468 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:07:27 AM UTC 24 |
| Finished | Oct 15 01:07:33 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2402724524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.2402724524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3685601897 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 488834189 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:07:27 AM UTC 24 |
| Finished | Oct 15 01:07:33 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685601897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.3685601897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.2823275838 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 499869708 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:07:27 AM UTC 24 |
| Finished | Oct 15 01:07:33 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2823275838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.2823275838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.3769816481 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 205394428 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769816481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.3769816481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.1352190953 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 554738870 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:33 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1352190953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.1352190953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.2671020773 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 465286629 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671020773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.2671020773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1713906173 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 509537573 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713906173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1713906173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.3947273750 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 565499879 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:07:29 AM UTC 24 |
| Finished | Oct 15 01:07:33 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3947273750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.3947273750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.267665929 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 616547334 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:35 AM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=267665929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_t x_rx_disruption.267665929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2432955886 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 34585594 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432955886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2432955886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.1316568225 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 5955896385 ps |
| CPU time | 10.28 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:34 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316568225 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.1316568225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.1997992898 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 19421123580 ps |
| CPU time | 26.51 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997992898 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.1997992898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.3379267985 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 31084839292 ps |
| CPU time | 50.48 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:59:15 AM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379267985 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.3379267985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.1618666555 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 167801633 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618666555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.1618666555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1670969316 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 161823562 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:26 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670969316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1670969316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.3497748140 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 150674723 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:58:23 AM UTC 24 |
| Finished | Oct 15 12:58:26 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497748140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.3497748140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2162080311 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 15813872287 ps |
| CPU time | 27.78 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:54 AM UTC 24 |
| Peak memory | 219392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162080311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2162080311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.2815610768 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 323392399 ps |
| CPU time | 6.21 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:32 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815610768 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.2815610768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.1227718646 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 486197360 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:28 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227718646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.1227718646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.1847346282 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 142944345 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:28 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847346282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.1847346282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3677381024 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 108965258 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:28 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677381024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3677381024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.2281857091 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 920695814 ps |
| CPU time | 3.59 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:58:30 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281857091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.2281857091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.745515825 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 479033594 ps |
| CPU time | 2.67 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745515825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.745515825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.1290266318 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 292467923 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:58:30 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290266318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.1290266318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.1324510948 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 313613852 ps |
| CPU time | 2.35 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:58:30 AM UTC 24 |
| Peak memory | 218972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324510948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.1324510948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.1038185717 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 201944983 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:58:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038185717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1038185717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.821700111 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 142384624 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:58:29 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821700111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_in_stall.821700111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.3039347518 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 236031093 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:58:28 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039347518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.3039347518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.848437781 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 4035169186 ps |
| CPU time | 42.4 seconds |
| Started | Oct 15 12:58:27 AM UTC 24 |
| Finished | Oct 15 12:59:11 AM UTC 24 |
| Peak memory | 236040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=848437781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.848437781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.2194286093 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 5369087860 ps |
| CPU time | 67.21 seconds |
| Started | Oct 15 12:58:28 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 219352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194286093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.2194286093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.3007452048 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 185597942 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:58:28 AM UTC 24 |
| Finished | Oct 15 12:58:31 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007452048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.3007452048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.356457355 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 7636598511 ps |
| CPU time | 14.7 seconds |
| Started | Oct 15 12:58:30 AM UTC 24 |
| Finished | Oct 15 12:58:46 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356457355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_resume.356457355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.2870761317 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 8385763597 ps |
| CPU time | 11.24 seconds |
| Started | Oct 15 12:58:30 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870761317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.2870761317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.2919852550 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 3619495777 ps |
| CPU time | 95.44 seconds |
| Started | Oct 15 12:58:30 AM UTC 24 |
| Finished | Oct 15 01:00:07 AM UTC 24 |
| Peak memory | 229364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919852550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.2919852550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.1887720846 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 2703655694 ps |
| CPU time | 69.53 seconds |
| Started | Oct 15 12:58:30 AM UTC 24 |
| Finished | Oct 15 12:59:41 AM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887720846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.1887720846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.1976564208 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 251890510 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:58:30 AM UTC 24 |
| Finished | Oct 15 12:58:33 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976564208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1976564208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.3617599193 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 188679839 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:34 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617599193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3617599193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1067241960 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 2067241706 ps |
| CPU time | 14.97 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:48 AM UTC 24 |
| Peak memory | 219320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067241960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1067241960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.1719287589 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 2704994291 ps |
| CPU time | 20.5 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:54 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719287589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.1719287589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.1062674196 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 181323513 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062674196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.1062674196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.4220029431 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 189869756 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220029431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.4220029431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2247235502 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 251596520 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247235502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2247235502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.1584479424 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 183888550 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584479424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.1584479424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3676256258 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 162863901 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676256258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3676256258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.3960683443 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 207469398 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:58:32 AM UTC 24 |
| Finished | Oct 15 12:58:35 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960683443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.3960683443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.2518192050 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 180535603 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:58:37 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518192050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.2518192050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.3167295879 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 226569052 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:58:36 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167295879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.3167295879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.520154268 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 138829171 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:58:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520154268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.520154268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.3685803696 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 31640495 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:58:36 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685803696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.3685803696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3311082150 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 12571786481 ps |
| CPU time | 33.82 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 229372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3311082150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.3311082150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.2153238767 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 170252257 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:58:34 AM UTC 24 |
| Finished | Oct 15 12:58:36 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153238767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.2153238767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.1831304126 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 186748258 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831304126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.1831304126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.2411417064 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 289379291 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411417064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.2411417064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.947411461 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 153135503 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947411461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.947411461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.2835560387 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 20237791214 ps |
| CPU time | 28.66 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:59:06 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835560387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.2835560387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2621016775 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 172766281 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621016775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2621016775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.1008539594 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 270070799 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008539594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.1008539594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.1462592619 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 167389124 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462592619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.1462592619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.2116814792 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 147878053 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:58:36 AM UTC 24 |
| Finished | Oct 15 12:58:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116814792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.2116814792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.3036459807 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 223477302 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:58:37 AM UTC 24 |
| Finished | Oct 15 12:58:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036459807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.3036459807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.1194415463 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 2170467600 ps |
| CPU time | 23.07 seconds |
| Started | Oct 15 12:58:37 AM UTC 24 |
| Finished | Oct 15 12:59:02 AM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194415463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.1194415463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.2576330227 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 171865916 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:58:37 AM UTC 24 |
| Finished | Oct 15 12:58:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576330227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.2576330227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.2132910162 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 149744272 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:58:38 AM UTC 24 |
| Finished | Oct 15 12:58:40 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132910162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.2132910162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.3744112240 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 529927419 ps |
| CPU time | 2.58 seconds |
| Started | Oct 15 12:58:39 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744112240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.3744112240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.2064055247 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 2611439600 ps |
| CPU time | 20.65 seconds |
| Started | Oct 15 12:58:38 AM UTC 24 |
| Finished | Oct 15 12:58:59 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064055247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.2064055247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2753912648 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 3856404052 ps |
| CPU time | 34.44 seconds |
| Started | Oct 15 12:58:25 AM UTC 24 |
| Finished | Oct 15 12:59:01 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753912648 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.2753912648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.2328249408 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 668806201 ps |
| CPU time | 2.45 seconds |
| Started | Oct 15 12:58:39 AM UTC 24 |
| Finished | Oct 15 12:58:42 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2328249408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.2328249408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.1796490179 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 158682362 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:34 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796490179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.1796490179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.2946976138 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 562891047 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:35 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2946976138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.2946976138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.1406907172 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 351228187 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:35 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406907172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.1406907172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.3580959156 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 455244268 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:35 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3580959156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.3580959156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.1095848558 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 219746919 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:07:32 AM UTC 24 |
| Finished | Oct 15 01:07:34 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095848558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.1095848558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.1393482524 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 498496912 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1393482524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.1393482524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.861672020 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 550797258 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=861672020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_t x_rx_disruption.861672020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.2194435254 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 673432314 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194435254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.2194435254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.3443406379 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 594101171 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3443406379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.3443406379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.2709550770 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 382943711 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709550770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2709550770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.517959114 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 421181373 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=517959114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.517959114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.3709159308 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 286223192 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709159308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.3709159308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.1080935747 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 522149298 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:34 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1080935747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.1080935747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.3529705542 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 240913364 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:07:35 AM UTC 24 |
| Finished | Oct 15 01:07:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529705542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.3529705542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.1306557893 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 416230413 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:07:35 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306557893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.1306557893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.2999516866 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 444124338 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:07:35 AM UTC 24 |
| Finished | Oct 15 01:07:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2999516866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.2999516866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.1823359771 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 618214866 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:07:36 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823359771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.1823359771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.3395057380 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 475898358 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:36 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3395057380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.3395057380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.3512992950 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 75357806 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:51:48 AM UTC 24 |
| Finished | Oct 15 12:51:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512992950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.3512992950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3540736414 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 5477035490 ps |
| CPU time | 16.81 seconds |
| Started | Oct 15 12:51:05 AM UTC 24 |
| Finished | Oct 15 12:51:23 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540736414 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.3540736414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.4055684577 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 13342168614 ps |
| CPU time | 21.27 seconds |
| Started | Oct 15 12:51:06 AM UTC 24 |
| Finished | Oct 15 12:51:28 AM UTC 24 |
| Peak memory | 229312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055684577 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.4055684577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.1660137535 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 28716442335 ps |
| CPU time | 37.64 seconds |
| Started | Oct 15 12:51:06 AM UTC 24 |
| Finished | Oct 15 12:51:45 AM UTC 24 |
| Peak memory | 218996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660137535 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.1660137535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1890125316 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 178132709 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:51:07 AM UTC 24 |
| Finished | Oct 15 12:51:10 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890125316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1890125316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.1408845242 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 197046165 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:51:07 AM UTC 24 |
| Finished | Oct 15 12:51:10 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408845242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.1408845242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2336154038 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 192000887 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:51:08 AM UTC 24 |
| Finished | Oct 15 12:51:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336154038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.2336154038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1108839866 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 202911262 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:51:10 AM UTC 24 |
| Finished | Oct 15 12:51:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108839866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.1108839866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.1882071407 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 338087415 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 12:51:10 AM UTC 24 |
| Finished | Oct 15 12:51:13 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882071407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.1882071407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.84785533 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 18484369507 ps |
| CPU time | 41.31 seconds |
| Started | Oct 15 12:51:10 AM UTC 24 |
| Finished | Oct 15 12:51:53 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84785533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_device_address.84785533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1407340054 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 1984040998 ps |
| CPU time | 23.73 seconds |
| Started | Oct 15 12:51:10 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 219120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407340054 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1407340054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.941036422 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 835890357 ps |
| CPU time | 3.79 seconds |
| Started | Oct 15 12:51:12 AM UTC 24 |
| Finished | Oct 15 12:51:17 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941036422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.941036422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.2618311721 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 151077691 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:51:14 AM UTC 24 |
| Finished | Oct 15 12:51:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618311721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.2618311721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_enable.723056069 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 43965241 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:51:14 AM UTC 24 |
| Finished | Oct 15 12:51:16 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723056069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.723056069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1572865487 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 856511987 ps |
| CPU time | 3.16 seconds |
| Started | Oct 15 12:51:14 AM UTC 24 |
| Finished | Oct 15 12:51:18 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572865487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.1572865487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.23485781 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 168656965 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:51:15 AM UTC 24 |
| Finished | Oct 15 12:51:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23485781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_fifo_levels.23485781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.3559030432 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 577323518 ps |
| CPU time | 3.51 seconds |
| Started | Oct 15 12:51:15 AM UTC 24 |
| Finished | Oct 15 12:51:20 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559030432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.3559030432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1252734296 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 107181990454 ps |
| CPU time | 198 seconds |
| Started | Oct 15 12:51:18 AM UTC 24 |
| Finished | Oct 15 12:54:39 AM UTC 24 |
| Peak memory | 219424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252734296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1252734296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.156657532 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 98296442053 ps |
| CPU time | 203.85 seconds |
| Started | Oct 15 12:51:18 AM UTC 24 |
| Finished | Oct 15 12:54:44 AM UTC 24 |
| Peak memory | 219184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=156657532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_hiclk_max.156657532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1804774699 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 108111623190 ps |
| CPU time | 211.25 seconds |
| Started | Oct 15 12:51:18 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804774699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1804774699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.2720672337 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 89970387479 ps |
| CPU time | 195.7 seconds |
| Started | Oct 15 12:51:19 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2720672337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.2720672337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.2701638968 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 89130676096 ps |
| CPU time | 145.63 seconds |
| Started | Oct 15 12:51:19 AM UTC 24 |
| Finished | Oct 15 12:53:47 AM UTC 24 |
| Peak memory | 219252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701638968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.2701638968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.451000167 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 186410814 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:51:22 AM UTC 24 |
| Finished | Oct 15 12:51:24 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=451000167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.451000167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3069881538 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 137448399 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:51:22 AM UTC 24 |
| Finished | Oct 15 12:51:24 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069881538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.3069881538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3882749679 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 179371351 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:51:23 AM UTC 24 |
| Finished | Oct 15 12:51:25 AM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882749679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.3882749679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.464145394 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 3796032442 ps |
| CPU time | 27.71 seconds |
| Started | Oct 15 12:51:20 AM UTC 24 |
| Finished | Oct 15 12:51:49 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464145394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.464145394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.952448411 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 9880336586 ps |
| CPU time | 64.12 seconds |
| Started | Oct 15 12:51:23 AM UTC 24 |
| Finished | Oct 15 12:52:29 AM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=952448411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.952448411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.3039700485 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 246110165 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:51:23 AM UTC 24 |
| Finished | Oct 15 12:51:26 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039700485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.3039700485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.799532562 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 28877230738 ps |
| CPU time | 41.37 seconds |
| Started | Oct 15 12:51:24 AM UTC 24 |
| Finished | Oct 15 12:52:07 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799532562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_resume.799532562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.3352279810 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 5248056854 ps |
| CPU time | 10.33 seconds |
| Started | Oct 15 12:51:24 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352279810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.3352279810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1843841858 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 3391323834 ps |
| CPU time | 91.96 seconds |
| Started | Oct 15 12:51:26 AM UTC 24 |
| Finished | Oct 15 12:53:00 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843841858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1843841858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3573789246 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 244760091 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:51:26 AM UTC 24 |
| Finished | Oct 15 12:51:28 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573789246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.3573789246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.2459285149 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 192829729 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:51:27 AM UTC 24 |
| Finished | Oct 15 12:51:29 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459285149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.2459285149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.557128929 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 3395888768 ps |
| CPU time | 28.06 seconds |
| Started | Oct 15 12:51:27 AM UTC 24 |
| Finished | Oct 15 12:51:57 AM UTC 24 |
| Peak memory | 236084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557128929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.557128929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.459054472 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 2576405381 ps |
| CPU time | 70.62 seconds |
| Started | Oct 15 12:51:28 AM UTC 24 |
| Finished | Oct 15 12:52:41 AM UTC 24 |
| Peak memory | 235812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=459054472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.459054472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.311956549 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 2383769059 ps |
| CPU time | 19.79 seconds |
| Started | Oct 15 12:51:28 AM UTC 24 |
| Finished | Oct 15 12:51:49 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=311956549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.311956549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.3404219051 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 176778240 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:51:29 AM UTC 24 |
| Finished | Oct 15 12:51:32 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404219051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3404219051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3471971802 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 151750697 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:51:30 AM UTC 24 |
| Finished | Oct 15 12:51:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471971802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.3471971802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2068224973 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 188614542 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:51:31 AM UTC 24 |
| Finished | Oct 15 12:51:33 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068224973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2068224973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.1973982438 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 166929008 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:51:32 AM UTC 24 |
| Finished | Oct 15 12:51:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973982438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.1973982438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3880389569 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 187324422 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:51:33 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880389569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3880389569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.3065403524 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 189441198 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:51:33 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065403524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.3065403524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.2733623676 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 166517265 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:51:33 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733623676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.2733623676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1792351097 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 248262843 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:51:33 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792351097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.1792351097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.954938712 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 211212241 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:51:34 AM UTC 24 |
| Finished | Oct 15 12:51:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954938712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.954938712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1513779459 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 137681862 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:51:35 AM UTC 24 |
| Finished | Oct 15 12:51:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513779459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.1513779459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2094571210 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 11239353082 ps |
| CPU time | 45.53 seconds |
| Started | Oct 15 12:51:36 AM UTC 24 |
| Finished | Oct 15 12:52:23 AM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094571210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2094571210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.1196033303 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 171579873 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:51:36 AM UTC 24 |
| Finished | Oct 15 12:51:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196033303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.1196033303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.2076406646 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 188853725 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:51:37 AM UTC 24 |
| Finished | Oct 15 12:51:40 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076406646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.2076406646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.37971773 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 6650935037 ps |
| CPU time | 73.07 seconds |
| Started | Oct 15 12:51:37 AM UTC 24 |
| Finished | Oct 15 12:52:53 AM UTC 24 |
| Peak memory | 236016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37971773 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.37971773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.1865847773 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 3253558248 ps |
| CPU time | 26.59 seconds |
| Started | Oct 15 12:51:37 AM UTC 24 |
| Finished | Oct 15 12:52:05 AM UTC 24 |
| Peak memory | 231492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865847773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.1865847773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2574448126 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 193297833 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:51:37 AM UTC 24 |
| Finished | Oct 15 12:51:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574448126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.2574448126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2734315978 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 197219724 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:51:37 AM UTC 24 |
| Finished | Oct 15 12:51:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734315978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.2734315978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2751088919 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 20155381653 ps |
| CPU time | 29.42 seconds |
| Started | Oct 15 12:51:38 AM UTC 24 |
| Finished | Oct 15 12:52:08 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751088919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.2751088919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.878670853 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 152805582 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:51:39 AM UTC 24 |
| Finished | Oct 15 12:51:41 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878670853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_crc_err.878670853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.89355215 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 310613072 ps |
| CPU time | 2.03 seconds |
| Started | Oct 15 12:51:39 AM UTC 24 |
| Finished | Oct 15 12:51:42 AM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89355215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_full.89355215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.1842807971 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 165749736 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:51:40 AM UTC 24 |
| Finished | Oct 15 12:51:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842807971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.1842807971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1703709757 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 459018488 ps |
| CPU time | 2.38 seconds |
| Started | Oct 15 12:51:46 AM UTC 24 |
| Finished | Oct 15 12:51:50 AM UTC 24 |
| Peak memory | 253256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703709757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1703709757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2788442458 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 415050619 ps |
| CPU time | 2.32 seconds |
| Started | Oct 15 12:51:41 AM UTC 24 |
| Finished | Oct 15 12:51:44 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788442458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2788442458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.922197573 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 184632907 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:51:41 AM UTC 24 |
| Finished | Oct 15 12:51:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922197573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.922197573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1848042805 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 151979705 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:51:41 AM UTC 24 |
| Finished | Oct 15 12:51:44 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848042805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1848042805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.2503695628 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 170559285 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:51:42 AM UTC 24 |
| Finished | Oct 15 12:51:45 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503695628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.2503695628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3892592529 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 198703904 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:51:42 AM UTC 24 |
| Finished | Oct 15 12:51:45 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892592529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3892592529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.1761162734 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 2093055796 ps |
| CPU time | 25.99 seconds |
| Started | Oct 15 12:51:43 AM UTC 24 |
| Finished | Oct 15 12:52:10 AM UTC 24 |
| Peak memory | 235876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761162734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.1761162734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.712029358 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 151412452 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:51:44 AM UTC 24 |
| Finished | Oct 15 12:51:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=712029358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.712029358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.2657702714 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 227238739 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:51:44 AM UTC 24 |
| Finished | Oct 15 12:51:46 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657702714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.2657702714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.722375486 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 990677345 ps |
| CPU time | 4.48 seconds |
| Started | Oct 15 12:51:45 AM UTC 24 |
| Finished | Oct 15 12:51:51 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722375486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_stream_len_max.722375486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.2954435882 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 1948044075 ps |
| CPU time | 18.36 seconds |
| Started | Oct 15 12:51:44 AM UTC 24 |
| Finished | Oct 15 12:52:03 AM UTC 24 |
| Peak memory | 229556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954435882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.2954435882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3428509730 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 4327603505 ps |
| CPU time | 38.99 seconds |
| Started | Oct 15 12:51:12 AM UTC 24 |
| Finished | Oct 15 12:51:52 AM UTC 24 |
| Peak memory | 219356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428509730 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.3428509730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.488531002 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 45750477 ps |
| CPU time | 0.84 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488531002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.488531002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3789784603 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 9237772158 ps |
| CPU time | 15.45 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789784603 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3789784603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.270703966 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 20117658637 ps |
| CPU time | 28.63 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:59:10 AM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270703966 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.270703966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.1691549716 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 25887505589 ps |
| CPU time | 34.58 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:59:16 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691549716 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.1691549716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.3908238287 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 186938187 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:58:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908238287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.3908238287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.2856462248 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 183700215 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:58:40 AM UTC 24 |
| Finished | Oct 15 12:58:43 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856462248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.2856462248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.227288719 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 505947287 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 12:58:42 AM UTC 24 |
| Finished | Oct 15 12:58:45 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227288719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_data_toggle_clear.227288719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1480602778 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 658458005 ps |
| CPU time | 2.48 seconds |
| Started | Oct 15 12:58:42 AM UTC 24 |
| Finished | Oct 15 12:58:45 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480602778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1480602778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.145924516 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 28994204566 ps |
| CPU time | 55.77 seconds |
| Started | Oct 15 12:58:42 AM UTC 24 |
| Finished | Oct 15 12:59:39 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145924516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_device_address.145924516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1762061524 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 3393146648 ps |
| CPU time | 26.88 seconds |
| Started | Oct 15 12:58:43 AM UTC 24 |
| Finished | Oct 15 12:59:11 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762061524 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1762061524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.2932766180 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 670165616 ps |
| CPU time | 2.5 seconds |
| Started | Oct 15 12:58:43 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932766180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.2932766180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.3624328238 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 146871280 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:58:43 AM UTC 24 |
| Finished | Oct 15 12:58:46 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624328238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.3624328238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_enable.2318439425 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 36663181 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:58:46 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318439425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.2318439425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.4259120361 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 730076688 ps |
| CPU time | 2.84 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259120361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.4259120361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.556055944 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 543671483 ps |
| CPU time | 2.08 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556055944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.556055944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.2019610137 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 256575665 ps |
| CPU time | 2.4 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:58:47 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019610137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.2019610137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.2955527241 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 193057717 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:58:46 AM UTC 24 |
| Finished | Oct 15 12:58:49 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955527241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.2955527241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2122307797 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 139874137 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:58:46 AM UTC 24 |
| Finished | Oct 15 12:58:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122307797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2122307797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.3594644625 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 207869840 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:58:46 AM UTC 24 |
| Finished | Oct 15 12:58:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594644625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.3594644625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.1384115025 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 2478847408 ps |
| CPU time | 17 seconds |
| Started | Oct 15 12:58:44 AM UTC 24 |
| Finished | Oct 15 12:59:02 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384115025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1384115025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.1528837798 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 8763875342 ps |
| CPU time | 60.65 seconds |
| Started | Oct 15 12:58:46 AM UTC 24 |
| Finished | Oct 15 12:59:49 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528837798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.1528837798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1574448771 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 185554419 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:58:50 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574448771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.1574448771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.3010406048 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 33613701118 ps |
| CPU time | 60.67 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:59:50 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010406048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.3010406048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1050493428 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 10346709356 ps |
| CPU time | 16.76 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:59:06 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050493428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1050493428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.3685323753 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 3680224605 ps |
| CPU time | 31.94 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:59:21 AM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685323753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.3685323753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.4106438978 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 4414379384 ps |
| CPU time | 42.21 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106438978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.4106438978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.1521112258 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 247236631 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521112258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.1521112258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4216807645 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 229933891 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216807645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4216807645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.755559255 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 3289656671 ps |
| CPU time | 88.23 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 01:00:18 AM UTC 24 |
| Peak memory | 229492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755559255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.755559255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.4021305351 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 2601050308 ps |
| CPU time | 20.52 seconds |
| Started | Oct 15 12:58:48 AM UTC 24 |
| Finished | Oct 15 12:59:10 AM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021305351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.4021305351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.1753113214 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 149984088 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:58:50 AM UTC 24 |
| Finished | Oct 15 12:58:52 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753113214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.1753113214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.3658664489 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 158713530 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:58:50 AM UTC 24 |
| Finished | Oct 15 12:58:52 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658664489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.3658664489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.821939616 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 252706748 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 12:58:50 AM UTC 24 |
| Finished | Oct 15 12:58:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821939616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_out_iso.821939616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2972849056 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 202896039 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:58:55 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972849056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.2972849056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.2210538123 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 192161014 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:58:55 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210538123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.2210538123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.1253351738 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 158153333 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 12:58:55 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253351738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.1253351738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1755193635 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 214993609 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:58:55 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755193635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1755193635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.337687687 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 189204954 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 12:58:55 AM UTC 24 |
| Finished | Oct 15 12:58:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337687687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.337687687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.2670181655 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 76048634 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 12:58:57 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670181655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.2670181655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.3360510858 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 10369786258 ps |
| CPU time | 26.79 seconds |
| Started | Oct 15 12:58:57 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360510858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.3360510858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.413863043 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 170389134 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 12:58:57 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413863043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_pkt_received.413863043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2565769686 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 200086238 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:58:57 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565769686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.2565769686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.3281365185 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 238469584 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:58:57 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281365185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.3281365185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.4264040456 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 175084608 ps |
| CPU time | 1 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264040456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.4264040456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.2852186952 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 152592505 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852186952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.2852186952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.3760353412 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 310325250 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760353412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.3760353412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.3964932084 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 144538713 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964932084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.3964932084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.4206826533 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 151685704 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206826533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.4206826533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.1508757815 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 213095564 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508757815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.1508757815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.3301406257 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 2980625850 ps |
| CPU time | 29.38 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:29 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301406257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.3301406257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.3052835668 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 204715170 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:01 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052835668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.3052835668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.3071429944 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 157334657 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:00 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071429944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.3071429944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.1550774856 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 777691640 ps |
| CPU time | 2.52 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:02 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550774856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.1550774856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.1643141151 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 3244727767 ps |
| CPU time | 23.27 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:23 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643141151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.1643141151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3589526838 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 147364130 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:58:43 AM UTC 24 |
| Finished | Oct 15 12:58:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589526838 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3589526838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.1205403083 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 498925646 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:58:58 AM UTC 24 |
| Finished | Oct 15 12:59:01 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1205403083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.1205403083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.1950496347 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 443771141 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:07:36 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1950496347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.1950496347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.2710481098 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 580541573 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:07:38 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 215624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2710481098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.2710481098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.3345542086 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 600712002 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:07:38 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3345542086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.3345542086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.3009357550 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 556609906 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:07:38 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3009357550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.3009357550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2573403166 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 620782781 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2573403166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2573403166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.426988450 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 549801057 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=426988450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_t x_rx_disruption.426988450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.1569492461 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 512221752 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1569492461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.1569492461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1469713594 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 498498465 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1469713594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1469713594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.3694907497 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 497438346 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3694907497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.3694907497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.1628737266 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 37077797 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 12:59:11 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628737266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.1628737266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.611476525 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 4305058573 ps |
| CPU time | 8.58 seconds |
| Started | Oct 15 12:58:59 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=611476525 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.611476525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1339924910 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 15062565243 ps |
| CPU time | 18.18 seconds |
| Started | Oct 15 12:58:59 AM UTC 24 |
| Finished | Oct 15 12:59:19 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339924910 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1339924910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3894309516 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 30078218108 ps |
| CPU time | 46.39 seconds |
| Started | Oct 15 12:58:59 AM UTC 24 |
| Finished | Oct 15 12:59:47 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894309516 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3894309516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.2503401216 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 178953156 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:58:59 AM UTC 24 |
| Finished | Oct 15 12:59:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503401216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.2503401216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.3405175497 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 171698630 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:03 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405175497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.3405175497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.463554828 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 308118516 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463554828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.463554828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.3589450507 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 1328392984 ps |
| CPU time | 3.56 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:06 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589450507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.3589450507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.591800085 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 13661929547 ps |
| CPU time | 23.44 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591800085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_device_address.591800085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.1869188412 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 743900246 ps |
| CPU time | 5.83 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:08 AM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869188412 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1869188412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.399219665 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 615123287 ps |
| CPU time | 2.02 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 218836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399219665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disable_endpoint.399219665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.944368826 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 165052846 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944368826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_disconnected.944368826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_enable.3993495995 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 36413732 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993495995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.3993495995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.876916553 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 896279521 ps |
| CPU time | 3.33 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:06 AM UTC 24 |
| Peak memory | 219048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876916553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.876916553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.3287212402 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 210708151 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287212402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.3287212402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.1002534717 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 172930429 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:59:02 AM UTC 24 |
| Finished | Oct 15 12:59:04 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002534717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.1002534717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.1346075950 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 357035962 ps |
| CPU time | 2.32 seconds |
| Started | Oct 15 12:59:02 AM UTC 24 |
| Finished | Oct 15 12:59:05 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346075950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.1346075950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.3669195384 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 272097650 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 12:59:02 AM UTC 24 |
| Finished | Oct 15 12:59:05 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669195384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.3669195384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.417676289 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 136128805 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=417676289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_stall.417676289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.3409130921 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 257144680 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409130921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.3409130921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3971216576 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 5461109528 ps |
| CPU time | 146.46 seconds |
| Started | Oct 15 12:59:02 AM UTC 24 |
| Finished | Oct 15 01:01:31 AM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971216576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3971216576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.271332288 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 8987327370 ps |
| CPU time | 68.31 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 01:00:13 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=271332288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.271332288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.983583441 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 224301659 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:05 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983583441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_in_err.983583441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.4032522025 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 29163233095 ps |
| CPU time | 50 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032522025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.4032522025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.2774032847 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 8928464205 ps |
| CPU time | 14.42 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:19 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774032847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.2774032847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.3524116057 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 3607298491 ps |
| CPU time | 32.06 seconds |
| Started | Oct 15 12:59:03 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 231508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524116057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3524116057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.2531213104 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 3434245828 ps |
| CPU time | 89.15 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531213104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.2531213104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2866649443 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 232056676 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 12:59:07 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866649443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2866649443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.54393497 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 194805440 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 12:59:07 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54393497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.54393497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.3681317117 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 2160675062 ps |
| CPU time | 16.73 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 12:59:23 AM UTC 24 |
| Peak memory | 236124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681317117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.3681317117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.3749562283 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 2439155214 ps |
| CPU time | 61.43 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 01:00:08 AM UTC 24 |
| Peak memory | 236028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749562283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3749562283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2107329033 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 158627869 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 12:59:07 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107329033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2107329033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1112158987 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 147060003 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:59:05 AM UTC 24 |
| Finished | Oct 15 12:59:07 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112158987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.1112158987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.1599875358 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 186719568 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:59:06 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599875358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.1599875358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.3911875437 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 171888179 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:59:06 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911875437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.3911875437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.939377217 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 156410307 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:59:06 AM UTC 24 |
| Finished | Oct 15 12:59:08 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939377217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.939377217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2769681432 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 163401805 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:59:06 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769681432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.2769681432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2402318020 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 147707007 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:59:06 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402318020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2402318020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.2310772981 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 225003216 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:59:07 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310772981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.2310772981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.1940323693 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 142723826 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:59:07 AM UTC 24 |
| Finished | Oct 15 12:59:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940323693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.1940323693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.3142028894 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 39227203 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:10 AM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142028894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.3142028894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.1848176678 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 16812326584 ps |
| CPU time | 46.87 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:57 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848176678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.1848176678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.1491197678 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 185340998 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:11 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491197678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.1491197678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.2930431364 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 241694908 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930431364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.2930431364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.3878315446 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 206423191 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878315446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.3878315446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.936462967 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 161612387 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936462967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.936462967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3928813264 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 160370886 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:59:08 AM UTC 24 |
| Finished | Oct 15 12:59:11 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928813264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3928813264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.3671607583 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 367907374 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671607583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.3671607583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.2053390307 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 143021292 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053390307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.2053390307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.836302057 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 164078985 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=836302057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 21.usbdev_setup_trans_ignored.836302057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.1930754484 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 283010240 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930754484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1930754484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.1486271153 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 3152888732 ps |
| CPU time | 29.46 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:41 AM UTC 24 |
| Peak memory | 235812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486271153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.1486271153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.3467264488 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 191625953 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 12:59:10 AM UTC 24 |
| Finished | Oct 15 12:59:12 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467264488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.3467264488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.1925438534 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 198149310 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:59:11 AM UTC 24 |
| Finished | Oct 15 12:59:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925438534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.1925438534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2820070841 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 1128770415 ps |
| CPU time | 3.74 seconds |
| Started | Oct 15 12:59:11 AM UTC 24 |
| Finished | Oct 15 12:59:15 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820070841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2820070841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.4166591346 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 2465514465 ps |
| CPU time | 66.34 seconds |
| Started | Oct 15 12:59:11 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 229548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166591346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.4166591346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.3545375196 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 1402331637 ps |
| CPU time | 29.19 seconds |
| Started | Oct 15 12:59:01 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545375196 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.3545375196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.1548403254 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 566643746 ps |
| CPU time | 1.91 seconds |
| Started | Oct 15 12:59:11 AM UTC 24 |
| Finished | Oct 15 12:59:14 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1548403254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.1548403254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.595510567 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 557613175 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=595510567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_t x_rx_disruption.595510567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.2708302656 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 466834858 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2708302656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.2708302656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.4206618282 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 579153161 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:07:39 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4206618282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.4206618282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1362664877 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 479324876 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1362664877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1362664877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3448661133 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 576951307 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3448661133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3448661133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.685830974 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 604802848 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=685830974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_t x_rx_disruption.685830974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.4205294500 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 503321965 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4205294500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.4205294500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.99067556 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 614262739 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=99067556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_tx _rx_disruption.99067556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.2947288543 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 456187230 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2947288543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.2947288543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.1844281963 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 557049103 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1844281963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.1844281963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.57329617 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 38825701 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:59:25 AM UTC 24 |
| Finished | Oct 15 12:59:27 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=57329617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.57329617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.564594720 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 10032230560 ps |
| CPU time | 14.45 seconds |
| Started | Oct 15 12:59:12 AM UTC 24 |
| Finished | Oct 15 12:59:28 AM UTC 24 |
| Peak memory | 219212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=564594720 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.564594720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.645322443 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 14980499814 ps |
| CPU time | 18.07 seconds |
| Started | Oct 15 12:59:12 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 229184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=645322443 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.645322443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3347555221 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 29757695668 ps |
| CPU time | 40.57 seconds |
| Started | Oct 15 12:59:12 AM UTC 24 |
| Finished | Oct 15 12:59:54 AM UTC 24 |
| Peak memory | 218932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347555221 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.3347555221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3280469 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 166319971 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:59:12 AM UTC 24 |
| Finished | Oct 15 12:59:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_av_buffer.3280469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.680577862 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 155173617 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 12:59:12 AM UTC 24 |
| Finished | Oct 15 12:59:14 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680577862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_bitstuff_err.680577862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3972957664 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 409005966 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 12:59:13 AM UTC 24 |
| Finished | Oct 15 12:59:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972957664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.3972957664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.3307220206 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 271334476 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:59:13 AM UTC 24 |
| Finished | Oct 15 12:59:15 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307220206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.3307220206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.564901814 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 39828107316 ps |
| CPU time | 75.14 seconds |
| Started | Oct 15 12:59:13 AM UTC 24 |
| Finished | Oct 15 01:00:30 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564901814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.564901814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.520007946 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 454068101 ps |
| CPU time | 7.35 seconds |
| Started | Oct 15 12:59:13 AM UTC 24 |
| Finished | Oct 15 12:59:21 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=520007946 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.520007946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.1898123208 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 545111239 ps |
| CPU time | 2.11 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:18 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898123208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.1898123208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.3764943272 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 135994070 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764943272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.3764943272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_enable.98075520 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 40018487 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=98075520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_enable.98075520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.2623129921 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 918665658 ps |
| CPU time | 3 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:19 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623129921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.2623129921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3435647951 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 163046454 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435647951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3435647951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.3343593062 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 334785521 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:59:14 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343593062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.3343593062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.2467402346 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 322257966 ps |
| CPU time | 2.57 seconds |
| Started | Oct 15 12:59:15 AM UTC 24 |
| Finished | Oct 15 12:59:18 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467402346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.2467402346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.1906668382 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 233414932 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:59:15 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906668382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.1906668382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.270599853 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 183201161 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:59:15 AM UTC 24 |
| Finished | Oct 15 12:59:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270599853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_in_stall.270599853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.2488508948 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 192410604 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 12:59:19 AM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488508948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.2488508948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.1126288384 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 5094267261 ps |
| CPU time | 38.45 seconds |
| Started | Oct 15 12:59:15 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 231516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126288384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.1126288384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.3798983571 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 12968953222 ps |
| CPU time | 152.32 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 01:01:51 AM UTC 24 |
| Peak memory | 218776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798983571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.3798983571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3673915630 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 203070934 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 12:59:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673915630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3673915630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.1791747211 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 7769711475 ps |
| CPU time | 12.38 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 12:59:30 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791747211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.1791747211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.3934986737 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 10962105622 ps |
| CPU time | 16.56 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 12:59:34 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934986737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.3934986737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.1738537482 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 3952112854 ps |
| CPU time | 109.27 seconds |
| Started | Oct 15 12:59:16 AM UTC 24 |
| Finished | Oct 15 01:01:08 AM UTC 24 |
| Peak memory | 229352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738537482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1738537482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.666760543 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 2728237795 ps |
| CPU time | 20.66 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=666760543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.666760543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.3426019790 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 256311950 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:21 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426019790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.3426019790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2900721526 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 204329376 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:20 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900721526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2900721526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1309942300 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 2917506519 ps |
| CPU time | 30.72 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:50 AM UTC 24 |
| Peak memory | 235884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309942300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1309942300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2195508171 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 1978946519 ps |
| CPU time | 15.47 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:35 AM UTC 24 |
| Peak memory | 229380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195508171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2195508171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.2124993657 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 159474046 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:20 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124993657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.2124993657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.2355725767 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 153290820 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:59:18 AM UTC 24 |
| Finished | Oct 15 12:59:20 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355725767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.2355725767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.411416680 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 245183648 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:59:19 AM UTC 24 |
| Finished | Oct 15 12:59:22 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411416680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_nak_trans.411416680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.228507217 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 202230683 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:59:19 AM UTC 24 |
| Finished | Oct 15 12:59:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228507217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.228507217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.768821556 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 190835929 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:59:19 AM UTC 24 |
| Finished | Oct 15 12:59:22 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=768821556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_out_stall.768821556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1814803597 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 166533331 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:59:19 AM UTC 24 |
| Finished | Oct 15 12:59:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814803597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1814803597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.3100683177 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 158972981 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:59:19 AM UTC 24 |
| Finished | Oct 15 12:59:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100683177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.3100683177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3026763612 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 220971159 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:59:20 AM UTC 24 |
| Finished | Oct 15 12:59:23 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026763612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3026763612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.1846140077 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 181089855 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:59:21 AM UTC 24 |
| Finished | Oct 15 12:59:24 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846140077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.1846140077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.1241003997 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 29551871 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 12:59:21 AM UTC 24 |
| Finished | Oct 15 12:59:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241003997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.1241003997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.4137219433 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 10086336203 ps |
| CPU time | 27.83 seconds |
| Started | Oct 15 12:59:21 AM UTC 24 |
| Finished | Oct 15 12:59:51 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137219433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.4137219433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.1804114822 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 182760823 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:59:21 AM UTC 24 |
| Finished | Oct 15 12:59:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804114822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.1804114822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.2570954439 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 208648707 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:59:21 AM UTC 24 |
| Finished | Oct 15 12:59:24 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570954439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.2570954439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.2066142116 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 169446262 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066142116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.2066142116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.356760912 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 180468430 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356760912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.356760912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.3977028411 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 156742132 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977028411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.3977028411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.4187431401 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 352436670 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:27 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187431401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.4187431401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.1624538103 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 149043464 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624538103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.1624538103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.402289836 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 149452832 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=402289836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.402289836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.3289653430 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 225557638 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289653430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.3289653430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.4134654369 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 1784899114 ps |
| CPU time | 45.94 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 235812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134654369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.4134654369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.3573263002 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 163051152 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573263002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3573263002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.118189847 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 231468727 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:59:23 AM UTC 24 |
| Finished | Oct 15 12:59:26 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118189847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_stall_trans.118189847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.4161505042 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 475291440 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:59:25 AM UTC 24 |
| Finished | Oct 15 12:59:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161505042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.4161505042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.869238518 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 2353853032 ps |
| CPU time | 60 seconds |
| Started | Oct 15 12:59:25 AM UTC 24 |
| Finished | Oct 15 01:00:27 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869238518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_streaming_out.869238518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.1119391986 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 1702120977 ps |
| CPU time | 39.07 seconds |
| Started | Oct 15 12:59:13 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119391986 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.1119391986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.2434664027 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 496157459 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 12:59:25 AM UTC 24 |
| Finished | Oct 15 12:59:29 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2434664027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.2434664027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.41793441 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 626026040 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=41793441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_tx _rx_disruption.41793441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.1367577021 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 578425264 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1367577021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.1367577021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.3940290528 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 478771855 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:07:40 AM UTC 24 |
| Finished | Oct 15 01:07:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3940290528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.3940290528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.3442301583 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 627600944 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:07:41 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3442301583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.3442301583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.977727839 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 503561755 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:41 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=977727839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_t x_rx_disruption.977727839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.542852334 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 520201767 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:42 AM UTC 24 |
| Finished | Oct 15 01:07:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=542852334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_t x_rx_disruption.542852334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.2605696862 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 538332204 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 01:07:42 AM UTC 24 |
| Finished | Oct 15 01:07:55 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2605696862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.2605696862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.1982687409 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 680555287 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:42 AM UTC 24 |
| Finished | Oct 15 01:07:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1982687409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.1982687409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.1631610215 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 512723268 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:07:42 AM UTC 24 |
| Finished | Oct 15 01:07:55 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1631610215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.1631610215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.2020900326 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 605030962 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2020900326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.2020900326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.2934944646 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 95011842 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 12:59:41 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934944646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.2934944646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.3631260300 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 4697811838 ps |
| CPU time | 8.93 seconds |
| Started | Oct 15 12:59:25 AM UTC 24 |
| Finished | Oct 15 12:59:35 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631260300 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.3631260300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.2491140465 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 14053392816 ps |
| CPU time | 23.23 seconds |
| Started | Oct 15 12:59:26 AM UTC 24 |
| Finished | Oct 15 12:59:51 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491140465 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.2491140465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.2223836594 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 29562050148 ps |
| CPU time | 46.35 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223836594 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.2223836594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.1256515029 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 169433690 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:29 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256515029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.1256515029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.899395928 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 151778384 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899395928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_bitstuff_err.899395928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.718013560 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 405165906 ps |
| CPU time | 2.18 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:30 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718013560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_data_toggle_clear.718013560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.2383106437 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 334316104 ps |
| CPU time | 1.89 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:30 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383106437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.2383106437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.3236634807 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 44291942066 ps |
| CPU time | 82.8 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236634807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.3236634807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.2007658822 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 818634887 ps |
| CPU time | 15.34 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 219036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007658822 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.2007658822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.481012329 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 716656801 ps |
| CPU time | 3.15 seconds |
| Started | Oct 15 12:59:28 AM UTC 24 |
| Finished | Oct 15 12:59:33 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481012329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.481012329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.2094229439 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 144397924 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:59:28 AM UTC 24 |
| Finished | Oct 15 12:59:31 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094229439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.2094229439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_enable.1636608637 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 35878480 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 12:59:28 AM UTC 24 |
| Finished | Oct 15 12:59:31 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636608637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.1636608637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.4167382282 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 851150468 ps |
| CPU time | 3.52 seconds |
| Started | Oct 15 12:59:28 AM UTC 24 |
| Finished | Oct 15 12:59:33 AM UTC 24 |
| Peak memory | 219036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167382282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.4167382282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.3773693841 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 261416523 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 12:59:29 AM UTC 24 |
| Finished | Oct 15 12:59:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773693841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.3773693841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.3252197930 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 295917892 ps |
| CPU time | 2.26 seconds |
| Started | Oct 15 12:59:30 AM UTC 24 |
| Finished | Oct 15 12:59:34 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252197930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.3252197930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.1223964544 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 179827664 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:59:30 AM UTC 24 |
| Finished | Oct 15 12:59:33 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223964544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.1223964544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.2069251932 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 176228220 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:59:30 AM UTC 24 |
| Finished | Oct 15 12:59:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069251932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.2069251932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.2292429817 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 209259356 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:59:30 AM UTC 24 |
| Finished | Oct 15 12:59:33 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292429817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.2292429817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2031524339 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 4158390562 ps |
| CPU time | 37.54 seconds |
| Started | Oct 15 12:59:30 AM UTC 24 |
| Finished | Oct 15 01:00:09 AM UTC 24 |
| Peak memory | 235856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031524339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2031524339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.122161495 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 6470666869 ps |
| CPU time | 41.66 seconds |
| Started | Oct 15 12:59:31 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122161495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.122161495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3293138512 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 175051420 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:32 AM UTC 24 |
| Finished | Oct 15 12:59:34 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293138512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3293138512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.1692480227 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 7254848544 ps |
| CPU time | 10.13 seconds |
| Started | Oct 15 12:59:32 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692480227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.1692480227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.2155533586 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 9721016251 ps |
| CPU time | 15.43 seconds |
| Started | Oct 15 12:59:32 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155533586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.2155533586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.966688224 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 2909131363 ps |
| CPU time | 22.47 seconds |
| Started | Oct 15 12:59:32 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 231400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=966688224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.966688224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.1035720848 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 2697235106 ps |
| CPU time | 26.38 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 01:00:02 AM UTC 24 |
| Peak memory | 236100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035720848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.1035720848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.962385606 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 248864793 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962385606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.962385606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3227011812 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 192541117 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227011812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3227011812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.2535623611 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 1881705354 ps |
| CPU time | 18.45 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:54 AM UTC 24 |
| Peak memory | 235964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535623611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2535623611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.2484294003 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 2059054548 ps |
| CPU time | 55 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 235956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484294003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.2484294003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.1525568732 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 190164554 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525568732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.1525568732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2473521878 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 151031417 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473521878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.2473521878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.2952559186 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 231622574 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952559186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.2952559186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.3998786558 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 164265856 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998786558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.3998786558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1836616575 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 184576853 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:34 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836616575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1836616575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.1444382110 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 149421942 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:59:35 AM UTC 24 |
| Finished | Oct 15 12:59:37 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444382110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.1444382110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.1752488810 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 173802265 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:59:36 AM UTC 24 |
| Finished | Oct 15 12:59:38 AM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752488810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.1752488810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.64745508 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 232664121 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:59:36 AM UTC 24 |
| Finished | Oct 15 12:59:38 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64745508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.64745508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.369381709 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 146415166 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:59:36 AM UTC 24 |
| Finished | Oct 15 12:59:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369381709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.369381709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.756267329 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 38431662 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 12:59:36 AM UTC 24 |
| Finished | Oct 15 12:59:38 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756267329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_phy_pins_sense.756267329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.304879907 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 19750776870 ps |
| CPU time | 47.04 seconds |
| Started | Oct 15 12:59:37 AM UTC 24 |
| Finished | Oct 15 01:00:26 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304879907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_pkt_buffer.304879907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.4105756110 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 181709633 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:37 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105756110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.4105756110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.3409278539 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 226919713 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:59:37 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409278539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.3409278539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1811685385 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 267298885 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:59:38 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811685385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1811685385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.1170169701 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 161941479 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:59:38 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170169701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.1170169701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3880869841 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 159710328 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:59:38 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880869841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.3880869841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.4158982812 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 295505388 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:59:38 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158982812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.4158982812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.4105924232 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 157164913 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:59:38 AM UTC 24 |
| Finished | Oct 15 12:59:40 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105924232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.4105924232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.3505023369 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 230996196 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:59:39 AM UTC 24 |
| Finished | Oct 15 12:59:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505023369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.3505023369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.249491794 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 247029562 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 12:59:39 AM UTC 24 |
| Finished | Oct 15 12:59:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249491794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.249491794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.4192319214 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 3375252745 ps |
| CPU time | 91.13 seconds |
| Started | Oct 15 12:59:39 AM UTC 24 |
| Finished | Oct 15 01:01:13 AM UTC 24 |
| Peak memory | 229472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192319214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.4192319214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2241043549 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 179863317 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:59:40 AM UTC 24 |
| Finished | Oct 15 12:59:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241043549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2241043549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.1283658463 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 224791609 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:59:40 AM UTC 24 |
| Finished | Oct 15 12:59:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283658463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.1283658463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.3500147215 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 827845461 ps |
| CPU time | 2.31 seconds |
| Started | Oct 15 12:59:40 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500147215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.3500147215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.151669016 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 2683995699 ps |
| CPU time | 73.87 seconds |
| Started | Oct 15 12:59:40 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=151669016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_streaming_out.151669016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.3065904901 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 1315694015 ps |
| CPU time | 29.49 seconds |
| Started | Oct 15 12:59:27 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065904901 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.3065904901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.840927223 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 553324505 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 12:59:40 AM UTC 24 |
| Finished | Oct 15 12:59:43 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=840927223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_tx _rx_disruption.840927223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.798350182 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 565335314 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=798350182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_t x_rx_disruption.798350182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.1753743991 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 512553034 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1753743991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.1753743991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.3154714344 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 485931822 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3154714344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.3154714344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.890132148 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 465794831 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=890132148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_t x_rx_disruption.890132148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.2028419224 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 488854016 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2028419224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.2028419224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.698879044 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 520045304 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=698879044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_t x_rx_disruption.698879044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.1145586885 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 502470386 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1145586885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.1145586885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.2501764299 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 609466675 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:44 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2501764299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.2501764299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.3737091931 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 531150578 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3737091931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.3737091931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2906614477 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 556599782 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2906614477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2906614477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.1082056274 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 70617387 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082056274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.1082056274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.1380918013 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 10442479808 ps |
| CPU time | 18.48 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 01:00:01 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380918013 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.1380918013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.1895580613 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 19444742271 ps |
| CPU time | 27.39 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 01:00:10 AM UTC 24 |
| Peak memory | 219276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895580613 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.1895580613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.2642900069 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 23893881086 ps |
| CPU time | 35.69 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642900069 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.2642900069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.2955338864 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 202688571 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 12:59:44 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955338864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.2955338864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1497553060 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 144090649 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 12:59:44 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497553060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.1497553060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.3964464227 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 305495178 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 12:59:44 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964464227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.3964464227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.3567428911 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 945309666 ps |
| CPU time | 2.91 seconds |
| Started | Oct 15 12:59:42 AM UTC 24 |
| Finished | Oct 15 12:59:46 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567428911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.3567428911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.1830559317 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 32247755237 ps |
| CPU time | 56.27 seconds |
| Started | Oct 15 12:59:43 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830559317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.1830559317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.2361595837 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 418044734 ps |
| CPU time | 7.86 seconds |
| Started | Oct 15 12:59:43 AM UTC 24 |
| Finished | Oct 15 12:59:52 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361595837 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.2361595837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.2050192839 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 709261197 ps |
| CPU time | 2.4 seconds |
| Started | Oct 15 12:59:44 AM UTC 24 |
| Finished | Oct 15 12:59:47 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050192839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.2050192839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.4052219813 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 163997231 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 12:59:44 AM UTC 24 |
| Finished | Oct 15 12:59:46 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052219813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.4052219813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2326115162 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 47472036 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:59:44 AM UTC 24 |
| Finished | Oct 15 12:59:46 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326115162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.2326115162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.3537705489 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 904470703 ps |
| CPU time | 4.38 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:51 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537705489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.3537705489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2894158329 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 197604630 ps |
| CPU time | 2.32 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:49 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894158329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.2894158329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.2955591447 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 232238075 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955591447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2955591447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.1486000036 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 198661785 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486000036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.1486000036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.4221730716 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 220330038 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221730716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.4221730716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.2212217809 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 4477679502 ps |
| CPU time | 42.43 seconds |
| Started | Oct 15 12:59:45 AM UTC 24 |
| Finished | Oct 15 01:00:29 AM UTC 24 |
| Peak memory | 235852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212217809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.2212217809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.3246539983 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 7683123922 ps |
| CPU time | 58.94 seconds |
| Started | Oct 15 12:59:46 AM UTC 24 |
| Finished | Oct 15 01:00:46 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246539983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.3246539983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.4129038673 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 272829893 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:59:46 AM UTC 24 |
| Finished | Oct 15 12:59:48 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129038673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.4129038673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.1313924935 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 26500388468 ps |
| CPU time | 43.12 seconds |
| Started | Oct 15 12:59:46 AM UTC 24 |
| Finished | Oct 15 01:00:30 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313924935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.1313924935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.2903942657 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 5713441471 ps |
| CPU time | 9.34 seconds |
| Started | Oct 15 12:59:47 AM UTC 24 |
| Finished | Oct 15 12:59:57 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903942657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.2903942657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.2852180999 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 3314517348 ps |
| CPU time | 22.78 seconds |
| Started | Oct 15 12:59:47 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852180999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.2852180999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.2870226690 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 3866309727 ps |
| CPU time | 104.14 seconds |
| Started | Oct 15 12:59:47 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870226690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.2870226690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1526988424 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 239000796 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:59:48 AM UTC 24 |
| Finished | Oct 15 12:59:51 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526988424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1526988424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.4172144423 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 187299042 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:59:48 AM UTC 24 |
| Finished | Oct 15 12:59:51 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172144423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.4172144423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.1704014544 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 2032823827 ps |
| CPU time | 50.39 seconds |
| Started | Oct 15 12:59:48 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 231644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704014544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.1704014544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.3393378897 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 2739188862 ps |
| CPU time | 69.98 seconds |
| Started | Oct 15 12:59:49 AM UTC 24 |
| Finished | Oct 15 01:01:00 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393378897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.3393378897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.904178263 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 156443498 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:59:50 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904178263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.904178263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.1501758427 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 144958852 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:50 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501758427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.1501758427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.1152638024 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 201807040 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:59:50 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152638024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.1152638024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.694378677 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 187778421 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:59:50 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694378677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_out_iso.694378677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.2261170496 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 173765846 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:59:50 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261170496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.2261170496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.3765154412 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 162254679 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:59:51 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765154412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.3765154412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.3890073470 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 146476089 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:59:51 AM UTC 24 |
| Finished | Oct 15 12:59:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890073470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.3890073470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.1733937073 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 218393564 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733937073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.1733937073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.2958916066 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 147936492 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:54 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958916066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.2958916066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.1005525860 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 39307179 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005525860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.1005525860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.4066702288 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 21603299182 ps |
| CPU time | 55.71 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066702288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.4066702288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.608372685 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 196528300 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608372685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.608372685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.2035135165 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 236095944 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035135165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.2035135165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.242562058 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 188296620 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:59:52 AM UTC 24 |
| Finished | Oct 15 12:59:55 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=242562058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_random_length_in_transaction.242562058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.2788075598 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 168147417 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788075598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.2788075598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2592332425 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 140419989 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592332425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.2592332425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.2846637182 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 285630262 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846637182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.2846637182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.1950039790 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 158688268 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950039790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.1950039790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.4134760064 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 153171884 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134760064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.4134760064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2173112972 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 175533242 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173112972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2173112972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.2538177278 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 1940006943 ps |
| CPU time | 50.33 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 01:00:46 AM UTC 24 |
| Peak memory | 229364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538177278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.2538177278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.909078183 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 169296188 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:59:54 AM UTC 24 |
| Finished | Oct 15 12:59:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909078183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.909078183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.3602196053 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 167521749 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602196053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.3602196053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.989927962 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 377589058 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=989927962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_stream_len_max.989927962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.142272196 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 2158910369 ps |
| CPU time | 15.34 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 01:00:12 AM UTC 24 |
| Peak memory | 235812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142272196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_streaming_out.142272196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.1582282975 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 6742606955 ps |
| CPU time | 43.3 seconds |
| Started | Oct 15 12:59:43 AM UTC 24 |
| Finished | Oct 15 01:00:28 AM UTC 24 |
| Peak memory | 219432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1582282975 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.1582282975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.2668371368 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 561265628 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:59 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2668371368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.2668371368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1627039032 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 639256882 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1627039032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1627039032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.3352976440 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 656692866 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3352976440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.3352976440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.1674021492 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 561468058 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1674021492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.1674021492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.439196339 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 499104835 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=439196339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_t x_rx_disruption.439196339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.1514423068 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 617539822 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1514423068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.1514423068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.2651630041 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 485812126 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2651630041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.2651630041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.2151675434 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 491695249 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2151675434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.2151675434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.1985278755 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 672215598 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:07:48 AM UTC 24 |
| Finished | Oct 15 01:07:54 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1985278755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.1985278755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1120827334 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 568217097 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:07:51 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1120827334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1120827334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.3836448278 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 519336736 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:51 AM UTC 24 |
| Finished | Oct 15 01:07:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3836448278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.3836448278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.2713673627 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 74717942 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713673627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.2713673627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.1192347973 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 9099416506 ps |
| CPU time | 13.15 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 01:00:10 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192347973 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.1192347973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.3783709357 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 14143674884 ps |
| CPU time | 18.39 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 01:00:16 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783709357 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.3783709357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.325610297 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 25696197458 ps |
| CPU time | 36.77 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 01:00:34 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=325610297 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.325610297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.4101524813 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 167530275 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101524813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.4101524813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.523967160 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 164419906 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:58 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523967160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_bitstuff_err.523967160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.844151122 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 393939335 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:59:56 AM UTC 24 |
| Finished | Oct 15 12:59:59 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=844151122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.844151122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.601776085 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 624040952 ps |
| CPU time | 2.34 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:01 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601776085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.601776085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.2850279755 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 42268689005 ps |
| CPU time | 69.3 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850279755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.2850279755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.1110380999 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 3226331067 ps |
| CPU time | 23.88 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110380999 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.1110380999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.4129116784 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 923221820 ps |
| CPU time | 3.3 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:02 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129116784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.4129116784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.60717326 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 137798255 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:00 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=60717326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_disconnected.60717326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_enable.880611117 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 29756271 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880611117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.880611117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.4217714489 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 776268077 ps |
| CPU time | 3.36 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:03 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217714489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.4217714489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.748146330 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 299210090 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:01 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748146330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.748146330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2305930998 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 144333589 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305930998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.2305930998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.2283909019 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 260574961 ps |
| CPU time | 2.37 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:03 AM UTC 24 |
| Peak memory | 219048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283909019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.2283909019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.3715665377 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 173505414 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715665377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.3715665377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.2871290772 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 143311208 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871290772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.2871290772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3377337704 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 217115452 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377337704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3377337704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.3885304255 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 4106310636 ps |
| CPU time | 104.96 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 229412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885304255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.3885304255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.2585519225 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 12519663463 ps |
| CPU time | 140.74 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585519225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2585519225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.1405558717 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 233003125 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:03 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405558717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.1405558717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3644424337 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 7671811121 ps |
| CPU time | 15.44 seconds |
| Started | Oct 15 01:00:00 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644424337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3644424337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.2959720514 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 5330712248 ps |
| CPU time | 44.39 seconds |
| Started | Oct 15 01:00:01 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959720514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.2959720514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.3626090481 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 2231158789 ps |
| CPU time | 56.9 seconds |
| Started | Oct 15 01:00:02 AM UTC 24 |
| Finished | Oct 15 01:01:05 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626090481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.3626090481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.726792673 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 343670935 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:00:02 AM UTC 24 |
| Finished | Oct 15 01:00:09 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726792673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.726792673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.2646635878 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 202526687 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:00:03 AM UTC 24 |
| Finished | Oct 15 01:00:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646635878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.2646635878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1118135355 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 2510391648 ps |
| CPU time | 61.8 seconds |
| Started | Oct 15 01:00:03 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118135355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1118135355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.2638417208 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 170365140 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:00:03 AM UTC 24 |
| Finished | Oct 15 01:00:09 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638417208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.2638417208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.4187269929 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 207792330 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187269929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.4187269929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.2788761135 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 234944850 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788761135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.2788761135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.1274299322 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 174251501 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274299322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.1274299322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.2148922417 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 152688854 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:10 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148922417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.2148922417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.3202498247 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 163586510 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202498247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.3202498247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.1477796435 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 258212036 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477796435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.1477796435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3476442870 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 144123856 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476442870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3476442870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.2035042482 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 43528971 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:00:08 AM UTC 24 |
| Finished | Oct 15 01:00:10 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035042482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2035042482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.1086307337 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 8322368232 ps |
| CPU time | 22.12 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 229632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086307337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.1086307337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.2911041717 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 157765848 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:12 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911041717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.2911041717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.1010804349 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 257487958 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010804349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.1010804349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3321963252 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 196950215 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321963252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3321963252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.988429224 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 166513256 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=988429224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.988429224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.1630999851 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 145687260 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:12 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630999851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.1630999851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.3247956191 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 257775326 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:00:10 AM UTC 24 |
| Finished | Oct 15 01:00:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247956191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.3247956191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.3235226712 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 166900226 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235226712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.3235226712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.1538135301 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 178482739 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538135301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.1538135301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.3686532805 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 227540253 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686532805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.3686532805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.856753295 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 3521696560 ps |
| CPU time | 35.25 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:49 AM UTC 24 |
| Peak memory | 235908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=856753295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.856753295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.2271426747 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 170133078 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271426747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2271426747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.2112112843 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 154355376 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112112843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.2112112843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.3042641607 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 1371555363 ps |
| CPU time | 3.29 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042641607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.3042641607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.1802551367 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 2307494330 ps |
| CPU time | 21.25 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:35 AM UTC 24 |
| Peak memory | 235892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802551367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.1802551367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.3588946497 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 1601251870 ps |
| CPU time | 11.89 seconds |
| Started | Oct 15 12:59:58 AM UTC 24 |
| Finished | Oct 15 01:00:11 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588946497 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.3588946497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3078116757 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 468994124 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:15 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3078116757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.3078116757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.4057922569 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 496334948 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:07:53 AM UTC 24 |
| Finished | Oct 15 01:07:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4057922569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.4057922569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.1425156098 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 670861449 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1425156098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.1425156098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.1154523595 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 436046808 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1154523595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.1154523595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.2542089951 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 479497977 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2542089951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.2542089951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.858311916 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 525235598 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=858311916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_t x_rx_disruption.858311916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.3010514635 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 520671569 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3010514635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.3010514635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.792784656 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 481227241 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=792784656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.792784656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.2200793365 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 511439532 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2200793365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.2200793365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.2689904558 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 484596710 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:07:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2689904558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.2689904558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.296767577 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 499134751 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=296767577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_t x_rx_disruption.296767577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2393065493 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 44176332 ps |
| CPU time | 0.64 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393065493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2393065493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3806045742 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 11634391736 ps |
| CPU time | 17.38 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806045742 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3806045742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.351657964 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 15021160386 ps |
| CPU time | 19.55 seconds |
| Started | Oct 15 01:00:12 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351657964 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.351657964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.3784599955 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 30404587572 ps |
| CPU time | 45.96 seconds |
| Started | Oct 15 01:00:13 AM UTC 24 |
| Finished | Oct 15 01:01:00 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784599955 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.3784599955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.1913542261 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 162399681 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:00:14 AM UTC 24 |
| Finished | Oct 15 01:00:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913542261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.1913542261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.1762108143 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 170210221 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762108143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.1762108143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.338487233 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 278222727 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338487233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_data_toggle_clear.338487233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.1323841582 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 477078915 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323841582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.1323841582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.293583286 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 33732583350 ps |
| CPU time | 72.28 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:01:29 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293583286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_device_address.293583286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.396247065 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 859740367 ps |
| CPU time | 17.56 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396247065 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.396247065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3315447690 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 445745428 ps |
| CPU time | 1.98 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315447690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.3315447690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.3188613942 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 139944813 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188613942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.3188613942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_enable.3149351365 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 37075496 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149351365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.3149351365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.272254841 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 894736417 ps |
| CPU time | 3.62 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:20 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272254841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.272254841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.2665348033 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 531499452 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 01:00:16 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665348033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.2665348033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.3601386986 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 175189604 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:00:16 AM UTC 24 |
| Finished | Oct 15 01:00:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601386986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.3601386986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.20408896 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 581576164 ps |
| CPU time | 3.75 seconds |
| Started | Oct 15 01:00:16 AM UTC 24 |
| Finished | Oct 15 01:00:21 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20408896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_fifo_rst.20408896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.980433040 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 208663279 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:00:17 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980433040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.980433040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3550968261 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 190372085 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:00:17 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550968261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3550968261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.3262130080 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 246328957 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:00:17 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262130080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.3262130080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.2367013761 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 2787668016 ps |
| CPU time | 75.19 seconds |
| Started | Oct 15 01:00:16 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 231480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367013761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.2367013761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.2793538120 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 9826616111 ps |
| CPU time | 68.87 seconds |
| Started | Oct 15 01:00:17 AM UTC 24 |
| Finished | Oct 15 01:01:27 AM UTC 24 |
| Peak memory | 218864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793538120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2793538120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.3814540767 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 185458288 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:00:17 AM UTC 24 |
| Finished | Oct 15 01:00:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814540767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.3814540767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.1890432571 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 13693407716 ps |
| CPU time | 18.65 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890432571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.1890432571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.909473302 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 4911078393 ps |
| CPU time | 7.33 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:26 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909473302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_suspend.909473302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.1773087848 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 2920528384 ps |
| CPU time | 22.25 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:42 AM UTC 24 |
| Peak memory | 235748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773087848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.1773087848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.278539123 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 3114973859 ps |
| CPU time | 25.14 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:45 AM UTC 24 |
| Peak memory | 235940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278539123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.278539123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.3950587600 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 256667254 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:21 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950587600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.3950587600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.1764840666 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 197143480 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764840666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.1764840666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.722390388 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 2435274306 ps |
| CPU time | 23.51 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=722390388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.722390388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1840691273 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 159758844 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:00:18 AM UTC 24 |
| Finished | Oct 15 01:00:21 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840691273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1840691273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.214975408 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 174003938 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214975408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.214975408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.3367765537 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 229656852 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367765537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.3367765537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.331718933 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 146305161 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=331718933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_out_iso.331718933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.2990794660 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 163478374 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990794660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.2990794660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.1895658549 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 221761146 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895658549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.1895658549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.2945767954 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 161415705 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945767954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.2945767954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3572943307 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 212222776 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572943307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3572943307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.2761640186 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 159799362 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761640186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.2761640186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.2853541630 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 77893474 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:00:20 AM UTC 24 |
| Finished | Oct 15 01:00:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853541630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2853541630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.3046184385 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 18924862066 ps |
| CPU time | 54.47 seconds |
| Started | Oct 15 01:00:21 AM UTC 24 |
| Finished | Oct 15 01:01:17 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046184385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.3046184385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.4066349974 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 182639744 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066349974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.4066349974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1254618396 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 247622639 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:30 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254618396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.1254618396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.3632882321 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 163453897 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632882321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.3632882321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.412449809 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 230778448 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=412449809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.412449809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.1178766241 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 144768329 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:30 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178766241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.1178766241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.3834592273 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 378470539 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:00:28 AM UTC 24 |
| Finished | Oct 15 01:00:31 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834592273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.3834592273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.4197258191 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 168755283 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:00:30 AM UTC 24 |
| Finished | Oct 15 01:00:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197258191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.4197258191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.1342921551 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 160321916 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:00:30 AM UTC 24 |
| Finished | Oct 15 01:00:32 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342921551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.1342921551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.2730499305 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 230487946 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:00:30 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730499305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.2730499305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.1440180321 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 3090990645 ps |
| CPU time | 22.79 seconds |
| Started | Oct 15 01:00:30 AM UTC 24 |
| Finished | Oct 15 01:00:55 AM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440180321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.1440180321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.1005304570 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 199853247 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005304570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1005304570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.3230693269 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 151980966 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230693269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.3230693269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.2988341909 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 1015821841 ps |
| CPU time | 3.02 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:35 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988341909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.2988341909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.1071958604 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 2254855883 ps |
| CPU time | 60.82 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1071958604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.1071958604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3700275212 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 784721376 ps |
| CPU time | 13.56 seconds |
| Started | Oct 15 01:00:15 AM UTC 24 |
| Finished | Oct 15 01:00:29 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700275212 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.3700275212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2857889342 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 563510376 ps |
| CPU time | 2.15 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:34 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2857889342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2857889342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.3869917459 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 546819916 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3869917459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.3869917459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.1633872216 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 572872625 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1633872216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.1633872216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.3837691345 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 457639794 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3837691345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.3837691345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.1747877943 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 649373279 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1747877943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.1747877943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.380482527 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 537321190 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=380482527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_t x_rx_disruption.380482527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.3523573264 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 537293873 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3523573264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.3523573264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.3046162057 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 543829199 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3046162057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.3046162057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.1861020748 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 580425528 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1861020748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.1861020748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.3041798143 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 475066437 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3041798143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.3041798143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.1919047115 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 58521107 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919047115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.1919047115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.355832708 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 5334163820 ps |
| CPU time | 8.88 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355832708 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.355832708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.3514622194 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 20980872952 ps |
| CPU time | 28.3 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:01:00 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514622194 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.3514622194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.1048606138 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 24003695374 ps |
| CPU time | 38.47 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048606138 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.1048606138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3858983710 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 176731634 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858983710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.3858983710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.1073934728 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 183382573 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:00:31 AM UTC 24 |
| Finished | Oct 15 01:00:33 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073934728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.1073934728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.2815717732 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 441097610 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815717732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.2815717732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.2183989469 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 794441898 ps |
| CPU time | 2.32 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183989469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.2183989469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.2822857259 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 35002654214 ps |
| CPU time | 72.21 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822857259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.2822857259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.1268207203 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 2027579034 ps |
| CPU time | 17.15 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268207203 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.1268207203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.4133927524 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 756123488 ps |
| CPU time | 2.15 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133927524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.4133927524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.3846981982 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 150374907 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:35 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846981982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.3846981982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_enable.3395591059 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 41046191 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395591059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.3395591059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.1974909309 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 1028580587 ps |
| CPU time | 3.26 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974909309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.1974909309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.1719991630 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 246881800 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719991630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.1719991630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.940535479 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 486431756 ps |
| CPU time | 3.13 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=940535479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_fifo_rst.940535479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.2454684884 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 208676373 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:00:34 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454684884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.2454684884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.1077197128 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 147106674 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:00:34 AM UTC 24 |
| Finished | Oct 15 01:00:36 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077197128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.1077197128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.3590335534 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 203580229 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590335534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.3590335534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.2252857914 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 4886746769 ps |
| CPU time | 121.92 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 235756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252857914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.2252857914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.2951386363 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 5503282021 ps |
| CPU time | 38.1 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951386363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.2951386363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.1674449456 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 183539260 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674449456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.1674449456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.3458867860 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 12658675417 ps |
| CPU time | 23.54 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:01:00 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458867860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.3458867860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.2116461249 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 8789439528 ps |
| CPU time | 12.99 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116461249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.2116461249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.3254411356 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 4824108757 ps |
| CPU time | 45.19 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:01:22 AM UTC 24 |
| Peak memory | 231456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254411356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.3254411356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.1457554045 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 3238370824 ps |
| CPU time | 84.63 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457554045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.1457554045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.1052573722 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 241166742 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:00:35 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052573722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1052573722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.1470878603 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 188582402 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:00:36 AM UTC 24 |
| Finished | Oct 15 01:00:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470878603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.1470878603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.2487542210 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 3208642984 ps |
| CPU time | 83.67 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 229492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487542210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.2487542210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.339007715 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 228452775 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=339007715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.339007715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.3540084706 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 188550028 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540084706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.3540084706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.1064659745 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 257791350 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064659745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.1064659745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.4070118280 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 145517728 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070118280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.4070118280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.3813537573 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 187048445 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813537573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.3813537573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.774064173 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 186064753 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774064173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.774064173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.3012068093 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 151163853 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012068093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.3012068093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.852705853 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 197098373 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=852705853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.852705853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.243018589 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 164952131 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:00:37 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243018589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.243018589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.681243578 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 28555496 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 01:00:38 AM UTC 24 |
| Finished | Oct 15 01:00:40 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681243578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_phy_pins_sense.681243578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.4248613971 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 18258160662 ps |
| CPU time | 53.71 seconds |
| Started | Oct 15 01:00:38 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248613971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.4248613971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.1574661761 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 183051008 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574661761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.1574661761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.3037987750 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 218893952 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037987750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.3037987750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.272195402 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 243938811 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272195402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.272195402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.1669246436 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 160781679 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669246436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.1669246436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.2169990662 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 136535540 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:41 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169990662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.2169990662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.2859520978 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 328555340 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859520978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.2859520978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.470589505 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 152192055 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:00:39 AM UTC 24 |
| Finished | Oct 15 01:00:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470589505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_setup_stage.470589505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.4189466042 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 162476837 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189466042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.4189466042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.1952824419 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 229086586 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952824419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1952824419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.4056277721 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 2627451995 ps |
| CPU time | 18.78 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:01:01 AM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056277721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.4056277721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.433470102 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 159662686 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433470102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.433470102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3152349341 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 143341170 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:43 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152349341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.3152349341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.499164582 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 1112321341 ps |
| CPU time | 3.04 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:45 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499164582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_stream_len_max.499164582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.3966871094 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 2121889340 ps |
| CPU time | 20.29 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:01:02 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966871094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.3966871094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.3543134906 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 756655470 ps |
| CPU time | 14.86 seconds |
| Started | Oct 15 01:00:33 AM UTC 24 |
| Finished | Oct 15 01:00:49 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543134906 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.3543134906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3885336794 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 469436200 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:00:41 AM UTC 24 |
| Finished | Oct 15 01:00:44 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3885336794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3885336794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3494840699 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 640896792 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3494840699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3494840699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3715001105 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 547504781 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3715001105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3715001105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.4042480761 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 489933716 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4042480761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.4042480761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.3765672288 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 554427629 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3765672288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.3765672288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.320005235 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 499994929 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=320005235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_t x_rx_disruption.320005235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2346725255 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 606110364 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:07:55 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2346725255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2346725255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.177004450 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 558750273 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=177004450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_t x_rx_disruption.177004450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2516920638 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 635849348 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:03 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2516920638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2516920638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.2004975009 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 635771842 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2004975009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.2004975009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.333893283 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 511982773 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=333893283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_t x_rx_disruption.333893283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.2652234781 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 74368882 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:00:57 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652234781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.2652234781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1347593567 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 10509972684 ps |
| CPU time | 16.87 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:01:01 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347593567 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1347593567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.3446086926 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 19158850772 ps |
| CPU time | 28.43 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:01:13 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446086926 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.3446086926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.3821946097 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 25954420331 ps |
| CPU time | 38.48 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821946097 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.3821946097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.254355491 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 154159842 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:46 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254355491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_av_buffer.254355491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.665890297 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 144428995 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=665890297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_bitstuff_err.665890297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.1638608753 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 485927363 ps |
| CPU time | 1.87 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638608753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.1638608753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1593852557 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 515617115 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:47 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593852557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1593852557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.724637933 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 31492710719 ps |
| CPU time | 61.73 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724637933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_device_address.724637933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.1542463603 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 4326063075 ps |
| CPU time | 26.22 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542463603 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.1542463603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.2847347198 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 896073113 ps |
| CPU time | 3.02 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:47 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847347198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.2847347198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.599762419 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 140768494 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:47 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599762419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_disconnected.599762419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_enable.143696253 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 35971264 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143696253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_enable.143696253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.964894586 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 994108761 ps |
| CPU time | 4.13 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964894586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.964894586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.195202481 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 248861611 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:48 AM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195202481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_fifo_levels.195202481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3171733016 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 284144836 ps |
| CPU time | 3.48 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171733016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3171733016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.2218511132 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 216282676 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:00:48 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218511132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.2218511132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3595100078 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 151757128 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595100078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3595100078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.4054345958 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 160436870 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054345958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.4054345958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.2768936285 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 4181445154 ps |
| CPU time | 110.55 seconds |
| Started | Oct 15 01:00:45 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 231380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768936285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.2768936285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.2175882794 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 12044194056 ps |
| CPU time | 137.32 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:03:07 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175882794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.2175882794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.3119374530 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 266944144 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:00:50 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119374530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.3119374530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.485676687 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 23444079156 ps |
| CPU time | 40.88 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:01:30 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=485676687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_link_resume.485676687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.3970395969 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 10371759776 ps |
| CPU time | 14.7 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:01:03 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970395969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.3970395969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.20875332 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 4102703018 ps |
| CPU time | 31.25 seconds |
| Started | Oct 15 01:00:47 AM UTC 24 |
| Finished | Oct 15 01:01:20 AM UTC 24 |
| Peak memory | 231368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=20875332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.20875332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.1451610069 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 3695114646 ps |
| CPU time | 37.18 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:01:28 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451610069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.1451610069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.1482359986 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 253859577 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482359986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.1482359986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.3527715787 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 214830026 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527715787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.3527715787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.2718553895 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 3375688871 ps |
| CPU time | 24.33 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718553895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.2718553895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.1489263765 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 156497733 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 216556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489263765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.1489263765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.126753636 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 152268623 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126753636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.126753636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1680165275 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 191364957 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 01:00:49 AM UTC 24 |
| Finished | Oct 15 01:00:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680165275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1680165275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.1008821715 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 189767277 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:54 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008821715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.1008821715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.96490973 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 153410885 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96490973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_stall.96490973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.4280779912 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 151723710 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280779912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.4280779912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.1899248318 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 189396500 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:54 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899248318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.1899248318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.1213331413 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 223608151 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:54 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213331413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.1213331413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.148895698 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 146920843 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:54 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148895698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.148895698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.1905676515 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 39259737 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905676515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1905676515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.3483038145 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 6982467681 ps |
| CPU time | 21.9 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483038145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.3483038145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.506483781 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 185317598 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:00:51 AM UTC 24 |
| Finished | Oct 15 01:00:54 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506483781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_pkt_received.506483781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.2299452140 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 172879670 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299452140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.2299452140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2414754632 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 253590263 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414754632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2414754632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.2687642390 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 151650013 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:55 AM UTC 24 |
| Peak memory | 216496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687642390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.2687642390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.2283815676 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 168508804 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283815676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.2283815676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.184532801 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 246638369 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=184532801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_rx_full.184532801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.2856272168 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 184044097 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856272168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.2856272168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.2523751443 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 160642114 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523751443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.2523751443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.1014263490 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 230157550 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:00:53 AM UTC 24 |
| Finished | Oct 15 01:00:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014263490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.1014263490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.1215101383 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 2807923071 ps |
| CPU time | 25.17 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215101383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.1215101383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.1626380103 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 159255929 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:00:57 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626380103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1626380103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.1444113118 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 184273558 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:00:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444113118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.1444113118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.1772825586 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 519892769 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:00:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772825586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.1772825586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.3220876440 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 2595292919 ps |
| CPU time | 71.62 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:02:08 AM UTC 24 |
| Peak memory | 229276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220876440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.3220876440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.3568807073 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 1958699885 ps |
| CPU time | 12.8 seconds |
| Started | Oct 15 01:00:43 AM UTC 24 |
| Finished | Oct 15 01:00:57 AM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568807073 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.3568807073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.2319998833 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 565907513 ps |
| CPU time | 2.31 seconds |
| Started | Oct 15 01:00:55 AM UTC 24 |
| Finished | Oct 15 01:00:58 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2319998833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.2319998833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.1657196850 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 606655657 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1657196850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.1657196850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.2311034193 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 453781865 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2311034193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.2311034193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.4227786743 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 710329871 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:03 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4227786743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.4227786743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.3812222214 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 466536313 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:07:57 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3812222214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.3812222214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.626088374 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 535134671 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:04 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=626088374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_t x_rx_disruption.626088374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.1637576793 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 623056209 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1637576793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.1637576793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.447527262 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 571490211 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=447527262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_t x_rx_disruption.447527262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.2493146243 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 596586708 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2493146243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.2493146243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.2170866786 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 490482266 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2170866786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.2170866786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.2416725064 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 523930949 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2416725064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.2416725064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.3186483844 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 52826472 ps |
| CPU time | 0.75 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:14 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186483844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.3186483844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.364070759 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 4900410187 ps |
| CPU time | 8.45 seconds |
| Started | Oct 15 01:00:56 AM UTC 24 |
| Finished | Oct 15 01:01:06 AM UTC 24 |
| Peak memory | 229240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364070759 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.364070759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.3770954798 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 15020791560 ps |
| CPU time | 20.44 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:18 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770954798 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.3770954798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.1086464205 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 24443030887 ps |
| CPU time | 41.93 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:40 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086464205 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.1086464205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.3732152296 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 163899884 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:00:59 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732152296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.3732152296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1755420849 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 150822499 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:00:59 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1755420849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1755420849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.3076039711 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 173742005 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:00:59 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076039711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.3076039711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.396772278 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 882547121 ps |
| CPU time | 4.05 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:05 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396772278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.396772278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.3562629206 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 22901224404 ps |
| CPU time | 43.62 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 219380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562629206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3562629206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.3923277776 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 300372264 ps |
| CPU time | 4.33 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:05 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3923277776 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.3923277776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.2423759929 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 850261562 ps |
| CPU time | 3.28 seconds |
| Started | Oct 15 01:00:58 AM UTC 24 |
| Finished | Oct 15 01:01:06 AM UTC 24 |
| Peak memory | 218536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423759929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.2423759929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2999696547 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 147502265 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:00:58 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999696547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2999696547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_enable.616428569 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 49158946 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:00:58 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616428569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.616428569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.3829981312 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 891793593 ps |
| CPU time | 3.12 seconds |
| Started | Oct 15 01:00:58 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829981312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.3829981312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.4083080708 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 189346322 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:00:58 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083080708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.4083080708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.3598096002 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 169197229 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:01:00 AM UTC 24 |
| Finished | Oct 15 01:01:02 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598096002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.3598096002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2582137895 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 186670474 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 01:01:00 AM UTC 24 |
| Finished | Oct 15 01:01:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582137895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2582137895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.4035092528 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 213752693 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:00 AM UTC 24 |
| Finished | Oct 15 01:01:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035092528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.4035092528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.3417676737 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 147774934 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:01:00 AM UTC 24 |
| Finished | Oct 15 01:01:02 AM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417676737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.3417676737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.3948762065 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 182256395 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:01:01 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 216212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948762065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.3948762065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.1309669167 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 3756136894 ps |
| CPU time | 100.84 seconds |
| Started | Oct 15 01:01:00 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 231508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309669167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.1309669167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.4253019523 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 7332622003 ps |
| CPU time | 51.99 seconds |
| Started | Oct 15 01:01:01 AM UTC 24 |
| Finished | Oct 15 01:01:55 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253019523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.4253019523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.2285033110 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 209308300 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:01:01 AM UTC 24 |
| Finished | Oct 15 01:01:04 AM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285033110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.2285033110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.3863623046 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 33557672441 ps |
| CPU time | 60.46 seconds |
| Started | Oct 15 01:01:01 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863623046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.3863623046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.2076907689 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 4018219561 ps |
| CPU time | 6.77 seconds |
| Started | Oct 15 01:01:01 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076907689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.2076907689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3083386888 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 3501560593 ps |
| CPU time | 27.56 seconds |
| Started | Oct 15 01:01:03 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 231308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083386888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3083386888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.3143547028 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 2214691129 ps |
| CPU time | 21.23 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:27 AM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143547028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3143547028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.1676888548 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 236855620 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:07 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676888548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.1676888548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.478227829 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 192856674 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:07 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478227829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.478227829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.179791560 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 1939515932 ps |
| CPU time | 18.48 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:24 AM UTC 24 |
| Peak memory | 229200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179791560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.179791560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.1393852496 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 155143147 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:07 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393852496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1393852496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.4237930382 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 212080702 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:01:04 AM UTC 24 |
| Finished | Oct 15 01:01:07 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237930382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.4237930382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.2303740368 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 158322061 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303740368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.2303740368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.1757674480 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 183020991 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757674480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.1757674480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.2811775395 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 188124971 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811775395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.2811775395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.302060731 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 157738603 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302060731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pending_in_trans.302060731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.955791845 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 182486135 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=955791845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.955791845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.1379488646 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 172163562 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379488646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.1379488646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.2686227010 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 73709480 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:01:06 AM UTC 24 |
| Finished | Oct 15 01:01:09 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686227010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.2686227010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.3204657998 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 10113297130 ps |
| CPU time | 28.32 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 229432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204657998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.3204657998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.940310477 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 180995477 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=940310477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_pkt_received.940310477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.1184658301 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 195013158 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184658301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.1184658301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.3014955279 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 172512099 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014955279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.3014955279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.252645362 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 170826006 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252645362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.252645362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.3632261327 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 160544327 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:10 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632261327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.3632261327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.3859677406 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 248486531 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:01:08 AM UTC 24 |
| Finished | Oct 15 01:01:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859677406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.3859677406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.2864082149 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 170992882 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864082149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.2864082149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.1304271958 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 151332561 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:12 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304271958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.1304271958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.597085536 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 212790775 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:12 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597085536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.597085536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1306244635 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 2818154964 ps |
| CPU time | 20.84 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 231364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306244635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1306244635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.3716971104 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 171650860 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716971104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.3716971104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.905654452 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 153357752 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:12 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905654452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_stall_trans.905654452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.3864630305 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 425753092 ps |
| CPU time | 2.05 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:13 AM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864630305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.3864630305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3341480502 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 2327164065 ps |
| CPU time | 22.36 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:34 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341480502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3341480502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.980284165 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 3432547798 ps |
| CPU time | 29.22 seconds |
| Started | Oct 15 01:00:57 AM UTC 24 |
| Finished | Oct 15 01:01:31 AM UTC 24 |
| Peak memory | 219176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980284165 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.980284165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3070694311 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 513163339 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:01:10 AM UTC 24 |
| Finished | Oct 15 01:01:13 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3070694311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3070694311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.1303123973 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 440097713 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1303123973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.1303123973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.2431617536 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 585743408 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2431617536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.2431617536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.3454965079 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 518342631 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:07:58 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3454965079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.3454965079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.2683639144 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 526548260 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:07:59 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2683639144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.2683639144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.4157406214 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 624402231 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:07:59 AM UTC 24 |
| Finished | Oct 15 01:08:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4157406214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.4157406214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.637737905 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 629961092 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:08:01 AM UTC 24 |
| Finished | Oct 15 01:08:03 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=637737905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_t x_rx_disruption.637737905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.1217512567 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 610999786 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:08:02 AM UTC 24 |
| Finished | Oct 15 01:08:05 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1217512567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.1217512567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2339267904 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 405795637 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:08:02 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2339267904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2339267904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.3990471042 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 524815845 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:08:02 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3990471042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.3990471042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.3086812567 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 498486633 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:08:02 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3086812567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.3086812567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.766835416 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 50444171 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:52:29 AM UTC 24 |
| Finished | Oct 15 12:52:31 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766835416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.766835416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3954304085 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 10471977659 ps |
| CPU time | 15.58 seconds |
| Started | Oct 15 12:51:48 AM UTC 24 |
| Finished | Oct 15 12:52:04 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954304085 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.3954304085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.4280938490 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 16155198841 ps |
| CPU time | 26.89 seconds |
| Started | Oct 15 12:51:48 AM UTC 24 |
| Finished | Oct 15 12:52:16 AM UTC 24 |
| Peak memory | 229136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280938490 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.4280938490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.490497389 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 26112353989 ps |
| CPU time | 52.91 seconds |
| Started | Oct 15 12:51:48 AM UTC 24 |
| Finished | Oct 15 12:52:42 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=490497389 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.490497389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1609613703 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 158388673 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:51:49 AM UTC 24 |
| Finished | Oct 15 12:51:51 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609613703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.1609613703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.4169328525 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 161016389 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:51:50 AM UTC 24 |
| Finished | Oct 15 12:51:53 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169328525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.4169328525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.2075847257 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 146138567 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:51:50 AM UTC 24 |
| Finished | Oct 15 12:51:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075847257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.2075847257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.250731873 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 150928338 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:51:50 AM UTC 24 |
| Finished | Oct 15 12:51:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250731873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.250731873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.3633629923 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 234183076 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:51:50 AM UTC 24 |
| Finished | Oct 15 12:51:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633629923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.3633629923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3162489819 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 727059332 ps |
| CPU time | 2.36 seconds |
| Started | Oct 15 12:51:52 AM UTC 24 |
| Finished | Oct 15 12:51:55 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162489819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3162489819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.1500172071 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 3874395843 ps |
| CPU time | 36.26 seconds |
| Started | Oct 15 12:51:53 AM UTC 24 |
| Finished | Oct 15 12:52:30 AM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500172071 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.1500172071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.3872517007 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 533638184 ps |
| CPU time | 2.7 seconds |
| Started | Oct 15 12:51:54 AM UTC 24 |
| Finished | Oct 15 12:51:58 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872517007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.3872517007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2758303605 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 142930561 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:51:54 AM UTC 24 |
| Finished | Oct 15 12:51:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758303605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.2758303605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_enable.885369835 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 35553549 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 12:51:54 AM UTC 24 |
| Finished | Oct 15 12:51:56 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=885369835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.885369835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.2005024584 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 955491502 ps |
| CPU time | 3.19 seconds |
| Started | Oct 15 12:51:54 AM UTC 24 |
| Finished | Oct 15 12:51:59 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005024584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.2005024584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.620053812 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 428663658 ps |
| CPU time | 3.92 seconds |
| Started | Oct 15 12:51:58 AM UTC 24 |
| Finished | Oct 15 12:52:03 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620053812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_fifo_rst.620053812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2620584444 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 100194241863 ps |
| CPU time | 170.11 seconds |
| Started | Oct 15 12:51:58 AM UTC 24 |
| Finished | Oct 15 12:54:51 AM UTC 24 |
| Peak memory | 219188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620584444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.2620584444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3747344949 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 120096368226 ps |
| CPU time | 233.12 seconds |
| Started | Oct 15 12:51:58 AM UTC 24 |
| Finished | Oct 15 12:55:55 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3747344949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.3747344949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.4102853267 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 89112061996 ps |
| CPU time | 168.22 seconds |
| Started | Oct 15 12:51:58 AM UTC 24 |
| Finished | Oct 15 12:54:49 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102853267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.4102853267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.1942645980 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 101220098949 ps |
| CPU time | 187.54 seconds |
| Started | Oct 15 12:51:58 AM UTC 24 |
| Finished | Oct 15 12:55:09 AM UTC 24 |
| Peak memory | 219312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1942645980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.1942645980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.343124028 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 120168180694 ps |
| CPU time | 206.03 seconds |
| Started | Oct 15 12:52:03 AM UTC 24 |
| Finished | Oct 15 12:55:32 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=343124028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_phase.343124028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3715326878 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 223717434 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 12:52:03 AM UTC 24 |
| Finished | Oct 15 12:52:06 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715326878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3715326878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.815625119 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 144158652 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:52:03 AM UTC 24 |
| Finished | Oct 15 12:52:06 AM UTC 24 |
| Peak memory | 216272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=815625119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_stall.815625119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.1590874879 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 161651195 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 12:52:04 AM UTC 24 |
| Finished | Oct 15 12:52:06 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590874879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.1590874879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.1289612487 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 3465356456 ps |
| CPU time | 45.03 seconds |
| Started | Oct 15 12:52:03 AM UTC 24 |
| Finished | Oct 15 12:52:50 AM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289612487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.1289612487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.1242605256 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 13250083796 ps |
| CPU time | 83.97 seconds |
| Started | Oct 15 12:52:05 AM UTC 24 |
| Finished | Oct 15 12:53:31 AM UTC 24 |
| Peak memory | 218900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242605256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.1242605256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1120723201 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 233782866 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:52:05 AM UTC 24 |
| Finished | Oct 15 12:52:07 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120723201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1120723201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.3468410046 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 29923384612 ps |
| CPU time | 54.82 seconds |
| Started | Oct 15 12:52:05 AM UTC 24 |
| Finished | Oct 15 12:53:01 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468410046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.3468410046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.4057572257 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 4076897160 ps |
| CPU time | 12.09 seconds |
| Started | Oct 15 12:52:05 AM UTC 24 |
| Finished | Oct 15 12:52:18 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057572257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.4057572257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.4082122969 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 4453676248 ps |
| CPU time | 45.6 seconds |
| Started | Oct 15 12:52:05 AM UTC 24 |
| Finished | Oct 15 12:52:52 AM UTC 24 |
| Peak memory | 231376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082122969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.4082122969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.3240667842 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 2509740096 ps |
| CPU time | 71.63 seconds |
| Started | Oct 15 12:52:06 AM UTC 24 |
| Finished | Oct 15 12:53:20 AM UTC 24 |
| Peak memory | 228992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240667842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.3240667842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.2939421583 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 271543791 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:52:06 AM UTC 24 |
| Finished | Oct 15 12:52:09 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939421583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.2939421583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3478954919 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 214625338 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:52:06 AM UTC 24 |
| Finished | Oct 15 12:52:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478954919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.3478954919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3780003504 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 3157935861 ps |
| CPU time | 32.57 seconds |
| Started | Oct 15 12:52:07 AM UTC 24 |
| Finished | Oct 15 12:52:41 AM UTC 24 |
| Peak memory | 235932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780003504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3780003504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.4265127328 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 2770853731 ps |
| CPU time | 23.35 seconds |
| Started | Oct 15 12:52:09 AM UTC 24 |
| Finished | Oct 15 12:52:33 AM UTC 24 |
| Peak memory | 231472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265127328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.4265127328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.4290421470 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 2370144979 ps |
| CPU time | 20.21 seconds |
| Started | Oct 15 12:52:09 AM UTC 24 |
| Finished | Oct 15 12:52:30 AM UTC 24 |
| Peak memory | 235816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290421470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.4290421470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.3750691172 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 170358884 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:52:10 AM UTC 24 |
| Finished | Oct 15 12:52:12 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750691172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.3750691172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2662095700 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 176905446 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:52:10 AM UTC 24 |
| Finished | Oct 15 12:52:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662095700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2662095700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.3053776812 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 186050102 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:52:10 AM UTC 24 |
| Finished | Oct 15 12:52:12 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053776812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.3053776812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.312248666 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 179977848 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:52:11 AM UTC 24 |
| Finished | Oct 15 12:52:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312248666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_out_iso.312248666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2607387382 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 218750571 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:52:14 AM UTC 24 |
| Finished | Oct 15 12:52:16 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607387382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2607387382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.681592897 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 177538974 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:52:14 AM UTC 24 |
| Finished | Oct 15 12:52:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681592897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_out_trans_nak.681592897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.1131845914 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 152483507 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:52:14 AM UTC 24 |
| Finished | Oct 15 12:52:16 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131845914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.1131845914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.1194127985 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 276469746 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 12:52:14 AM UTC 24 |
| Finished | Oct 15 12:52:17 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194127985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.1194127985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.1943517016 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 207629861 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:52:14 AM UTC 24 |
| Finished | Oct 15 12:52:17 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943517016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.1943517016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.979962925 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 179244945 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:52:17 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=979962925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.979962925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3353069368 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 96690246 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:52:17 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353069368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3353069368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.1967357288 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 10768777034 ps |
| CPU time | 38.39 seconds |
| Started | Oct 15 12:52:17 AM UTC 24 |
| Finished | Oct 15 12:52:57 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967357288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.1967357288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.814938210 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 187964148 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:52:17 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814938210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.814938210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.3776385594 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 236972911 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:52:17 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776385594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.3776385594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.496894094 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 2985046741 ps |
| CPU time | 27.21 seconds |
| Started | Oct 15 12:52:19 AM UTC 24 |
| Finished | Oct 15 12:52:48 AM UTC 24 |
| Peak memory | 235824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496894094 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.496894094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.4067960724 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 18744645633 ps |
| CPU time | 386.28 seconds |
| Started | Oct 15 12:52:19 AM UTC 24 |
| Finished | Oct 15 12:58:51 AM UTC 24 |
| Peak memory | 235928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067960724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.4067960724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.895581133 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 7689197018 ps |
| CPU time | 105.8 seconds |
| Started | Oct 15 12:52:19 AM UTC 24 |
| Finished | Oct 15 12:54:07 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=895581133 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.895581133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.1384228257 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 219460120 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:52:18 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384228257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.1384228257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.3822260063 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 156788880 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:52:18 AM UTC 24 |
| Finished | Oct 15 12:52:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822260063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.3822260063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.2724498222 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 20153416822 ps |
| CPU time | 47.6 seconds |
| Started | Oct 15 12:52:19 AM UTC 24 |
| Finished | Oct 15 12:53:09 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724498222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.2724498222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.1015750883 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 234551440 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:52:20 AM UTC 24 |
| Finished | Oct 15 12:52:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015750883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.1015750883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3660218387 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 255174620 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 12:52:20 AM UTC 24 |
| Finished | Oct 15 12:52:24 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660218387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3660218387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.33934731 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 181460852 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:52:21 AM UTC 24 |
| Finished | Oct 15 12:52:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33934731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_rx_pid_err.33934731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.1922090883 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 1308038382 ps |
| CPU time | 2.81 seconds |
| Started | Oct 15 12:52:28 AM UTC 24 |
| Finished | Oct 15 12:52:32 AM UTC 24 |
| Peak memory | 253244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922090883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1922090883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.988511092 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 375051266 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 12:52:21 AM UTC 24 |
| Finished | Oct 15 12:52:24 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=988511092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_setup_priority.988511092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.398710998 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 179468877 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:52:21 AM UTC 24 |
| Finished | Oct 15 12:52:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398710998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.398710998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.3963041995 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 156396580 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:52:21 AM UTC 24 |
| Finished | Oct 15 12:52:24 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963041995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.3963041995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.477343779 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 152490478 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:27 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477343779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_setup_trans_ignored.477343779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1393743927 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 222660142 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393743927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1393743927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.1423676141 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 2508611281 ps |
| CPU time | 24.66 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:50 AM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423676141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1423676141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3677269648 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 186517950 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:27 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677269648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.3677269648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2534140020 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 182942447 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:27 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534140020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2534140020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.2213129720 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 1068081577 ps |
| CPU time | 4.32 seconds |
| Started | Oct 15 12:52:26 AM UTC 24 |
| Finished | Oct 15 12:52:32 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213129720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.2213129720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.686467641 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 3073818782 ps |
| CPU time | 28.94 seconds |
| Started | Oct 15 12:52:24 AM UTC 24 |
| Finished | Oct 15 12:52:55 AM UTC 24 |
| Peak memory | 235956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686467641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_streaming_out.686467641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.604103718 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 10464034251 ps |
| CPU time | 89.91 seconds |
| Started | Oct 15 12:52:26 AM UTC 24 |
| Finished | Oct 15 12:53:58 AM UTC 24 |
| Peak memory | 229560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=604103718 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 4/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.604103718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.3657088609 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 1365405221 ps |
| CPU time | 10.31 seconds |
| Started | Oct 15 12:51:53 AM UTC 24 |
| Finished | Oct 15 12:52:04 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657088609 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.3657088609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2533800916 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 520396117 ps |
| CPU time | 2.65 seconds |
| Started | Oct 15 12:52:27 AM UTC 24 |
| Finished | Oct 15 12:52:31 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2533800916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2533800916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.2224520965 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 41667969 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:28 AM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224520965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2224520965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.1070670970 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 6673441627 ps |
| CPU time | 9.94 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070670970 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.1070670970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.61773750 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 20772686548 ps |
| CPU time | 28.29 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61773750 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.61773750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.2775649739 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 24978351435 ps |
| CPU time | 36.84 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:50 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775649739 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.2775649739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.167758556 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 158042431 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:14 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167758556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_av_buffer.167758556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.3007382546 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 192949821 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007382546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.3007382546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.1503792361 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 515817411 ps |
| CPU time | 2.08 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503792361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.1503792361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.205942994 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 435396546 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:15 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=205942994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.205942994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.1831817056 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 30352350191 ps |
| CPU time | 55.68 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:02:10 AM UTC 24 |
| Peak memory | 219328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831817056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.1831817056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.180393884 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 1576760076 ps |
| CPU time | 35.47 seconds |
| Started | Oct 15 01:01:12 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=180393884 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.180393884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.862002151 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 875811296 ps |
| CPU time | 2.49 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:18 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862002151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.862002151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.4261096041 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 169956814 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261096041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.4261096041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_enable.533680904 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 71757794 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533680904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.533680904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.1935551699 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 1002827453 ps |
| CPU time | 3.76 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:19 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935551699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.1935551699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.258281499 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 173636239 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:17 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258281499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_fifo_levels.258281499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.572783198 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 311997781 ps |
| CPU time | 3.29 seconds |
| Started | Oct 15 01:01:15 AM UTC 24 |
| Finished | Oct 15 01:01:19 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=572783198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_fifo_rst.572783198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.3042692906 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 170363173 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:01:15 AM UTC 24 |
| Finished | Oct 15 01:01:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042692906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.3042692906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2231323269 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 137566926 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:01:15 AM UTC 24 |
| Finished | Oct 15 01:01:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231323269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2231323269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.2596051422 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 184233608 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:01:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596051422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.2596051422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.3597496929 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 13025347745 ps |
| CPU time | 84.73 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597496929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.3597496929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.1855617226 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 166050865 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:01:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855617226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.1855617226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.4118066430 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 28018556865 ps |
| CPU time | 42.51 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:02:00 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118066430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.4118066430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.544813384 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 8312960961 ps |
| CPU time | 15.17 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544813384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_suspend.544813384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.1144481221 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 5374267787 ps |
| CPU time | 51.92 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:02:10 AM UTC 24 |
| Peak memory | 231364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144481221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1144481221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.3230520318 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 1757975317 ps |
| CPU time | 14.66 seconds |
| Started | Oct 15 01:01:16 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230520318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.3230520318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.3288490320 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 265496307 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:01:18 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288490320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.3288490320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.290882633 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 185374503 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:01:18 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290882633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.290882633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.525636077 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 2510172531 ps |
| CPU time | 19.38 seconds |
| Started | Oct 15 01:01:18 AM UTC 24 |
| Finished | Oct 15 01:01:39 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525636077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.525636077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.35787715 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 214680599 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:01:19 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=35787715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.35787715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.3876934765 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 149488313 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:01:19 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876934765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3876934765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.4207509697 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 200671761 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:01:19 AM UTC 24 |
| Finished | Oct 15 01:01:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207509697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.4207509697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.3834336489 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 158436116 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834336489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.3834336489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2917119446 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 161872720 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917119446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2917119446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.238393332 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 232610085 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238393332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_out_trans_nak.238393332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.3014336597 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 163062823 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014336597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.3014336597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.75641854 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 245807303 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75641854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.75641854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.2542543969 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 192114587 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:23 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542543969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.2542543969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.202888642 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 34540914 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 01:01:20 AM UTC 24 |
| Finished | Oct 15 01:01:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202888642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_phy_pins_sense.202888642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3633020521 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 22104363465 ps |
| CPU time | 56 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633020521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3633020521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.3595393628 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 162718401 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:24 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595393628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.3595393628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.2365742595 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 238599281 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365742595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.2365742595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.2746553755 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 172647114 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746553755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.2746553755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.1792123293 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 172391804 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:25 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792123293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.1792123293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.2037142717 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 143513033 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:24 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037142717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.2037142717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.1696750344 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 335276082 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:01:22 AM UTC 24 |
| Finished | Oct 15 01:01:25 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696750344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.1696750344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.2300248452 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 158646439 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300248452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.2300248452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2293913724 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 169059343 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:26 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293913724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2293913724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.1133713928 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 230195007 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133713928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.1133713928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.2941923454 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 2732827558 ps |
| CPU time | 70.14 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:02:36 AM UTC 24 |
| Peak memory | 231384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941923454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.2941923454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.3980235508 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 161867863 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980235508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3980235508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.1066775164 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 202347082 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066775164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.1066775164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.4285600991 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 1235931373 ps |
| CPU time | 3.6 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:29 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285600991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.4285600991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.3756015791 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 2540644249 ps |
| CPU time | 20.48 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:46 AM UTC 24 |
| Peak memory | 229168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756015791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.3756015791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.2947236516 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 748131528 ps |
| CPU time | 15.31 seconds |
| Started | Oct 15 01:01:14 AM UTC 24 |
| Finished | Oct 15 01:01:31 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947236516 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.2947236516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.2798660565 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 588213622 ps |
| CPU time | 2.37 seconds |
| Started | Oct 15 01:01:24 AM UTC 24 |
| Finished | Oct 15 01:01:28 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2798660565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.2798660565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.1142538931 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 625403954 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:08:02 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1142538931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.1142538931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.3990373152 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 467336134 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:08:03 AM UTC 24 |
| Finished | Oct 15 01:08:17 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3990373152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.3990373152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.30005185 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 463879622 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:17 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=30005185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_tx _rx_disruption.30005185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2400679776 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 572044797 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2400679776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2400679776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.2985923682 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 577246443 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2985923682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.2985923682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.996900714 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 568064878 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:06 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=996900714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_t x_rx_disruption.996900714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.3774941127 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 533681266 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3774941127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.3774941127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.1244241071 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 485928665 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1244241071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.1244241071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.3780347286 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 582454834 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3780347286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.3780347286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.1269945080 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 600088158 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1269945080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.1269945080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.1230582341 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 98844862 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:41 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230582341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.1230582341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.2332586212 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 10220773865 ps |
| CPU time | 16 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:43 AM UTC 24 |
| Peak memory | 218496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332586212 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.2332586212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.2383903321 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 14380531561 ps |
| CPU time | 19.37 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:46 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383903321 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.2383903321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.2756613088 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 23389225880 ps |
| CPU time | 33.44 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:02:00 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756613088 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.2756613088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.1124515715 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 209796006 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:28 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124515715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.1124515715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.16097020 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 161608437 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:28 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16097020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_bitstuff_err.16097020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.2706094464 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 214406919 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:01:26 AM UTC 24 |
| Finished | Oct 15 01:01:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706094464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.2706094464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.2046251434 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 848380686 ps |
| CPU time | 2.99 seconds |
| Started | Oct 15 01:01:27 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046251434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.2046251434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.2199311997 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 25134020857 ps |
| CPU time | 43.88 seconds |
| Started | Oct 15 01:01:27 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199311997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.2199311997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.127688069 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 149247831 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:27 AM UTC 24 |
| Finished | Oct 15 01:01:30 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127688069 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.127688069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.1242447145 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 585655182 ps |
| CPU time | 2.1 seconds |
| Started | Oct 15 01:01:27 AM UTC 24 |
| Finished | Oct 15 01:01:31 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242447145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.1242447145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.788028579 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 158081607 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:01:28 AM UTC 24 |
| Finished | Oct 15 01:01:30 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788028579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_disconnected.788028579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_enable.233887008 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 137712021 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233887008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.233887008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.4124623100 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 944956372 ps |
| CPU time | 3.5 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:34 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124623100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.4124623100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2726723255 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 699309864 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726723255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2726723255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.3652698731 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 278567562 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652698731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.3652698731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2650310377 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 334782336 ps |
| CPU time | 2.54 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650310377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2650310377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.4019713064 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 219246958 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019713064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.4019713064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.3180725245 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 180555111 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:01:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180725245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.3180725245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.1306910015 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 212600538 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:01:31 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306910015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.1306910015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3814845602 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 4583282817 ps |
| CPU time | 32.37 seconds |
| Started | Oct 15 01:01:29 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814845602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3814845602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.2217089078 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 9210788139 ps |
| CPU time | 107.51 seconds |
| Started | Oct 15 01:01:31 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217089078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.2217089078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.2313370341 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 250748368 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:01:31 AM UTC 24 |
| Finished | Oct 15 01:01:33 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313370341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.2313370341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.2679221357 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 32390476717 ps |
| CPU time | 48.89 seconds |
| Started | Oct 15 01:01:31 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679221357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.2679221357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.2087449956 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 5573291079 ps |
| CPU time | 9.85 seconds |
| Started | Oct 15 01:01:31 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087449956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.2087449956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.3304018017 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 4278983335 ps |
| CPU time | 32.77 seconds |
| Started | Oct 15 01:01:32 AM UTC 24 |
| Finished | Oct 15 01:02:07 AM UTC 24 |
| Peak memory | 235896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304018017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.3304018017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.1313995692 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 1273926736 ps |
| CPU time | 33.23 seconds |
| Started | Oct 15 01:01:32 AM UTC 24 |
| Finished | Oct 15 01:02:07 AM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313995692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.1313995692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.338018378 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 303956283 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=338018378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.338018378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3748489255 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 207165471 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748489255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3748489255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.2491691428 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 2254716518 ps |
| CPU time | 21.1 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:55 AM UTC 24 |
| Peak memory | 229408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491691428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.2491691428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.3898978602 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 170508113 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898978602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.3898978602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.816475823 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 143480918 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816475823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.816475823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.640043358 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 241533293 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640043358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_nak_trans.640043358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1507464274 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 179877263 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:01:33 AM UTC 24 |
| Finished | Oct 15 01:01:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507464274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1507464274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.844633609 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 175064395 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=844633609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_out_stall.844633609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.4114196400 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 166653421 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114196400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.4114196400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.460466127 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 163762904 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460466127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pending_in_trans.460466127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.1405034975 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 226293205 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405034975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.1405034975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.1890660167 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 149092343 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890660167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1890660167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.495793659 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 41386947 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495793659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.495793659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.3274455965 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 15768160860 ps |
| CPU time | 43.98 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274455965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.3274455965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.3704324446 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 183196058 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704324446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.3704324446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.3963453513 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 162725968 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963453513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.3963453513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.3634019679 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 242500756 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634019679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.3634019679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.361731513 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 181088497 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361731513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.361731513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3564085272 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 136967335 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:37 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564085272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3564085272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.380569526 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 371100430 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380569526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_rx_full.380569526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.327111088 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 183710754 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:01:35 AM UTC 24 |
| Finished | Oct 15 01:01:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327111088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_setup_stage.327111088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.2003985181 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 177529340 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:01:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003985181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.2003985181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2466326789 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 252117995 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:01:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466326789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2466326789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.3036719678 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 2506613405 ps |
| CPU time | 68.48 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036719678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.3036719678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1758369364 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 160243693 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:01:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758369364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1758369364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.3055133784 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 159874544 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:01:39 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055133784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.3055133784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.552906098 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 886404707 ps |
| CPU time | 3.55 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:43 AM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552906098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_stream_len_max.552906098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.3700391390 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 2886179601 ps |
| CPU time | 74.83 seconds |
| Started | Oct 15 01:01:37 AM UTC 24 |
| Finished | Oct 15 01:02:54 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700391390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.3700391390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3968388432 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 2198455623 ps |
| CPU time | 13.75 seconds |
| Started | Oct 15 01:01:27 AM UTC 24 |
| Finished | Oct 15 01:01:43 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968388432 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3968388432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.4262115383 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 449505466 ps |
| CPU time | 2.47 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4262115383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.4262115383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.2838926062 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 615073579 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2838926062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_ tx_rx_disruption.2838926062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.2183129734 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 685417088 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2183129734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.2183129734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.826724284 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 501232579 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:08:04 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=826724284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_t x_rx_disruption.826724284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.2417851852 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 619038033 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:08:05 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2417851852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.2417851852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.2798507144 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 474129875 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:08:05 AM UTC 24 |
| Finished | Oct 15 01:08:08 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2798507144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.2798507144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1239737039 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 512067895 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:08:06 AM UTC 24 |
| Finished | Oct 15 01:08:09 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1239737039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1239737039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.766421633 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 614227452 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:08:07 AM UTC 24 |
| Finished | Oct 15 01:08:17 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=766421633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_t x_rx_disruption.766421633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.3052357181 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 437398662 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:08:07 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3052357181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.3052357181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.2941399372 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 573579563 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:07 AM UTC 24 |
| Finished | Oct 15 01:08:17 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2941399372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.2941399372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.2699587190 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 88901023 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699587190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2699587190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.2895862477 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 9839282398 ps |
| CPU time | 14.91 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:55 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895862477 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.2895862477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3984520784 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 19646753140 ps |
| CPU time | 28.76 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:02:09 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984520784 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3984520784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3901909036 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 24268921882 ps |
| CPU time | 34.83 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:02:15 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901909036 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3901909036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.3410027452 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 161957872 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410027452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.3410027452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.251604347 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 143157144 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251604347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_bitstuff_err.251604347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2215955364 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 422989747 ps |
| CPU time | 2.13 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:42 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215955364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2215955364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.3493443180 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 1100309534 ps |
| CPU time | 3.12 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:44 AM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493443180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3493443180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.2299934753 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 31115757516 ps |
| CPU time | 53.08 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:02:34 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299934753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2299934753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2909021374 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 1001148204 ps |
| CPU time | 20.08 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:02:01 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909021374 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2909021374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.3658255385 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 776841982 ps |
| CPU time | 3.19 seconds |
| Started | Oct 15 01:01:40 AM UTC 24 |
| Finished | Oct 15 01:01:44 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658255385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.3658255385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.1079550596 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 193187681 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:43 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079550596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.1079550596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_enable.3554474829 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 28929911 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554474829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.3554474829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.3726324630 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 901942108 ps |
| CPU time | 3.11 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:45 AM UTC 24 |
| Peak memory | 218800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726324630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.3726324630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.2339663508 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 619131537 ps |
| CPU time | 2.19 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:44 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339663508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.2339663508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.889604231 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 273770958 ps |
| CPU time | 2.79 seconds |
| Started | Oct 15 01:01:41 AM UTC 24 |
| Finished | Oct 15 01:01:45 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889604231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_fifo_rst.889604231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.2296420890 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 202048049 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:01:46 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296420890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.2296420890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.3339363542 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 163248261 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:01:45 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339363542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.3339363542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.1824042670 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 177620286 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:01:46 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824042670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.1824042670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.566483122 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 2944908411 ps |
| CPU time | 21.47 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:02:06 AM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=566483122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.566483122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.3678936055 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 5784447822 ps |
| CPU time | 66.6 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678936055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.3678936055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.3972396225 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 298887006 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:01:46 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972396225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.3972396225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2108593930 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 28770654960 ps |
| CPU time | 49.6 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:02:34 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108593930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2108593930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.701337253 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 8837274115 ps |
| CPU time | 13.19 seconds |
| Started | Oct 15 01:01:43 AM UTC 24 |
| Finished | Oct 15 01:01:58 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701337253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_suspend.701337253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.3603490767 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 4262497767 ps |
| CPU time | 38.41 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 231364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603490767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3603490767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.1848043467 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 2686505574 ps |
| CPU time | 20.15 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:02:06 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848043467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.1848043467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.2278986648 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 261873315 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278986648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2278986648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.2706064164 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 243499180 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706064164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.2706064164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.2212660646 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 1548312099 ps |
| CPU time | 11.88 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:58 AM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212660646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.2212660646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.2654606547 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 161621764 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:47 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654606547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.2654606547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.1598720796 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 153861431 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:48 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598720796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.1598720796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.1042764178 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 186103104 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042764178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.1042764178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.3548119434 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 207688596 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548119434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.3548119434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.640215115 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 172340095 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:01:45 AM UTC 24 |
| Finished | Oct 15 01:01:48 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640215115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_out_stall.640215115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.4288221771 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 175622268 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288221771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.4288221771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.2233376556 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 152955746 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233376556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.2233376556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.488921160 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 237840755 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488921160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.488921160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.3234405375 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 150686947 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234405375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.3234405375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.2758824047 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 58211269 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:49 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758824047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.2758824047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.172971348 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 11184813854 ps |
| CPU time | 28.47 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:02:17 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172971348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_pkt_buffer.172971348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.599322791 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 194192495 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:01:47 AM UTC 24 |
| Finished | Oct 15 01:01:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599322791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_pkt_received.599322791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.3926019532 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 253982355 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926019532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.3926019532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.3239193720 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 234526781 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239193720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.3239193720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.3509624352 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 207444740 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509624352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.3509624352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.3847095925 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 188375161 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847095925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.3847095925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.564798602 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 344492841 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564798602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_rx_full.564798602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.306059872 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 165784770 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306059872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_setup_stage.306059872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.3631675591 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 168238998 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:52 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631675591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3631675591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.3520761776 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 210851748 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520761776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.3520761776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.2008315331 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 2008832539 ps |
| CPU time | 50.72 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 229564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008315331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.2008315331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.1907749472 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 186981326 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907749472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1907749472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.2507304302 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 171971514 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 01:01:50 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507304302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.2507304302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.357026241 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 1396734048 ps |
| CPU time | 3.72 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:01:55 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357026241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_stream_len_max.357026241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.4268753505 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 2414731227 ps |
| CPU time | 62.58 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 229380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268753505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.4268753505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3745068904 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 727072021 ps |
| CPU time | 15.01 seconds |
| Started | Oct 15 01:01:39 AM UTC 24 |
| Finished | Oct 15 01:01:56 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745068904 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3745068904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.1465600038 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 494605427 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:01:53 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1465600038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.1465600038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.3037439510 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 505797002 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3037439510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.3037439510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.3484694072 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 574195368 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3484694072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.3484694072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.3846663652 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 459762033 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3846663652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.3846663652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.926233075 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 538175386 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=926233075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_t x_rx_disruption.926233075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.3057131782 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 429598221 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3057131782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.3057131782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.1093722333 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 638532279 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:13 AM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1093722333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.1093722333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2368705363 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 38018455 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:17 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368705363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2368705363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.2680158243 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 6427477247 ps |
| CPU time | 11.15 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680158243 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.2680158243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.1218324002 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 18703663434 ps |
| CPU time | 22.89 seconds |
| Started | Oct 15 01:01:51 AM UTC 24 |
| Finished | Oct 15 01:02:15 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218324002 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.1218324002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.2432024776 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 29875655551 ps |
| CPU time | 36.47 seconds |
| Started | Oct 15 01:01:52 AM UTC 24 |
| Finished | Oct 15 01:02:30 AM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432024776 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.2432024776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.4049763866 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 150680279 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:01:52 AM UTC 24 |
| Finished | Oct 15 01:01:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049763866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.4049763866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.3153375767 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 144257014 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:01:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153375767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.3153375767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.3951169782 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 164565012 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:01:56 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951169782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.3951169782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.2544844402 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 1015182213 ps |
| CPU time | 3.73 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544844402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.2544844402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.3096079495 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 43596984192 ps |
| CPU time | 78.21 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:03:14 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096079495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.3096079495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.3486294303 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 1176293715 ps |
| CPU time | 23.96 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:02:20 AM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486294303 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.3486294303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.1360711024 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 835168463 ps |
| CPU time | 2.8 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:01:58 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360711024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.1360711024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1796779007 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 218005406 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796779007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1796779007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_enable.3658825973 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 96670671 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658825973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.3658825973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.2357660180 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 822799107 ps |
| CPU time | 2.75 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:58 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357660180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.2357660180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.3942723557 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 269889752 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942723557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.3942723557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.172524326 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 207250384 ps |
| CPU time | 2.57 seconds |
| Started | Oct 15 01:01:55 AM UTC 24 |
| Finished | Oct 15 01:01:58 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172524326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_fifo_rst.172524326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.3892236857 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 170021248 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892236857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.3892236857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.317247936 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 142378373 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=317247936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_in_stall.317247936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.3090124331 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 234499033 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090124331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.3090124331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1281573062 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 5036716605 ps |
| CPU time | 44.47 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281573062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1281573062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1440648878 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 10595745638 ps |
| CPU time | 64.55 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440648878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1440648878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.1344777445 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 226706789 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:01:56 AM UTC 24 |
| Finished | Oct 15 01:01:59 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344777445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.1344777445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.3078651321 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 9643122129 ps |
| CPU time | 16.15 seconds |
| Started | Oct 15 01:01:58 AM UTC 24 |
| Finished | Oct 15 01:02:15 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078651321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.3078651321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.236251377 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 9433852281 ps |
| CPU time | 13.39 seconds |
| Started | Oct 15 01:01:58 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=236251377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_suspend.236251377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.761517106 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 5161166250 ps |
| CPU time | 129.62 seconds |
| Started | Oct 15 01:01:58 AM UTC 24 |
| Finished | Oct 15 01:04:10 AM UTC 24 |
| Peak memory | 235996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=761517106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.761517106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.527278656 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 2390990247 ps |
| CPU time | 16.67 seconds |
| Started | Oct 15 01:01:58 AM UTC 24 |
| Finished | Oct 15 01:02:16 AM UTC 24 |
| Peak memory | 235816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527278656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.527278656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.2995135013 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 246763141 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:01:58 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995135013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.2995135013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.2805629795 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 191067425 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805629795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.2805629795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2502219585 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 2948261522 ps |
| CPU time | 28.14 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:29 AM UTC 24 |
| Peak memory | 235992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502219585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.2502219585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.1125237005 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 169439519 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1125237005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1125237005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1734099098 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 137452939 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734099098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1734099098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.592447157 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 216607033 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592447157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_nak_trans.592447157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.1481103995 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 202352224 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481103995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.1481103995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.510653861 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 157136322 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=510653861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_out_stall.510653861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.2239124289 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 188572640 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239124289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.2239124289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.2232469257 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 164346756 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232469257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.2232469257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.799264398 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 197433059 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:02:00 AM UTC 24 |
| Finished | Oct 15 01:02:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=799264398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.799264398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.4064947406 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 149220919 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:02:01 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064947406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.4064947406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.3684962794 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 47487336 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:02:01 AM UTC 24 |
| Finished | Oct 15 01:02:03 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684962794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.3684962794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.3853520076 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 8606258856 ps |
| CPU time | 23.46 seconds |
| Started | Oct 15 01:02:01 AM UTC 24 |
| Finished | Oct 15 01:02:26 AM UTC 24 |
| Peak memory | 236016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853520076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.3853520076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.2444757673 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 142641018 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:02:01 AM UTC 24 |
| Finished | Oct 15 01:02:04 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444757673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.2444757673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.1910781416 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 214357788 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910781416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.1910781416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.3644082993 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 224907491 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644082993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.3644082993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.4121706904 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 251419961 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121706904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.4121706904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.2980792002 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 194715127 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980792002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.2980792002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.3723934950 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 413420191 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723934950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.3723934950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.1717268858 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 149374805 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717268858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.1717268858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3678246230 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 198658953 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678246230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3678246230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.937468095 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 225240812 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=937468095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.937468095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.718007396 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 2281078614 ps |
| CPU time | 20.31 seconds |
| Started | Oct 15 01:02:03 AM UTC 24 |
| Finished | Oct 15 01:02:32 AM UTC 24 |
| Peak memory | 231464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=718007396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.718007396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.2390571269 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 195486297 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390571269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2390571269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.2051397129 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 157493672 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:17 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051397129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.2051397129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.253127273 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 1163216089 ps |
| CPU time | 3.14 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 219116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253127273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_stream_len_max.253127273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.2981199408 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 1357810015 ps |
| CPU time | 33.17 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:50 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981199408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.2981199408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.2135758378 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 5681344845 ps |
| CPU time | 34.73 seconds |
| Started | Oct 15 01:01:54 AM UTC 24 |
| Finished | Oct 15 01:02:30 AM UTC 24 |
| Peak memory | 219384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135758378 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.2135758378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.798112014 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 515703440 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=798112014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_tx _rx_disruption.798112014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.1421634077 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 494692652 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1421634077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.1421634077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.700957835 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 554388436 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:12 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=700957835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_t x_rx_disruption.700957835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.3185954423 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 572788023 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3185954423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.3185954423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.2341727664 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 523635950 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2341727664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.2341727664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.2519143825 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 604725408 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2519143825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.2519143825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3500030540 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 604715405 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3500030540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3500030540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.3604498947 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 512179202 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3604498947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.3604498947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.105288212 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 496686162 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 217860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=105288212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_t x_rx_disruption.105288212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.3595732483 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 489388436 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3595732483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.3595732483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.595253941 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 636719976 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=595253941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_t x_rx_disruption.595253941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.4105948723 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 34897565 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105948723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.4105948723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.1696149003 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 6378766880 ps |
| CPU time | 9.35 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:26 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696149003 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.1696149003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.1796653829 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 20232983688 ps |
| CPU time | 29.41 seconds |
| Started | Oct 15 01:02:05 AM UTC 24 |
| Finished | Oct 15 01:02:46 AM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796653829 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.1796653829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.3714957568 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 25361536599 ps |
| CPU time | 33.77 seconds |
| Started | Oct 15 01:02:06 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714957568 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.3714957568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.2545309120 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 171707212 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:02:07 AM UTC 24 |
| Finished | Oct 15 01:02:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545309120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.2545309120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.1211594775 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 155635900 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:02:07 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211594775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.1211594775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.2612688920 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 380000900 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:02:09 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612688920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.2612688920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.513389933 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 525578701 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:02:10 AM UTC 24 |
| Finished | Oct 15 01:02:12 AM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=513389933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.513389933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1225617934 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 15874429841 ps |
| CPU time | 29.31 seconds |
| Started | Oct 15 01:02:10 AM UTC 24 |
| Finished | Oct 15 01:02:41 AM UTC 24 |
| Peak memory | 219132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225617934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1225617934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.3579765092 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 2993827934 ps |
| CPU time | 21.99 seconds |
| Started | Oct 15 01:02:11 AM UTC 24 |
| Finished | Oct 15 01:02:34 AM UTC 24 |
| Peak memory | 219244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579765092 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.3579765092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.3150682478 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 693743832 ps |
| CPU time | 2.02 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150682478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.3150682478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.373289274 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 147447192 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373289274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_disconnected.373289274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_enable.1985845668 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 65094386 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985845668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.1985845668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.1471447194 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 991315692 ps |
| CPU time | 2.79 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471447194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1471447194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.1431699937 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 355918693 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431699937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.1431699937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.4212159183 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 279574936 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212159183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.4212159183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.4272605768 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 198162106 ps |
| CPU time | 2.62 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272605768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.4272605768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.2124507243 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 150789464 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124507243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.2124507243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.1985528777 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 140866451 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985528777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.1985528777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.2409757452 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 250181671 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409757452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.2409757452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.48996934 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 4124914361 ps |
| CPU time | 107.51 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:04:05 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48996934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.48996934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.1235502107 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 6199997606 ps |
| CPU time | 42.55 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:03:00 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235502107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.1235502107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.3193895160 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 252085345 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193895160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.3193895160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.423961445 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 24225424993 ps |
| CPU time | 38.58 seconds |
| Started | Oct 15 01:02:14 AM UTC 24 |
| Finished | Oct 15 01:02:56 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423961445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_link_resume.423961445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.3397496938 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 6046765476 ps |
| CPU time | 10.03 seconds |
| Started | Oct 15 01:02:15 AM UTC 24 |
| Finished | Oct 15 01:02:27 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397496938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.3397496938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2058971253 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 4029612394 ps |
| CPU time | 30.73 seconds |
| Started | Oct 15 01:02:17 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 235860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058971253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2058971253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1504078791 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 4287648892 ps |
| CPU time | 39.16 seconds |
| Started | Oct 15 01:02:17 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504078791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1504078791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.3946097803 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 241671646 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:02:17 AM UTC 24 |
| Finished | Oct 15 01:02:19 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946097803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.3946097803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2987951556 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 203050314 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:02:18 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987951556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2987951556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.3625986290 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 3213126456 ps |
| CPU time | 23.22 seconds |
| Started | Oct 15 01:02:18 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 229480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625986290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.3625986290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.2346596342 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 152245613 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346596342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.2346596342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.674107271 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 151100509 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=674107271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.674107271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.3758567715 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 299417893 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758567715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.3758567715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.3663929568 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 236528989 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663929568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.3663929568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.1693264410 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 224427588 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693264410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.1693264410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.2224094174 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 159901987 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224094174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.2224094174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.1461981015 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 151810036 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461981015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.1461981015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2363849299 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 210007260 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363849299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2363849299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.1967858295 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 150554656 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:02:19 AM UTC 24 |
| Finished | Oct 15 01:02:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967858295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.1967858295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.1873297518 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 107238226 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:02:20 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873297518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.1873297518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.2224236958 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 22406050431 ps |
| CPU time | 56.63 seconds |
| Started | Oct 15 01:02:20 AM UTC 24 |
| Finished | Oct 15 01:03:19 AM UTC 24 |
| Peak memory | 233572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224236958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.2224236958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.2907731427 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 187949969 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907731427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.2907731427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.3002701545 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 250115596 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002701545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.3002701545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.2899116916 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 232264902 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899116916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.2899116916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.1023375592 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 162923893 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023375592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.1023375592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1554361891 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 175796743 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554361891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1554361891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.507733292 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 313051079 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=507733292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_rx_full.507733292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.3101732839 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 151311596 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101732839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.3101732839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.1288232289 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 154756336 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:02:21 AM UTC 24 |
| Finished | Oct 15 01:02:23 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288232289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.1288232289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.1264533579 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 275018652 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:02:22 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264533579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.1264533579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.3702916815 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 2278060502 ps |
| CPU time | 16.04 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:40 AM UTC 24 |
| Peak memory | 231548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702916815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.3702916815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.3900469155 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 174679296 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900469155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.3900469155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.3049945942 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 195038295 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049945942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.3049945942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.2044887906 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 1303488896 ps |
| CPU time | 3.61 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:28 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044887906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.2044887906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.3707071427 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 3155290765 ps |
| CPU time | 79.93 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:03:44 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707071427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.3707071427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.1882386685 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 1043100224 ps |
| CPU time | 20.51 seconds |
| Started | Oct 15 01:02:11 AM UTC 24 |
| Finished | Oct 15 01:02:33 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882386685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.1882386685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.1253763289 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 503086413 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:25 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1253763289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.1253763289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.262041594 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 559011412 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=262041594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_t x_rx_disruption.262041594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.937145785 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 494814073 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=937145785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_t x_rx_disruption.937145785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.1999844339 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 597994529 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1999844339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.1999844339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.2261042813 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 611234782 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2261042813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.2261042813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.1137048001 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 527794939 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1137048001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.1137048001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.2648139952 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 565900022 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2648139952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.2648139952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2584105751 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 499589427 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2584105751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2584105751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.3513305409 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 638530072 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3513305409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.3513305409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.3011856881 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 460867156 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3011856881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.3011856881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.3722089675 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 42642109 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:41 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3722089675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.3722089675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.877587480 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 6729830078 ps |
| CPU time | 9.29 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:33 AM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877587480 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.877587480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.3228230453 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 19648509702 ps |
| CPU time | 22.16 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:46 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228230453 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.3228230453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.4032507981 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 23699400514 ps |
| CPU time | 28.04 seconds |
| Started | Oct 15 01:02:23 AM UTC 24 |
| Finished | Oct 15 01:02:52 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032507981 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.4032507981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.1908139193 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 185546981 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908139193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.1908139193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.2165904945 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 173013762 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:27 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165904945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.2165904945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.466729783 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 657650278 ps |
| CPU time | 2.61 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:28 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466729783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_data_toggle_clear.466729783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.3957996114 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 1061013344 ps |
| CPU time | 3.16 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:29 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3957996114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3957996114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.1232583066 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 16453881724 ps |
| CPU time | 28.03 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:03:04 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232583066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1232583066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.2836583098 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 1040227470 ps |
| CPU time | 20.49 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 219044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836583098 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.2836583098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.19699321 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 642705895 ps |
| CPU time | 2.22 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19699321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disable_endpoint.19699321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.2155047536 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 162056908 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:37 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155047536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.2155047536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_enable.2273838918 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 39502363 ps |
| CPU time | 0.66 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273838918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.2273838918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.1153539768 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 902182486 ps |
| CPU time | 2.91 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:34 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153539768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.1153539768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.3381479303 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 199031208 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381479303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.3381479303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.2741127140 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 445172038 ps |
| CPU time | 2.4 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:40 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741127140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.2741127140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3576696705 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 182218852 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576696705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3576696705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.4060989509 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 150701833 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060989509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.4060989509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.845005701 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 178971806 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:02:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845005701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_trans.845005701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1379854256 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 3258972116 ps |
| CPU time | 82.29 seconds |
| Started | Oct 15 01:02:27 AM UTC 24 |
| Finished | Oct 15 01:03:54 AM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379854256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1379854256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.3506777083 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 5679415491 ps |
| CPU time | 33.78 seconds |
| Started | Oct 15 01:02:28 AM UTC 24 |
| Finished | Oct 15 01:03:11 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506777083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.3506777083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.31176042 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 165082433 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:02:28 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31176042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_link_in_err.31176042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.1247162644 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 13190913088 ps |
| CPU time | 19.53 seconds |
| Started | Oct 15 01:02:28 AM UTC 24 |
| Finished | Oct 15 01:02:56 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247162644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.1247162644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.2998875279 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 9764001461 ps |
| CPU time | 13.38 seconds |
| Started | Oct 15 01:02:28 AM UTC 24 |
| Finished | Oct 15 01:02:50 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998875279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.2998875279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.943102491 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 2708132184 ps |
| CPU time | 19.95 seconds |
| Started | Oct 15 01:02:28 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 231600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943102491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.943102491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3992229332 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 2276254190 ps |
| CPU time | 15.25 seconds |
| Started | Oct 15 01:02:30 AM UTC 24 |
| Finished | Oct 15 01:02:46 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992229332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3992229332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.2848649718 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 273509354 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:02:30 AM UTC 24 |
| Finished | Oct 15 01:02:32 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848649718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.2848649718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.1145377363 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 189938720 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:02:30 AM UTC 24 |
| Finished | Oct 15 01:02:32 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145377363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.1145377363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1885432146 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 3423737080 ps |
| CPU time | 87.29 seconds |
| Started | Oct 15 01:02:31 AM UTC 24 |
| Finished | Oct 15 01:04:10 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885432146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1885432146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3714137621 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 166447570 ps |
| CPU time | 0.84 seconds |
| Started | Oct 15 01:02:32 AM UTC 24 |
| Finished | Oct 15 01:02:37 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714137621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3714137621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.1588068528 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 183073184 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:02:33 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588068528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.1588068528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.24217220 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 272972598 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:02:33 AM UTC 24 |
| Finished | Oct 15 01:02:39 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24217220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_nak_trans.24217220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.909787365 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 186924107 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:02:33 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909787365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_out_iso.909787365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.3416098807 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 155872690 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:02:33 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416098807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.3416098807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.3812803440 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 220337374 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:02:34 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3812803440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.3812803440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.2649030747 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 162959743 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 01:02:34 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2649030747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.2649030747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.4269753762 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 198474920 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:02:34 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269753762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.4269753762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2863161976 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 170478452 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:02:34 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863161976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2863161976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3131952238 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 54513308 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:02:36 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131952238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3131952238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.538657816 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 15165910159 ps |
| CPU time | 39.57 seconds |
| Started | Oct 15 01:02:36 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 235952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=538657816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_pkt_buffer.538657816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1170459447 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 206569015 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:02:36 AM UTC 24 |
| Finished | Oct 15 01:02:38 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170459447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1170459447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.3901676610 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 189708810 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:02:37 AM UTC 24 |
| Finished | Oct 15 01:02:40 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901676610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.3901676610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.567690140 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 213168325 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:02:37 AM UTC 24 |
| Finished | Oct 15 01:02:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567690140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_random_length_in_transaction.567690140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.838429749 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 187249038 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:02:37 AM UTC 24 |
| Finished | Oct 15 01:02:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838429749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.838429749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.960390541 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 190511025 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960390541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_rx_crc_err.960390541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.3245366199 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 348510037 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245366199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.3245366199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1631246000 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 154049464 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631246000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1631246000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.4112751221 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 152542006 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112751221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.4112751221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3635041146 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 207732856 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635041146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3635041146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.374658942 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 1873643660 ps |
| CPU time | 17.21 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:59 AM UTC 24 |
| Peak memory | 231464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=374658942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.374658942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.723323196 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 199738285 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723323196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.723323196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3388005751 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 145994273 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388005751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3388005751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3210051960 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 1094862951 ps |
| CPU time | 2.98 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:44 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210051960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3210051960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.3599618621 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 2722274408 ps |
| CPU time | 70.64 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599618621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.3599618621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.1357914641 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 1961233855 ps |
| CPU time | 13.04 seconds |
| Started | Oct 15 01:02:25 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357914641 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.1357914641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.809187825 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 438765599 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:02:39 AM UTC 24 |
| Finished | Oct 15 01:02:42 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809187825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_tx _rx_disruption.809187825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.3187700510 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 659090484 ps |
| CPU time | 1.86 seconds |
| Started | Oct 15 01:08:10 AM UTC 24 |
| Finished | Oct 15 01:08:24 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3187700510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.3187700510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1133112849 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 480793278 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:08:12 AM UTC 24 |
| Finished | Oct 15 01:08:17 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1133112849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1133112849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2925791881 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 495887883 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2925791881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2925791881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.3504846325 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 631624612 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3504846325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.3504846325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.1310517555 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 548654577 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1310517555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.1310517555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.90663104 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 539994774 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=90663104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_tx _rx_disruption.90663104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3932514638 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 494434819 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3932514638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3932514638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.1546299841 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 52460122 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:02:54 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546299841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.1546299841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.808002816 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 4645736911 ps |
| CPU time | 7.38 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=808002816 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.808002816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.2408961490 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 14647063239 ps |
| CPU time | 21.53 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:03:04 AM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408961490 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.2408961490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.2539523569 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 24889017752 ps |
| CPU time | 33.6 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:03:16 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539523569 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.2539523569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.2769913802 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 177236653 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769913802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.2769913802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.3645507308 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 152710542 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:02:43 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645507308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.3645507308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.1122539077 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 218267433 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:02:44 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122539077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.1122539077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.4126936987 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 348155589 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:02:44 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126936987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.4126936987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.3916857867 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 39521566119 ps |
| CPU time | 70.42 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916857867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3916857867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.2140500567 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 994964848 ps |
| CPU time | 19.58 seconds |
| Started | Oct 15 01:02:41 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140500567 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.2140500567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.3160112859 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 915961194 ps |
| CPU time | 2.3 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160112859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.3160112859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.4056294288 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 151490391 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:48 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056294288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.4056294288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_enable.3462974168 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 42326505 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:48 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462974168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.3462974168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.158173216 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 1007317030 ps |
| CPU time | 2.98 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158173216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.158173216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1330270955 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 268874729 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:46 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330270955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.1330270955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.3854312980 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 179287942 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:45 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854312980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.3854312980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2916733120 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 397551054 ps |
| CPU time | 2.34 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916733120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2916733120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.2093723034 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 188544680 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093723034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2093723034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.256279778 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 143286720 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256279778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_in_stall.256279778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.1204511803 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 275360534 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204511803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.1204511803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1310334330 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 3929420476 ps |
| CPU time | 34.8 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:03:22 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310334330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1310334330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.1811380800 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 4133058421 ps |
| CPU time | 28.09 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:03:14 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811380800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.1811380800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.3891129515 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 225326595 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891129515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.3891129515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.3715946446 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 13237964739 ps |
| CPU time | 18.6 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:03:05 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715946446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.3715946446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2213512879 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 5065668294 ps |
| CPU time | 9.16 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213512879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2213512879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2037115171 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 3447618554 ps |
| CPU time | 25.1 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:03:11 AM UTC 24 |
| Peak memory | 235892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037115171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2037115171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.1316845992 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 2722417584 ps |
| CPU time | 65.83 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 236088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316845992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.1316845992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.1306250133 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 272240632 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306250133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.1306250133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.3817185 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 207410388 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:02:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.3817185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.1792139146 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 1855159007 ps |
| CPU time | 17.07 seconds |
| Started | Oct 15 01:02:45 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792139146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.1792139146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.2873528024 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 153642518 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:02:46 AM UTC 24 |
| Finished | Oct 15 01:02:49 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873528024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.2873528024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.356726466 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 140289039 ps |
| CPU time | 0.78 seconds |
| Started | Oct 15 01:02:46 AM UTC 24 |
| Finished | Oct 15 01:02:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356726466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.356726466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2604838309 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 222738362 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:02:48 AM UTC 24 |
| Finished | Oct 15 01:02:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604838309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.2604838309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.1250147880 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 169724300 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:02:48 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250147880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.1250147880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.618878882 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 158109714 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:02:48 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618878882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_out_stall.618878882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.706174784 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 201864397 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:02:48 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706174784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_out_trans_nak.706174784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.1256971953 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 156846371 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:02:48 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256971953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.1256971953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.367868637 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 313876871 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=367868637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.367868637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.2232187544 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 147002957 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232187544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.2232187544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3474669023 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 54096235 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474669023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3474669023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.2934415609 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 9393302452 ps |
| CPU time | 24.19 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:03:14 AM UTC 24 |
| Peak memory | 233488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934415609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.2934415609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.3308928007 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 152248925 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308928007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.3308928007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.2400739822 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 197220060 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400739822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.2400739822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.1323831865 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 240374711 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:02:49 AM UTC 24 |
| Finished | Oct 15 01:02:51 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323831865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.1323831865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.840477610 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 181128668 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:02:50 AM UTC 24 |
| Finished | Oct 15 01:02:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840477610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.840477610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.374401695 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 203543178 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:02:50 AM UTC 24 |
| Finished | Oct 15 01:02:52 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374401695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_rx_crc_err.374401695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.2278810917 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 247761748 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:02:50 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278810917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.2278810917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.2005796213 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 177381358 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:02:50 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005796213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.2005796213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.2934111254 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 158365825 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:02:50 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934111254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.2934111254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.786544608 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 245615488 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:02:51 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=786544608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.786544608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.701130101 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 2496758403 ps |
| CPU time | 17.54 seconds |
| Started | Oct 15 01:02:51 AM UTC 24 |
| Finished | Oct 15 01:03:09 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701130101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.701130101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2268973887 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 191234926 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:02:51 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268973887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2268973887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.279342490 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 199770074 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:02:51 AM UTC 24 |
| Finished | Oct 15 01:02:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=279342490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_stall_trans.279342490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3226611592 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 1128460084 ps |
| CPU time | 3.05 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:02:56 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226611592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3226611592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.141749846 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 2458060468 ps |
| CPU time | 22.46 seconds |
| Started | Oct 15 01:02:51 AM UTC 24 |
| Finished | Oct 15 01:03:14 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141749846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_streaming_out.141749846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.3676647542 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 5226155923 ps |
| CPU time | 41.41 seconds |
| Started | Oct 15 01:02:43 AM UTC 24 |
| Finished | Oct 15 01:03:29 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676647542 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.3676647542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.589333671 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 552357373 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=589333671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx _rx_disruption.589333671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.2757246452 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 603368164 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2757246452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.2757246452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.2798100748 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 465474410 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2798100748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.2798100748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.3237485749 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 584693130 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:24 AM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3237485749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.3237485749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.3849472216 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 638648000 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:08:13 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3849472216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.3849472216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.3030592087 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 574255525 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:14 AM UTC 24 |
| Finished | Oct 15 01:08:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3030592087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.3030592087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3603529841 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 70939292 ps |
| CPU time | 0.73 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:07 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603529841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.3603529841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.3007402837 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 11424756671 ps |
| CPU time | 15.09 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:03:09 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007402837 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.3007402837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.2296876934 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 14484906599 ps |
| CPU time | 19.77 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296876934 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.2296876934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.2888933626 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 23310150845 ps |
| CPU time | 31.46 seconds |
| Started | Oct 15 01:02:52 AM UTC 24 |
| Finished | Oct 15 01:03:25 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888933626 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.2888933626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.2685544581 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 165123774 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685544581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.2685544581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.3960422251 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 147205881 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960422251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.3960422251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.4282609992 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 400159266 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:02:55 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282609992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.4282609992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2270919144 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 1115592960 ps |
| CPU time | 3.21 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270919144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2270919144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1065169123 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 38911694183 ps |
| CPU time | 73.01 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:04:07 AM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065169123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1065169123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.1734955108 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 428259435 ps |
| CPU time | 7.63 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734955108 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.1734955108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.3906579994 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 637519837 ps |
| CPU time | 2.1 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906579994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.3906579994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2103045547 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 161540669 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103045547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.2103045547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_enable.904051115 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 32660389 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=904051115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.904051115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.1372864631 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 909536702 ps |
| CPU time | 2.71 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:59 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372864631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.1372864631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.3403799007 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 498807124 ps |
| CPU time | 1.99 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:58 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403799007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.3403799007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.3053674201 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 200325403 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053674201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.3053674201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.2701498966 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 456214678 ps |
| CPU time | 2.53 seconds |
| Started | Oct 15 01:02:54 AM UTC 24 |
| Finished | Oct 15 01:02:59 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701498966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.2701498966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.4008804166 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 217811628 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:02:55 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 226948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008804166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.4008804166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.1818991538 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 141231036 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:02:55 AM UTC 24 |
| Finished | Oct 15 01:02:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818991538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.1818991538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.570903225 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 216312134 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:02:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=570903225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_in_trans.570903225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.545577419 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 5288002387 ps |
| CPU time | 35.89 seconds |
| Started | Oct 15 01:02:55 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 235608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=545577419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.545577419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3675628622 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 5340399327 ps |
| CPU time | 57.88 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675628622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3675628622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.2955480613 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 189609723 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:02:58 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955480613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.2955480613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.2037337608 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 16000320448 ps |
| CPU time | 22.16 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:03:20 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037337608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.2037337608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.1455639717 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 3717715534 ps |
| CPU time | 6.04 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455639717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.1455639717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.4103455015 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 3943866373 ps |
| CPU time | 94.88 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:04:33 AM UTC 24 |
| Peak memory | 236024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103455015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.4103455015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.138332972 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 1689287452 ps |
| CPU time | 41.31 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:03:39 AM UTC 24 |
| Peak memory | 235888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=138332972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.138332972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.352879651 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 255971477 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:02:56 AM UTC 24 |
| Finished | Oct 15 01:02:59 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352879651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.352879651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.1382611129 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 205897109 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:01 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382611129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.1382611129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.439351810 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 2711756704 ps |
| CPU time | 23.77 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:24 AM UTC 24 |
| Peak memory | 231300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439351810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.439351810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2207614813 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 155109035 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207614813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2207614813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.2264419209 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 149532171 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:01 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264419209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.2264419209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1686862364 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 228841756 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686862364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1686862364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4005094307 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 189723655 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005094307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.4005094307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.3336974196 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 205827423 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336974196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.3336974196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.2109725114 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 185867022 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109725114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.2109725114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.126561012 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 156324378 ps |
| CPU time | 0.82 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126561012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.126561012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.157463894 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 243210349 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:02:58 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157463894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.157463894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.797164630 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 152450697 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:02:59 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797164630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.797164630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.2000489996 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 123453494 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:02:59 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000489996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.2000489996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.1674127645 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 20166447481 ps |
| CPU time | 49.37 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:50 AM UTC 24 |
| Peak memory | 233420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674127645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.1674127645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.709516266 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 181830365 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709516266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.709516266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.477092562 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 206539623 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477092562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_pkt_sent.477092562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.2192769142 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 229455430 ps |
| CPU time | 1.78 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192769142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.2192769142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.1221098041 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 161722620 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221098041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.1221098041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.1562402673 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 159973819 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:03:00 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562402673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.1562402673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.1706193897 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 342219733 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:03:01 AM UTC 24 |
| Finished | Oct 15 01:03:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706193897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.1706193897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.2085488271 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 155580621 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:03:01 AM UTC 24 |
| Finished | Oct 15 01:03:03 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085488271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.2085488271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.1979991327 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 162106027 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:03:02 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979991327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.1979991327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.1171810855 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 227371955 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:03:02 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171810855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.1171810855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.1931476877 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 3064824737 ps |
| CPU time | 29 seconds |
| Started | Oct 15 01:03:02 AM UTC 24 |
| Finished | Oct 15 01:03:46 AM UTC 24 |
| Peak memory | 235916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931476877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.1931476877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.4246745265 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 198747903 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:03:02 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246745265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.4246745265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.2221445593 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 157590588 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:03:03 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221445593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.2221445593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.1439389719 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 1072442971 ps |
| CPU time | 2.96 seconds |
| Started | Oct 15 01:03:03 AM UTC 24 |
| Finished | Oct 15 01:03:20 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439389719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.1439389719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.4247974012 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 4140015511 ps |
| CPU time | 103.89 seconds |
| Started | Oct 15 01:03:03 AM UTC 24 |
| Finished | Oct 15 01:05:02 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247974012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.4247974012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.3231476150 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 450676955 ps |
| CPU time | 7.75 seconds |
| Started | Oct 15 01:02:53 AM UTC 24 |
| Finished | Oct 15 01:03:02 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231476150 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.3231476150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.3227167875 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 559573475 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:03:03 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 216592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3227167875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.3227167875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.4232800815 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 414144001 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:08:18 AM UTC 24 |
| Finished | Oct 15 01:08:27 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4232800815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.4232800815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.2430794901 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 439166987 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:08:18 AM UTC 24 |
| Finished | Oct 15 01:08:27 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2430794901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.2430794901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.91386146 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 586365654 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:08:18 AM UTC 24 |
| Finished | Oct 15 01:08:27 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=91386146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_tx _rx_disruption.91386146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.3049422215 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 652422829 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:08:18 AM UTC 24 |
| Finished | Oct 15 01:08:27 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3049422215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.3049422215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.3368747487 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 43773109 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368747487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.3368747487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2003793053 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 4320883907 ps |
| CPU time | 6.26 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003793053 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.2003793053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.1127367171 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 20147579009 ps |
| CPU time | 31.54 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127367171 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.1127367171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1158504977 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 26153064694 ps |
| CPU time | 36.16 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158504977 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1158504977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.832176492 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 204039895 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832176492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_av_buffer.832176492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.987025452 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 141381065 ps |
| CPU time | 0.87 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987025452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_bitstuff_err.987025452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.2035654296 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 511079088 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035654296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.2035654296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.3674621706 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 1316475016 ps |
| CPU time | 3.39 seconds |
| Started | Oct 15 01:03:04 AM UTC 24 |
| Finished | Oct 15 01:03:20 AM UTC 24 |
| Peak memory | 219192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674621706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3674621706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.2653198564 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 25671053937 ps |
| CPU time | 44.56 seconds |
| Started | Oct 15 01:03:05 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653198564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.2653198564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1366009181 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 163645855 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:03:05 AM UTC 24 |
| Finished | Oct 15 01:03:07 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366009181 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1366009181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.3566740657 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 653587339 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 01:03:06 AM UTC 24 |
| Finished | Oct 15 01:03:19 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566740657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.3566740657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.4203053427 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 141517390 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:03:06 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203053427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.4203053427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_enable.3422713339 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 97981638 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422713339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.3422713339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.4288164268 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 906233633 ps |
| CPU time | 2.18 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288164268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.4288164268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.3750703902 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 720437874 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750703902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3750703902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1777504131 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 160294030 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777504131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.1777504131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.471464650 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 350968874 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:13 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471464650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.471464650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.2392046195 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 176232895 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:12 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392046195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.2392046195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.2106343236 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 150612775 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:03:09 AM UTC 24 |
| Finished | Oct 15 01:03:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106343236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.2106343236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.1400041794 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 219872554 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:03:09 AM UTC 24 |
| Finished | Oct 15 01:03:12 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400041794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.1400041794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.1886455114 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 3489723520 ps |
| CPU time | 24.65 seconds |
| Started | Oct 15 01:03:07 AM UTC 24 |
| Finished | Oct 15 01:03:36 AM UTC 24 |
| Peak memory | 231316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886455114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.1886455114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.408705972 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 13908922696 ps |
| CPU time | 84.02 seconds |
| Started | Oct 15 01:03:09 AM UTC 24 |
| Finished | Oct 15 01:04:36 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=408705972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.408705972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2954246400 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 226843010 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:03:10 AM UTC 24 |
| Finished | Oct 15 01:03:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954246400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.2954246400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.857941389 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 14592061155 ps |
| CPU time | 21.2 seconds |
| Started | Oct 15 01:03:10 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 218724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857941389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_resume.857941389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.3905144627 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 10872550360 ps |
| CPU time | 14.84 seconds |
| Started | Oct 15 01:03:11 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905144627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.3905144627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1112808462 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 4031747131 ps |
| CPU time | 28.62 seconds |
| Started | Oct 15 01:03:12 AM UTC 24 |
| Finished | Oct 15 01:03:42 AM UTC 24 |
| Peak memory | 231436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112808462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1112808462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.1300565312 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 2789562187 ps |
| CPU time | 70.14 seconds |
| Started | Oct 15 01:03:12 AM UTC 24 |
| Finished | Oct 15 01:04:24 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1300565312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.1300565312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.1269101913 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 262888210 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:03:12 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269101913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.1269101913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.95031976 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 234501201 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:03:12 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=95031976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.95031976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.703106760 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 1574157444 ps |
| CPU time | 10.84 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=703106760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.703106760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.2761332623 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 151423803 ps |
| CPU time | 0.85 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:16 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761332623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.2761332623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.4072939243 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 160657739 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072939243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.4072939243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.287585484 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 217930337 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=287585484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_nak_trans.287585484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.2507077762 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 157908968 ps |
| CPU time | 0.82 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507077762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.2507077762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.51426233 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 178686945 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:03:14 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51426233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_stall.51426233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.709904000 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 193984523 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:03:15 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709904000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.709904000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.1731867952 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 143897691 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:03:15 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731867952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.1731867952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.2461069447 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 201161843 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:03:15 AM UTC 24 |
| Finished | Oct 15 01:03:18 AM UTC 24 |
| Peak memory | 216636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461069447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.2461069447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1987602010 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 170293356 ps |
| CPU time | 0.85 seconds |
| Started | Oct 15 01:03:15 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987602010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1987602010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.741724741 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 84635461 ps |
| CPU time | 0.7 seconds |
| Started | Oct 15 01:03:16 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741724741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_phy_pins_sense.741724741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3288920318 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 16100083265 ps |
| CPU time | 37.66 seconds |
| Started | Oct 15 01:03:16 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 229492 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288920318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.3288920318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.2984716302 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 150954469 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:03:16 AM UTC 24 |
| Finished | Oct 15 01:03:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984716302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.2984716302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.3385281824 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 237215473 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:03:17 AM UTC 24 |
| Finished | Oct 15 01:03:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385281824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.3385281824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2772296185 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 204622658 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772296185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.2772296185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3903614918 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 178971757 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903614918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3903614918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.2735474354 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 200787785 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735474354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.2735474354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.1728999447 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 358557473 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728999447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.1728999447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.2912591779 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 154850025 ps |
| CPU time | 0.83 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912591779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.2912591779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1953838833 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 147471116 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953838833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.1953838833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.2090008262 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 211288406 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2090008262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.2090008262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.3985687369 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 3099389238 ps |
| CPU time | 21.06 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:41 AM UTC 24 |
| Peak memory | 235820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985687369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.3985687369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.309287261 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 166034766 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309287261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.309287261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3149507547 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 151004173 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149507547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.3149507547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.458043787 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 1054066569 ps |
| CPU time | 2.85 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:23 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=458043787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_stream_len_max.458043787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2325210928 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 2550126796 ps |
| CPU time | 23.31 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:44 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325210928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2325210928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2638031884 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 2052566007 ps |
| CPU time | 49.12 seconds |
| Started | Oct 15 01:03:06 AM UTC 24 |
| Finished | Oct 15 01:04:07 AM UTC 24 |
| Peak memory | 219220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638031884 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.2638031884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.2893362447 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 581721218 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:22 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2893362447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.2893362447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.120618980 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 557298616 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:08:20 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=120618980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_t x_rx_disruption.120618980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.1918945366 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 556182597 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:08:20 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1918945366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.1918945366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.2992814855 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 647588469 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 01:08:20 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2992814855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.2992814855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3884004344 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 579872422 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:08:20 AM UTC 24 |
| Finished | Oct 15 01:08:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3884004344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3884004344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1458533373 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 424476219 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:20 AM UTC 24 |
| Finished | Oct 15 01:08:22 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1458533373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1458533373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.809132553 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 479567159 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809132553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_t x_rx_disruption.809132553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.3689239876 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 535876058 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3689239876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.3689239876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.3381249885 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 471205314 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3381249885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.3381249885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1335971377 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 67011379 ps |
| CPU time | 0.72 seconds |
| Started | Oct 15 01:03:30 AM UTC 24 |
| Finished | Oct 15 01:03:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335971377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1335971377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1558979235 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 9675175928 ps |
| CPU time | 13.48 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:34 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558979235 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.1558979235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.2012854928 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 20518920485 ps |
| CPU time | 28.6 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:49 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012854928 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.2012854928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.346106483 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 30385227258 ps |
| CPU time | 41.37 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346106483 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.346106483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.222310723 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 161457612 ps |
| CPU time | 0.85 seconds |
| Started | Oct 15 01:03:19 AM UTC 24 |
| Finished | Oct 15 01:03:21 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222310723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.222310723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2894757399 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 157848678 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894757399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2894757399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1967479307 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 316196051 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:24 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967479307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1967479307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2912852679 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 647204755 ps |
| CPU time | 2.51 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:25 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912852679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.2912852679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.558090970 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 20602965217 ps |
| CPU time | 32.62 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558090970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_device_address.558090970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2316112575 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 1108025889 ps |
| CPU time | 8.85 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:31 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316112575 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2316112575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.2145025491 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 563448187 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145025491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.2145025491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.3977827584 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 170849899 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:24 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977827584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.3977827584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1130720238 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 42474089 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130720238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1130720238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.1741976379 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 818530775 ps |
| CPU time | 2.61 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:25 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741976379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.1741976379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3511369138 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 147398868 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:03:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511369138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3511369138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.3673667151 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 331622869 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:25 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673667151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.3673667151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.762201876 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 185136689 ps |
| CPU time | 2.33 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:26 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762201876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_fifo_rst.762201876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.1591563051 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 225423243 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:26 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591563051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.1591563051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.155004000 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 140266879 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=155004000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_stall.155004000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.925992417 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 229800950 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:25 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925992417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_trans.925992417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2422109446 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 4824502343 ps |
| CPU time | 44.01 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:04:09 AM UTC 24 |
| Peak memory | 236052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422109446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2422109446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.2818017287 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 13489495221 ps |
| CPU time | 93.87 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:05:00 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818017287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.2818017287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.930638576 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 166274224 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:26 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930638576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_link_in_err.930638576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.53162592 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 32323573723 ps |
| CPU time | 55.62 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:04:22 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53162592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_link_resume.53162592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2422339285 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 5060711406 ps |
| CPU time | 9.23 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:03:35 AM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422339285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2422339285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3830198165 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 4511285180 ps |
| CPU time | 116.89 seconds |
| Started | Oct 15 01:03:23 AM UTC 24 |
| Finished | Oct 15 01:05:24 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830198165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3830198165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.132096147 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 3304586925 ps |
| CPU time | 85.65 seconds |
| Started | Oct 15 01:03:24 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132096147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.132096147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.730476348 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 298645878 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:03:24 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730476348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.730476348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.1677514399 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 200859601 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677514399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.1677514399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.1385747267 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 3788749148 ps |
| CPU time | 99.88 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:05:07 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385747267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.1385747267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2689512878 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 152175275 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689512878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.2689512878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.1733605732 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 175351600 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733605732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.1733605732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.1947745560 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 199240044 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947745560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.1947745560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.2581070489 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 169264879 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581070489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.2581070489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2249516348 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 185609419 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249516348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.2249516348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3361031585 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 201422674 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:03:25 AM UTC 24 |
| Finished | Oct 15 01:03:28 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361031585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.3361031585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1186078778 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 167464378 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:29 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186078778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1186078778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.1515139262 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 233877267 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:29 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515139262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.1515139262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.1294048396 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 146868054 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294048396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.1294048396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.38503517 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 79329257 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:28 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=38503517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_phy_pins_sense.38503517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2815544514 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 17074953610 ps |
| CPU time | 43.67 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 233556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815544514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2815544514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.1491029685 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 188905350 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:36 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491029685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.1491029685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1238908449 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 225942786 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:36 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238908449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1238908449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.2451142271 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 180171038 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:03:27 AM UTC 24 |
| Finished | Oct 15 01:03:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451142271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.2451142271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.2126515043 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 190795769 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126515043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.2126515043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.1852672837 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 168388797 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852672837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.1852672837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.371810560 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 381313723 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371810560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_rx_full.371810560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.99346086 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 180951721 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99346086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_setup_stage.99346086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.433610542 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 212112436 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:32 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433610542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 39.usbdev_setup_trans_ignored.433610542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1641244169 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 229284627 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:40 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641244169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.1641244169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.1835617967 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 3308116281 ps |
| CPU time | 87.8 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:05:07 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835617967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.1835617967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1065778148 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 198225245 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065778148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.1065778148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.483967032 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 199158434 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483967032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_stall_trans.483967032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.1210514044 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 311631458 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:03:40 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210514044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.1210514044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.3950162994 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 2751065885 ps |
| CPU time | 71.06 seconds |
| Started | Oct 15 01:03:29 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950162994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.3950162994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3639443155 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 5287652343 ps |
| CPU time | 39.23 seconds |
| Started | Oct 15 01:03:21 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639443155 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3639443155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3759611726 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 487305019 ps |
| CPU time | 2.2 seconds |
| Started | Oct 15 01:03:30 AM UTC 24 |
| Finished | Oct 15 01:03:44 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3759611726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.3759611726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.924547678 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 530679695 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=924547678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_t x_rx_disruption.924547678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1864487732 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 633031230 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1864487732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1864487732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.3431258830 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 480104345 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3431258830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.3431258830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.2601084536 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 483906480 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:08:23 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2601084536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.2601084536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.3636859939 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 602685355 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3636859939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.3636859939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.3662499319 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 586806755 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3662499319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.3662499319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.3142034389 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 474046380 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3142034389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.3142034389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2219358949 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 482473042 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2219358949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2219358949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.320528526 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 556010211 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=320528526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_t x_rx_disruption.320528526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.2728047123 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 485809133 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2728047123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.2728047123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.1015689989 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 104613513 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:53:07 AM UTC 24 |
| Finished | Oct 15 12:53:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015689989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.1015689989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.4044816659 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 4853697106 ps |
| CPU time | 13.41 seconds |
| Started | Oct 15 12:52:29 AM UTC 24 |
| Finished | Oct 15 12:52:43 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044816659 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.4044816659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.1670337001 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 18568431247 ps |
| CPU time | 30.97 seconds |
| Started | Oct 15 12:52:30 AM UTC 24 |
| Finished | Oct 15 12:53:02 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670337001 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.1670337001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.4242140711 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 28905845138 ps |
| CPU time | 41.37 seconds |
| Started | Oct 15 12:52:31 AM UTC 24 |
| Finished | Oct 15 12:53:14 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242140711 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.4242140711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.1404875948 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 157315130 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:52:31 AM UTC 24 |
| Finished | Oct 15 12:52:34 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404875948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.1404875948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.3969136558 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 170025785 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:52:31 AM UTC 24 |
| Finished | Oct 15 12:52:34 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969136558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.3969136558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3781793126 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 147931000 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:52:32 AM UTC 24 |
| Finished | Oct 15 12:52:35 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781793126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3781793126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.2179704344 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 158338081 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:52:32 AM UTC 24 |
| Finished | Oct 15 12:52:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179704344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.2179704344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.1621415075 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 412132186 ps |
| CPU time | 2.07 seconds |
| Started | Oct 15 12:52:33 AM UTC 24 |
| Finished | Oct 15 12:52:36 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621415075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.1621415075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.127843754 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 907385986 ps |
| CPU time | 4.44 seconds |
| Started | Oct 15 12:52:33 AM UTC 24 |
| Finished | Oct 15 12:52:38 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127843754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.127843754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.3014839969 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 43973473899 ps |
| CPU time | 106.27 seconds |
| Started | Oct 15 12:52:34 AM UTC 24 |
| Finished | Oct 15 12:54:23 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014839969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.3014839969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.1353598388 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 905753164 ps |
| CPU time | 21.09 seconds |
| Started | Oct 15 12:52:35 AM UTC 24 |
| Finished | Oct 15 12:52:57 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353598388 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.1353598388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.427782812 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 1037098861 ps |
| CPU time | 3.91 seconds |
| Started | Oct 15 12:52:36 AM UTC 24 |
| Finished | Oct 15 12:52:41 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=427782812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.427782812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.147512849 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 197198751 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:52:36 AM UTC 24 |
| Finished | Oct 15 12:52:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147512849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_disconnected.147512849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3581768557 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 32605390 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:52:37 AM UTC 24 |
| Finished | Oct 15 12:52:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581768557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3581768557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.275772042 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 761914804 ps |
| CPU time | 3.68 seconds |
| Started | Oct 15 12:52:38 AM UTC 24 |
| Finished | Oct 15 12:52:43 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=275772042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.275772042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.1675763770 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 225605019 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:52:40 AM UTC 24 |
| Finished | Oct 15 12:52:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675763770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.1675763770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.968042311 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 172671702 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:52:40 AM UTC 24 |
| Finished | Oct 15 12:52:43 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968042311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_fifo_levels.968042311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.909671736 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 373728131 ps |
| CPU time | 2.99 seconds |
| Started | Oct 15 12:52:40 AM UTC 24 |
| Finished | Oct 15 12:52:44 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909671736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_fifo_rst.909671736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.2740510147 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 116220849851 ps |
| CPU time | 220.54 seconds |
| Started | Oct 15 12:52:40 AM UTC 24 |
| Finished | Oct 15 12:56:24 AM UTC 24 |
| Peak memory | 219360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740510147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2740510147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.3800527769 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 87328198977 ps |
| CPU time | 165.06 seconds |
| Started | Oct 15 12:52:42 AM UTC 24 |
| Finished | Oct 15 12:55:30 AM UTC 24 |
| Peak memory | 219196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3800527769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.3800527769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3077089127 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 90130086725 ps |
| CPU time | 207.06 seconds |
| Started | Oct 15 12:52:42 AM UTC 24 |
| Finished | Oct 15 12:56:13 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077089127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3077089127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1662023394 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 118215801676 ps |
| CPU time | 241.11 seconds |
| Started | Oct 15 12:52:42 AM UTC 24 |
| Finished | Oct 15 12:56:47 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1662023394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1662023394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.3104074959 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 95188061561 ps |
| CPU time | 160.32 seconds |
| Started | Oct 15 12:52:42 AM UTC 24 |
| Finished | Oct 15 12:55:25 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104074959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.3104074959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.3444609089 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 208423816 ps |
| CPU time | 2.05 seconds |
| Started | Oct 15 12:52:43 AM UTC 24 |
| Finished | Oct 15 12:52:46 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444609089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.3444609089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.2102488401 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 136528739 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:52:44 AM UTC 24 |
| Finished | Oct 15 12:52:47 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102488401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.2102488401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.1139930604 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 215957425 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 12:52:44 AM UTC 24 |
| Finished | Oct 15 12:52:47 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139930604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.1139930604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.2959336945 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 3851327447 ps |
| CPU time | 103.5 seconds |
| Started | Oct 15 12:52:43 AM UTC 24 |
| Finished | Oct 15 12:54:29 AM UTC 24 |
| Peak memory | 235828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959336945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.2959336945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.1622837670 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 5768050478 ps |
| CPU time | 45.23 seconds |
| Started | Oct 15 12:52:44 AM UTC 24 |
| Finished | Oct 15 12:53:31 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622837670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.1622837670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.3971271215 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 184420537 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:52:46 AM UTC 24 |
| Finished | Oct 15 12:52:48 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971271215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.3971271215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.578998674 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 33476474989 ps |
| CPU time | 65.51 seconds |
| Started | Oct 15 12:52:47 AM UTC 24 |
| Finished | Oct 15 12:53:54 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578998674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_link_resume.578998674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.3432761631 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 3532807237 ps |
| CPU time | 6.98 seconds |
| Started | Oct 15 12:52:47 AM UTC 24 |
| Finished | Oct 15 12:52:55 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432761631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.3432761631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2613183448 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 3610337487 ps |
| CPU time | 31.61 seconds |
| Started | Oct 15 12:52:48 AM UTC 24 |
| Finished | Oct 15 12:53:21 AM UTC 24 |
| Peak memory | 235920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613183448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.2613183448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.3378635029 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 2219456801 ps |
| CPU time | 21.59 seconds |
| Started | Oct 15 12:52:48 AM UTC 24 |
| Finished | Oct 15 12:53:11 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378635029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.3378635029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.2412821873 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 262311815 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:52:49 AM UTC 24 |
| Finished | Oct 15 12:52:52 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412821873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.2412821873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.677150865 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 195238598 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:52:49 AM UTC 24 |
| Finished | Oct 15 12:52:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677150865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.677150865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.106862944 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 1806833550 ps |
| CPU time | 47.68 seconds |
| Started | Oct 15 12:52:51 AM UTC 24 |
| Finished | Oct 15 12:53:40 AM UTC 24 |
| Peak memory | 229432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106862944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.106862944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1631872846 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 2385184208 ps |
| CPU time | 22.97 seconds |
| Started | Oct 15 12:52:51 AM UTC 24 |
| Finished | Oct 15 12:53:15 AM UTC 24 |
| Peak memory | 231520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631872846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1631872846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.1775733567 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 2173544709 ps |
| CPU time | 54.81 seconds |
| Started | Oct 15 12:52:52 AM UTC 24 |
| Finished | Oct 15 12:53:48 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775733567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.1775733567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.1898636716 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 153572656 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:52:52 AM UTC 24 |
| Finished | Oct 15 12:52:54 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898636716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.1898636716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.1983343650 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 150808584 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:52:53 AM UTC 24 |
| Finished | Oct 15 12:52:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983343650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.1983343650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.920457784 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 182818070 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 12:52:53 AM UTC 24 |
| Finished | Oct 15 12:52:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=920457784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_nak_trans.920457784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.2060420451 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 183445499 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 12:52:53 AM UTC 24 |
| Finished | Oct 15 12:52:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060420451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.2060420451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.867687544 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 190299211 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 12:52:54 AM UTC 24 |
| Finished | Oct 15 12:52:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867687544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_out_stall.867687544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.1621367156 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 193441302 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:52:55 AM UTC 24 |
| Finished | Oct 15 12:52:57 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621367156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.1621367156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.4193420114 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 166842707 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:52:55 AM UTC 24 |
| Finished | Oct 15 12:52:57 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193420114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.4193420114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2466935515 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 291647291 ps |
| CPU time | 1.89 seconds |
| Started | Oct 15 12:52:56 AM UTC 24 |
| Finished | Oct 15 12:52:59 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466935515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2466935515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.806145520 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 193924951 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:52:56 AM UTC 24 |
| Finished | Oct 15 12:52:59 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806145520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.806145520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.695045687 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 161604698 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:52:56 AM UTC 24 |
| Finished | Oct 15 12:52:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695045687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.695045687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2460967267 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 39933584 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:52:57 AM UTC 24 |
| Finished | Oct 15 12:52:59 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460967267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.2460967267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1808800468 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 10229447356 ps |
| CPU time | 27.99 seconds |
| Started | Oct 15 12:52:57 AM UTC 24 |
| Finished | Oct 15 12:53:27 AM UTC 24 |
| Peak memory | 236044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808800468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.1808800468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.3318439283 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 193569501 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 12:52:57 AM UTC 24 |
| Finished | Oct 15 12:53:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318439283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.3318439283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.1963739985 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 223876091 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:52:57 AM UTC 24 |
| Finished | Oct 15 12:53:00 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963739985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.1963739985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.83324705 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 6515547410 ps |
| CPU time | 30.65 seconds |
| Started | Oct 15 12:52:59 AM UTC 24 |
| Finished | Oct 15 12:53:31 AM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=83324705 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.83324705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.1171390857 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 6765327126 ps |
| CPU time | 196.26 seconds |
| Started | Oct 15 12:52:59 AM UTC 24 |
| Finished | Oct 15 12:56:18 AM UTC 24 |
| Peak memory | 231576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171390857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1171390857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.77215075 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 5272922882 ps |
| CPU time | 53.77 seconds |
| Started | Oct 15 12:52:59 AM UTC 24 |
| Finished | Oct 15 12:53:54 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=77215075 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.77215075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.692265940 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 235744934 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:52:59 AM UTC 24 |
| Finished | Oct 15 12:53:01 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692265940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_random_length_in_transaction.692265940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.3450153604 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 198718451 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:52:59 AM UTC 24 |
| Finished | Oct 15 12:53:01 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450153604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.3450153604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.1764682604 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 20201756607 ps |
| CPU time | 34.01 seconds |
| Started | Oct 15 12:53:00 AM UTC 24 |
| Finished | Oct 15 12:53:36 AM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764682604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.1764682604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.2433747174 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 179753708 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:53:00 AM UTC 24 |
| Finished | Oct 15 12:53:03 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433747174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.2433747174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.3109886065 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 363797336 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 12:53:00 AM UTC 24 |
| Finished | Oct 15 12:53:04 AM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109886065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.3109886065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3227479458 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 179750617 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:53:00 AM UTC 24 |
| Finished | Oct 15 12:53:03 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227479458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.3227479458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.1678399035 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 411971315 ps |
| CPU time | 2.24 seconds |
| Started | Oct 15 12:53:07 AM UTC 24 |
| Finished | Oct 15 12:53:10 AM UTC 24 |
| Peak memory | 253384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678399035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.1678399035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.2317978598 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 425451785 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:53:00 AM UTC 24 |
| Finished | Oct 15 12:53:03 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2317978598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2317978598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.3986022958 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 229680769 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 12:53:02 AM UTC 24 |
| Finished | Oct 15 12:53:04 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986022958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3986022958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.3589324159 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 215410681 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:53:02 AM UTC 24 |
| Finished | Oct 15 12:53:04 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589324159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.3589324159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.1553469630 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 171366825 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:53:03 AM UTC 24 |
| Finished | Oct 15 12:53:05 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553469630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.1553469630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.600890306 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 276071289 ps |
| CPU time | 1.86 seconds |
| Started | Oct 15 12:53:03 AM UTC 24 |
| Finished | Oct 15 12:53:06 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600890306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.600890306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.2629110483 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 2101730133 ps |
| CPU time | 61.12 seconds |
| Started | Oct 15 12:53:04 AM UTC 24 |
| Finished | Oct 15 12:54:07 AM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629110483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.2629110483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.2678665741 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 158384754 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:53:04 AM UTC 24 |
| Finished | Oct 15 12:53:07 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678665741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.2678665741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.4135264952 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 184261117 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:53:04 AM UTC 24 |
| Finished | Oct 15 12:53:07 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135264952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.4135264952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.2505220481 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 816219202 ps |
| CPU time | 3.82 seconds |
| Started | Oct 15 12:53:05 AM UTC 24 |
| Finished | Oct 15 12:53:09 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505220481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.2505220481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.3105758686 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 3953602676 ps |
| CPU time | 110.25 seconds |
| Started | Oct 15 12:53:04 AM UTC 24 |
| Finished | Oct 15 12:54:57 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105758686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.3105758686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1722111840 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 3775450830 ps |
| CPU time | 83.3 seconds |
| Started | Oct 15 12:53:06 AM UTC 24 |
| Finished | Oct 15 12:54:31 AM UTC 24 |
| Peak memory | 231408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722111840 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.1722111840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.1005220037 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 2259786893 ps |
| CPU time | 17.64 seconds |
| Started | Oct 15 12:52:35 AM UTC 24 |
| Finished | Oct 15 12:52:54 AM UTC 24 |
| Peak memory | 219268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005220037 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.1005220037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.922076616 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 488819564 ps |
| CPU time | 2.57 seconds |
| Started | Oct 15 12:53:06 AM UTC 24 |
| Finished | Oct 15 12:53:09 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=922076616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_ rx_disruption.922076616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.210954498 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 78215546 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:03:50 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210954498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.210954498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.3224858355 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 7013427852 ps |
| CPU time | 12.23 seconds |
| Started | Oct 15 01:03:31 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224858355 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.3224858355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.789471435 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 21402586336 ps |
| CPU time | 28.37 seconds |
| Started | Oct 15 01:03:31 AM UTC 24 |
| Finished | Oct 15 01:04:11 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789471435 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.789471435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.638840288 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 24811701771 ps |
| CPU time | 37.09 seconds |
| Started | Oct 15 01:03:32 AM UTC 24 |
| Finished | Oct 15 01:04:14 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=638840288 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.638840288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2166740838 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 157997815 ps |
| CPU time | 0.94 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:03:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166740838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.2166740838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.767504140 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 139736708 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:03:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767504140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_bitstuff_err.767504140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3415709285 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 476137511 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:03:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415709285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.3415709285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.2939644031 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 677893473 ps |
| CPU time | 2.21 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:03:40 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939644031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.2939644031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.2381692016 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 47218193972 ps |
| CPU time | 87.29 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381692016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.2381692016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1501760152 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 1541886060 ps |
| CPU time | 35.91 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:04:14 AM UTC 24 |
| Peak memory | 218992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501760152 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1501760152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.166823168 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 703720376 ps |
| CPU time | 1.94 seconds |
| Started | Oct 15 01:03:34 AM UTC 24 |
| Finished | Oct 15 01:03:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166823168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.166823168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.2112278312 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 174268207 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:03:35 AM UTC 24 |
| Finished | Oct 15 01:03:37 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112278312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.2112278312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_enable.243088658 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 28596236 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 01:03:38 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243088658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.243088658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.4221134189 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 964287499 ps |
| CPU time | 2.65 seconds |
| Started | Oct 15 01:03:38 AM UTC 24 |
| Finished | Oct 15 01:03:41 AM UTC 24 |
| Peak memory | 219008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221134189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.4221134189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.4134362891 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 161682130 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:03:38 AM UTC 24 |
| Finished | Oct 15 01:03:44 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134362891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.4134362891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1135486628 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 293223483 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:03:38 AM UTC 24 |
| Finished | Oct 15 01:03:44 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135486628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1135486628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3706064118 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 399987499 ps |
| CPU time | 1.98 seconds |
| Started | Oct 15 01:03:39 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706064118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3706064118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.1570598318 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 243106747 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:03:39 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570598318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.1570598318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.190700904 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 145122051 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:03:40 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=190700904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_stall.190700904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.3238559032 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 192337574 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:03:40 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238559032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.3238559032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.191973019 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 4572140189 ps |
| CPU time | 121.6 seconds |
| Started | Oct 15 01:03:39 AM UTC 24 |
| Finished | Oct 15 01:05:44 AM UTC 24 |
| Peak memory | 231460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=191973019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.191973019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1369131672 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 9540868921 ps |
| CPU time | 59.24 seconds |
| Started | Oct 15 01:03:40 AM UTC 24 |
| Finished | Oct 15 01:04:42 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369131672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1369131672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.1399609958 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 219974013 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:03:41 AM UTC 24 |
| Finished | Oct 15 01:03:43 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399609958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.1399609958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.1992076540 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 24184653604 ps |
| CPU time | 44.7 seconds |
| Started | Oct 15 01:03:41 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992076540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.1992076540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.910572180 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 5058322181 ps |
| CPU time | 8.86 seconds |
| Started | Oct 15 01:03:41 AM UTC 24 |
| Finished | Oct 15 01:03:51 AM UTC 24 |
| Peak memory | 229300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=910572180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_suspend.910572180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.3345683978 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 3417602448 ps |
| CPU time | 31.4 seconds |
| Started | Oct 15 01:03:41 AM UTC 24 |
| Finished | Oct 15 01:04:14 AM UTC 24 |
| Peak memory | 236048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345683978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3345683978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.4288141474 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 1713143133 ps |
| CPU time | 16.2 seconds |
| Started | Oct 15 01:03:42 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288141474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.4288141474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.2308518620 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 259234162 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:03:42 AM UTC 24 |
| Finished | Oct 15 01:03:45 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308518620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.2308518620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.4020900721 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 216110342 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:03:43 AM UTC 24 |
| Finished | Oct 15 01:03:46 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020900721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.4020900721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.3332954258 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 1762518731 ps |
| CPU time | 42.46 seconds |
| Started | Oct 15 01:03:43 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332954258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.3332954258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.398773509 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 193360591 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:03:43 AM UTC 24 |
| Finished | Oct 15 01:03:46 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398773509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.398773509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.959549712 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 146601493 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959549712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.959549712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.281909046 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 235464063 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281909046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_nak_trans.281909046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2802456061 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 161894069 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802456061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.2802456061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.334228700 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 194650328 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334228700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_out_stall.334228700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.589364089 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 159993477 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:47 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589364089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_out_trans_nak.589364089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.2196030977 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 161856041 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196030977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.2196030977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.450832703 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 253359414 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450832703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.450832703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1248913706 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 203780472 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248913706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.1248913706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1396948860 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 38115965 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:47 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396948860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.1396948860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.460328503 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 18569695586 ps |
| CPU time | 46.52 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:04:34 AM UTC 24 |
| Peak memory | 233648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460328503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.460328503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.2722511656 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 202054877 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:03:45 AM UTC 24 |
| Finished | Oct 15 01:03:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722511656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.2722511656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.855381027 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 183075495 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:03:47 AM UTC 24 |
| Finished | Oct 15 01:03:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855381027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_pkt_sent.855381027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.3376738261 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 168781099 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:03:47 AM UTC 24 |
| Finished | Oct 15 01:03:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376738261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.3376738261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.369816729 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 177445335 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:03:47 AM UTC 24 |
| Finished | Oct 15 01:03:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369816729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.369816729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.1398865033 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 186880690 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:03:47 AM UTC 24 |
| Finished | Oct 15 01:03:50 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398865033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_rx_crc_err.1398865033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1650670247 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 245757223 ps |
| CPU time | 1.76 seconds |
| Started | Oct 15 01:03:47 AM UTC 24 |
| Finished | Oct 15 01:03:50 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650670247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.1650670247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.553888729 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 147008330 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:51 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553888729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_setup_stage.553888729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.2180159547 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 176217031 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:51 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180159547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.2180159547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.1196661694 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 254747541 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196661694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.1196661694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.3291218963 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 2513196336 ps |
| CPU time | 65.15 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 236152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291218963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.3291218963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.1047378092 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 155028833 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047378092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.1047378092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.332929765 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 225876691 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:51 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332929765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_stall_trans.332929765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1237566746 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 1166793059 ps |
| CPU time | 3.55 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:54 AM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237566746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1237566746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.2795524143 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 3763387855 ps |
| CPU time | 34.15 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:04:25 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795524143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.2795524143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.383354414 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 1548643663 ps |
| CPU time | 32.87 seconds |
| Started | Oct 15 01:03:33 AM UTC 24 |
| Finished | Oct 15 01:04:11 AM UTC 24 |
| Peak memory | 219300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=383354414 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.383354414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.2849985640 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 539107630 ps |
| CPU time | 1.8 seconds |
| Started | Oct 15 01:03:49 AM UTC 24 |
| Finished | Oct 15 01:03:52 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2849985640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.2849985640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.3843971418 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 511390987 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:08:25 AM UTC 24 |
| Finished | Oct 15 01:08:38 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3843971418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.3843971418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.3694428296 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 33982407 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:04:04 AM UTC 24 |
| Finished | Oct 15 01:04:06 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694428296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.3694428296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.3168183512 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 10445722632 ps |
| CPU time | 16.35 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:04:08 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168183512 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.3168183512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.3673884151 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 13815425340 ps |
| CPU time | 20.33 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:04:12 AM UTC 24 |
| Peak memory | 229248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673884151 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.3673884151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.2511122597 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 25639663448 ps |
| CPU time | 32.75 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:04:25 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511122597 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.2511122597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.3674952075 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 156520771 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674952075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.3674952075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3816807669 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 222205994 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816807669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3816807669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3256052491 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 213853936 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:03:51 AM UTC 24 |
| Finished | Oct 15 01:03:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256052491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3256052491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2920904505 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 484335343 ps |
| CPU time | 1.99 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:56 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920904505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2920904505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.2911088044 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 21303393332 ps |
| CPU time | 38.34 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:04:33 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911088044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.2911088044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.626417570 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 837358115 ps |
| CPU time | 5.65 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 219060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626417570 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.626417570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.3351760433 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 833538241 ps |
| CPU time | 2.36 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:56 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351760433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.3351760433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1506562519 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 154829749 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506562519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1506562519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_enable.196517571 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 34933497 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196517571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.196517571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.2803209935 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 823189318 ps |
| CPU time | 2.58 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:03:57 AM UTC 24 |
| Peak memory | 219064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803209935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.2803209935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.3556981131 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 194008105 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556981131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.3556981131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.1842773074 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 347876519 ps |
| CPU time | 2.98 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:59 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842773074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.1842773074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.4198043764 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 203380801 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:58 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198043764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.4198043764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.1512342526 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 153294333 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512342526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.1512342526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.3116380910 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 166907291 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116380910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.3116380910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.3018148655 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 3967080255 ps |
| CPU time | 101.14 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:05:38 AM UTC 24 |
| Peak memory | 231572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018148655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3018148655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.2613495344 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 10388641916 ps |
| CPU time | 71.16 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 219052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613495344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.2613495344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.318007982 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 180948676 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:03:58 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318007982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_link_in_err.318007982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.3765987872 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 27695299203 ps |
| CPU time | 47.52 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:04:45 AM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765987872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.3765987872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.3162457033 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 5546303660 ps |
| CPU time | 9.23 seconds |
| Started | Oct 15 01:03:55 AM UTC 24 |
| Finished | Oct 15 01:04:06 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162457033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.3162457033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.2300313135 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 4489534123 ps |
| CPU time | 44.27 seconds |
| Started | Oct 15 01:03:57 AM UTC 24 |
| Finished | Oct 15 01:04:44 AM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300313135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.2300313135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1499580317 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 1299729922 ps |
| CPU time | 10.28 seconds |
| Started | Oct 15 01:03:57 AM UTC 24 |
| Finished | Oct 15 01:04:09 AM UTC 24 |
| Peak memory | 229444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499580317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1499580317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.2765307990 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 249845273 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:03:57 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765307990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.2765307990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.684237210 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 192666254 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:03:57 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684237210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.684237210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.3722713382 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 1761701676 ps |
| CPU time | 18.1 seconds |
| Started | Oct 15 01:03:57 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 229344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3722713382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3722713382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.1383493326 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 202431822 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:03:58 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383493326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.1383493326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.1885035636 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 148891991 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:03:58 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885035636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.1885035636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.1970198265 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 218411435 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:03:58 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970198265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.1970198265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.3421190485 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 148778857 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:03:58 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421190485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.3421190485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.2957458750 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 172215983 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:03:58 AM UTC 24 |
| Finished | Oct 15 01:04:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957458750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.2957458750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.918473856 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 178645044 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:03:59 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918473856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_out_trans_nak.918473856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.1921046935 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 153591842 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:03:59 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921046935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.1921046935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.2555740569 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 205729487 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:03:59 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555740569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2555740569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.1271851902 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 154423028 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:03:59 AM UTC 24 |
| Finished | Oct 15 01:04:01 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271851902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.1271851902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.545171988 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 41764891 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:03:59 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545171988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_phy_pins_sense.545171988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.2754879458 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 9048977737 ps |
| CPU time | 25.8 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:28 AM UTC 24 |
| Peak memory | 229332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754879458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.2754879458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.2122204805 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 199223875 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122204805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.2122204805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.3815340885 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 230997207 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815340885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.3815340885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.2149938239 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 237095782 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:03 AM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149938239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.2149938239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.3254882666 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 183958052 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254882666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.3254882666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.248025372 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 183868141 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=248025372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_rx_crc_err.248025372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.4006115782 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 347959555 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006115782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.4006115782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.699574241 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 188936416 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:04:01 AM UTC 24 |
| Finished | Oct 15 01:04:04 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699574241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_setup_stage.699574241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.474298474 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 164409792 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:06 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=474298474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 41.usbdev_setup_trans_ignored.474298474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.1731385925 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 212792037 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731385925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.1731385925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.2081189685 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 3189993967 ps |
| CPU time | 82.92 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:05:28 AM UTC 24 |
| Peak memory | 229316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081189685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.2081189685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.3464356243 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 199210174 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464356243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.3464356243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.397007587 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 164913921 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:06 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397007587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.397007587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.489861605 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 1170525182 ps |
| CPU time | 3.19 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:08 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489861605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_stream_len_max.489861605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.1790016240 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 1847019954 ps |
| CPU time | 17.06 seconds |
| Started | Oct 15 01:04:03 AM UTC 24 |
| Finished | Oct 15 01:04:22 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790016240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.1790016240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.945317594 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 1118326736 ps |
| CPU time | 8.37 seconds |
| Started | Oct 15 01:03:53 AM UTC 24 |
| Finished | Oct 15 01:04:02 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=945317594 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.945317594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.584792827 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 432605063 ps |
| CPU time | 2.13 seconds |
| Started | Oct 15 01:04:04 AM UTC 24 |
| Finished | Oct 15 01:04:07 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=584792827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_tx _rx_disruption.584792827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.4282413012 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 618817008 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4282413012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.4282413012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.3697718049 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 464834798 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3697718049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.3697718049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.326978974 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 551885155 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=326978974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_t x_rx_disruption.326978974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2417177500 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 460741341 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2417177500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2417177500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.2379228945 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 544266853 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2379228945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.2379228945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.2439442307 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 598372740 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439442307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.2439442307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.3204465795 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 47081768 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:04:24 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204465795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.3204465795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.1851698582 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 10926940782 ps |
| CPU time | 17.22 seconds |
| Started | Oct 15 01:04:04 AM UTC 24 |
| Finished | Oct 15 01:04:22 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851698582 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.1851698582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.2530699000 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 19629563286 ps |
| CPU time | 25.68 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:32 AM UTC 24 |
| Peak memory | 219276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530699000 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.2530699000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.1879980986 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 25889001074 ps |
| CPU time | 35.15 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:42 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879980986 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.1879980986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.594623106 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 195747463 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:08 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594623106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_av_buffer.594623106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.2136340210 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 139720669 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:08 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136340210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.2136340210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.1486440780 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 597062824 ps |
| CPU time | 2.57 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:09 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486440780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.1486440780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.3651304580 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 1057012469 ps |
| CPU time | 3.78 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:04:10 AM UTC 24 |
| Peak memory | 219172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651304580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.3651304580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.3324358468 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 30293520049 ps |
| CPU time | 56.9 seconds |
| Started | Oct 15 01:04:05 AM UTC 24 |
| Finished | Oct 15 01:05:04 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324358468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.3324358468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2626173098 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 3883759165 ps |
| CPU time | 30.87 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:46 AM UTC 24 |
| Peak memory | 218716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626173098 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2626173098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.2378199440 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 645831062 ps |
| CPU time | 2.12 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378199440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.2378199440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.3429729322 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 190862627 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:16 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429729322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.3429729322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_enable.376605738 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 55580916 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=376605738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.376605738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.124175272 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 780738937 ps |
| CPU time | 2.52 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124175272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.124175272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3834644948 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 364872721 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:20 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834644948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3834644948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.3745357666 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 144971825 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745357666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.3745357666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.3883907816 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 281340301 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:20 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883907816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.3883907816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2788525105 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 234086164 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788525105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2788525105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.2194936871 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 150683964 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194936871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.2194936871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.2265571243 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 176918846 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265571243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.2265571243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.3831375274 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 3879855308 ps |
| CPU time | 100.86 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831375274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3831375274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.1235960250 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 5990386629 ps |
| CPU time | 69.73 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:05:28 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235960250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.1235960250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.2476974068 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 276848133 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:20 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476974068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.2476974068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.1752396330 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 30532083926 ps |
| CPU time | 46.29 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752396330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.1752396330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.3084135413 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 4399941915 ps |
| CPU time | 10.23 seconds |
| Started | Oct 15 01:04:10 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084135413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.3084135413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.4253283127 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 3970563152 ps |
| CPU time | 32.67 seconds |
| Started | Oct 15 01:04:11 AM UTC 24 |
| Finished | Oct 15 01:04:49 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253283127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.4253283127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.987325542 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 1942820902 ps |
| CPU time | 49.21 seconds |
| Started | Oct 15 01:04:11 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=987325542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.987325542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.3342675643 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 243686330 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:04:11 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342675643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.3342675643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.375894398 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 202643610 ps |
| CPU time | 0.97 seconds |
| Started | Oct 15 01:04:11 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375894398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.375894398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.221945528 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 4164251661 ps |
| CPU time | 108.77 seconds |
| Started | Oct 15 01:04:12 AM UTC 24 |
| Finished | Oct 15 01:06:06 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=221945528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.221945528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2295297421 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 158033427 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:04:12 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295297421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2295297421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.2752386318 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 146817626 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:04:13 AM UTC 24 |
| Finished | Oct 15 01:04:18 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752386318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.2752386318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.3208256285 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 170686230 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:04:15 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208256285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.3208256285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.2251315906 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 181599654 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:04:15 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251315906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.2251315906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.56572570 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 178746989 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:04:15 AM UTC 24 |
| Finished | Oct 15 01:04:17 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56572570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_stall.56572570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.3397025081 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 185225706 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:04:17 AM UTC 24 |
| Finished | Oct 15 01:04:20 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397025081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.3397025081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.3514128149 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 149341686 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:04:17 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514128149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.3514128149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.2143211485 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 234140099 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:04:17 AM UTC 24 |
| Finished | Oct 15 01:04:20 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143211485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2143211485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.927013486 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 153333956 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:04:17 AM UTC 24 |
| Finished | Oct 15 01:04:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=927013486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.927013486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.1611546584 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 37874489 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611546584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.1611546584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.1705925506 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 22479878473 ps |
| CPU time | 58.11 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 233616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705925506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.1705925506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.961005495 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 147160695 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961005495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_pkt_received.961005495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.377553720 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 227263456 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377553720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.377553720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.3879119047 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 256692458 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879119047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.3879119047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3520832095 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 190312358 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:04:19 AM UTC 24 |
| Finished | Oct 15 01:04:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520832095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3520832095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.2714430946 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 171404280 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:04:20 AM UTC 24 |
| Finished | Oct 15 01:04:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714430946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.2714430946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.2698173952 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 391219070 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 01:04:20 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698173952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.2698173952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.178987662 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 174303831 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:04:20 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178987662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_setup_stage.178987662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.4060930163 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 147147319 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:04:20 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060930163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.4060930163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.66648673 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 223615133 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=66648673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 42.usbdev_smoke.66648673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.1926792906 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 2306209675 ps |
| CPU time | 16.44 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:38 AM UTC 24 |
| Peak memory | 229412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926792906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.1926792906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.3249848573 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 207568390 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249848573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3249848573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.560680038 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 181540081 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560680038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_stall_trans.560680038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.2746424987 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 369299103 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:23 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746424987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.2746424987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.1340926421 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 2915183801 ps |
| CPU time | 73.44 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:05:36 AM UTC 24 |
| Peak memory | 231296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340926421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.1340926421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.3329414598 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 1412885358 ps |
| CPU time | 29.86 seconds |
| Started | Oct 15 01:04:07 AM UTC 24 |
| Finished | Oct 15 01:04:45 AM UTC 24 |
| Peak memory | 218760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329414598 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.3329414598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.935416479 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 441978386 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 01:04:21 AM UTC 24 |
| Finished | Oct 15 01:04:24 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=935416479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_tx _rx_disruption.935416479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.130754484 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 539375868 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=130754484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_t x_rx_disruption.130754484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.3454885782 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 476081135 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:08:26 AM UTC 24 |
| Finished | Oct 15 01:08:52 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3454885782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.3454885782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.3138682144 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 555180646 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:08:27 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3138682144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.3138682144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.2316580614 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 489831541 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:08:27 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2316580614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.2316580614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.4172958256 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 587770139 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:08:28 AM UTC 24 |
| Finished | Oct 15 01:08:48 AM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4172958256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.4172958256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.3961183254 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 498830756 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:08:28 AM UTC 24 |
| Finished | Oct 15 01:08:48 AM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3961183254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.3961183254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.3520126480 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 679320495 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:08:28 AM UTC 24 |
| Finished | Oct 15 01:08:48 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3520126480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.3520126480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.2550267887 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 563502273 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:08:29 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2550267887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.2550267887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.3959375497 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 529599173 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:08:29 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3959375497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.3959375497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.2794049697 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 498131670 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:08:29 AM UTC 24 |
| Finished | Oct 15 01:08:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2794049697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.2794049697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.795377228 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 44755607 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:04:38 AM UTC 24 |
| Finished | Oct 15 01:04:42 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=795377228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.795377228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.192466151 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 3496938868 ps |
| CPU time | 5.86 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192466151 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.192466151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.2919997462 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 15063682809 ps |
| CPU time | 22.38 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:04:46 AM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919997462 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.2919997462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.1399624074 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 25515157077 ps |
| CPU time | 41.5 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399624074 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.1399624074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.3975009739 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 189807215 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:04:25 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975009739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.3975009739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.2401001445 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 153692713 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:04:22 AM UTC 24 |
| Finished | Oct 15 01:04:24 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401001445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.2401001445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.2353298240 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 389817312 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:04:23 AM UTC 24 |
| Finished | Oct 15 01:04:25 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353298240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.2353298240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.2246328129 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 440238390 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246328129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.2246328129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.1263287508 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 35699524763 ps |
| CPU time | 56.39 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:05:22 AM UTC 24 |
| Peak memory | 218992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263287508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.1263287508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.2215172948 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 1423614185 ps |
| CPU time | 30.36 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215172948 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.2215172948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1392451482 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 594751542 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:28 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392451482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1392451482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.1838559778 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 168990406 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838559778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.1838559778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_enable.105538383 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 34931352 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105538383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.105538383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.2368538812 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 769943225 ps |
| CPU time | 2.71 seconds |
| Started | Oct 15 01:04:25 AM UTC 24 |
| Finished | Oct 15 01:04:28 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368538812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.2368538812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.535355835 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 498996156 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 01:04:25 AM UTC 24 |
| Finished | Oct 15 01:04:28 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535355835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.535355835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.2196586837 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 154046874 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:04:25 AM UTC 24 |
| Finished | Oct 15 01:04:27 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196586837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.2196586837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.2780156346 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 409515709 ps |
| CPU time | 2.78 seconds |
| Started | Oct 15 01:04:25 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 218852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780156346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.2780156346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.2685083146 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 249458809 ps |
| CPU time | 1.94 seconds |
| Started | Oct 15 01:04:26 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 227076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685083146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.2685083146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.246566705 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 190539583 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:04:26 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246566705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_stall.246566705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.3270534979 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 165732892 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:04:26 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270534979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.3270534979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.139729847 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 4675736441 ps |
| CPU time | 33.15 seconds |
| Started | Oct 15 01:04:25 AM UTC 24 |
| Finished | Oct 15 01:04:59 AM UTC 24 |
| Peak memory | 229136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=139729847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.139729847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3159349778 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 4493223240 ps |
| CPU time | 50.08 seconds |
| Started | Oct 15 01:04:26 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159349778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3159349778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.2864382440 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 174614356 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:04:26 AM UTC 24 |
| Finished | Oct 15 01:04:29 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864382440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.2864382440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.3076280697 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 12519987868 ps |
| CPU time | 15.82 seconds |
| Started | Oct 15 01:04:27 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076280697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.3076280697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.41187512 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 11221934872 ps |
| CPU time | 15.21 seconds |
| Started | Oct 15 01:04:27 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41187512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_suspend.41187512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1657611257 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 5377089339 ps |
| CPU time | 51.81 seconds |
| Started | Oct 15 01:04:27 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 236048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657611257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1657611257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.1814837695 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 2281553651 ps |
| CPU time | 56.79 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 229344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814837695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.1814837695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.134312896 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 242490079 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:04:31 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134312896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.134312896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.3752236323 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 201561091 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:04:31 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752236323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.3752236323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.4158793052 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 2992208863 ps |
| CPU time | 20.7 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158793052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.4158793052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.1886476262 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 195678817 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:04:32 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886476262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.1886476262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.2776632988 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 182348687 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:04:28 AM UTC 24 |
| Finished | Oct 15 01:04:31 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776632988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.2776632988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.1325200504 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 191867959 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325200504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.1325200504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.929728586 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 227720136 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=929728586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_out_iso.929728586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.3718850085 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 181502768 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718850085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.3718850085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.2883802131 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 155373406 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883802131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.2883802131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.61169005 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 157266467 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61169005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.61169005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.277144775 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 251917799 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277144775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.277144775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3970037809 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 140929965 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970037809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3970037809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.546908990 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 68012491 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=546908990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_phy_pins_sense.546908990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.2241711944 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 17867136410 ps |
| CPU time | 49.3 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241711944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.2241711944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.2709328889 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 233818530 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709328889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.2709328889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.385859250 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 229811308 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:04:30 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385859250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_pkt_sent.385859250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.3920631624 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 292442970 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:04:32 AM UTC 24 |
| Finished | Oct 15 01:04:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920631624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.3920631624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.2766132737 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 195155952 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:04:32 AM UTC 24 |
| Finished | Oct 15 01:04:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766132737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.2766132737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.2713737380 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 183987788 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:04:32 AM UTC 24 |
| Finished | Oct 15 01:04:37 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713737380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.2713737380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.235514333 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 256519197 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:04:33 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235514333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.235514333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.3581204702 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 164050926 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:04:33 AM UTC 24 |
| Finished | Oct 15 01:04:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581204702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.3581204702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.895000170 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 151572966 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:04:33 AM UTC 24 |
| Finished | Oct 15 01:04:42 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895000170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 43.usbdev_setup_trans_ignored.895000170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.1686778321 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 217140935 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:04:33 AM UTC 24 |
| Finished | Oct 15 01:04:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686778321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.1686778321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.158299714 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 2152984623 ps |
| CPU time | 52.08 seconds |
| Started | Oct 15 01:04:33 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 236040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=158299714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.158299714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.3216931325 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 171176083 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:04:35 AM UTC 24 |
| Finished | Oct 15 01:04:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216931325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.3216931325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.3360359881 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 209381224 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:04:35 AM UTC 24 |
| Finished | Oct 15 01:04:37 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360359881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.3360359881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.901768096 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 847808972 ps |
| CPU time | 3.05 seconds |
| Started | Oct 15 01:04:37 AM UTC 24 |
| Finished | Oct 15 01:04:44 AM UTC 24 |
| Peak memory | 219168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901768096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_stream_len_max.901768096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.3040131787 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 3856494336 ps |
| CPU time | 27.28 seconds |
| Started | Oct 15 01:04:35 AM UTC 24 |
| Finished | Oct 15 01:05:04 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040131787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.3040131787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.364297739 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 2974446042 ps |
| CPU time | 25.83 seconds |
| Started | Oct 15 01:04:24 AM UTC 24 |
| Finished | Oct 15 01:04:51 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364297739 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.364297739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.3260433933 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 571583284 ps |
| CPU time | 1.97 seconds |
| Started | Oct 15 01:04:38 AM UTC 24 |
| Finished | Oct 15 01:04:45 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3260433933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.3260433933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.4049363731 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 492411000 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:30 AM UTC 24 |
| Finished | Oct 15 01:08:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4049363731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.4049363731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.267218940 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 584960132 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:08:30 AM UTC 24 |
| Finished | Oct 15 01:08:42 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=267218940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_t x_rx_disruption.267218940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.3662258470 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 449211447 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3662258470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.3662258470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.4102256707 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 467022448 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4102256707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.4102256707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.3194979545 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 450570230 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3194979545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.3194979545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.2852276555 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 642861187 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2852276555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.2852276555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.79833717 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 376514723 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=79833717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_tx _rx_disruption.79833717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.2313380682 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 618516319 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2313380682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.2313380682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1232263679 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 579257091 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1232263679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1232263679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.587158688 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 568742458 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=587158688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_t x_rx_disruption.587158688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.2310040502 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 61029480 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:04:54 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310040502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.2310040502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.4154586962 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 9067609042 ps |
| CPU time | 14.03 seconds |
| Started | Oct 15 01:04:39 AM UTC 24 |
| Finished | Oct 15 01:04:55 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154586962 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.4154586962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.1956994708 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 21251182487 ps |
| CPU time | 27.22 seconds |
| Started | Oct 15 01:04:39 AM UTC 24 |
| Finished | Oct 15 01:05:08 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956994708 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.1956994708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2548748283 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 30159496943 ps |
| CPU time | 40.19 seconds |
| Started | Oct 15 01:04:40 AM UTC 24 |
| Finished | Oct 15 01:05:21 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548748283 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2548748283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.84259846 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 175280952 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:04:43 AM UTC 24 |
| Finished | Oct 15 01:04:45 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84259846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_av_buffer.84259846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.3082509378 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 153580579 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:04:43 AM UTC 24 |
| Finished | Oct 15 01:04:46 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082509378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.3082509378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.1778222978 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 505281559 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 01:04:43 AM UTC 24 |
| Finished | Oct 15 01:04:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778222978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.1778222978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.1909431240 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 1245338952 ps |
| CPU time | 3.15 seconds |
| Started | Oct 15 01:04:43 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 219188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909431240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.1909431240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.4094834372 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 42822208613 ps |
| CPU time | 73.91 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:05:59 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094834372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.4094834372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.2854729110 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 866150812 ps |
| CPU time | 17.96 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:05:03 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854729110 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.2854729110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.806646360 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 825524936 ps |
| CPU time | 2.15 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:47 AM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806646360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disable_endpoint.806646360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.2004160461 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 141458191 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:46 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004160461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.2004160461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_enable.961488180 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 71704703 ps |
| CPU time | 0.8 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961488180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.961488180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.3810457091 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 889871217 ps |
| CPU time | 3.13 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:49 AM UTC 24 |
| Peak memory | 219032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810457091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.3810457091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2772048992 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 622923239 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772048992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2772048992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3612014613 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 264817298 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612014613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3612014613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.2747822362 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 469960446 ps |
| CPU time | 3.2 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747822362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.2747822362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.2029444351 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 233017229 ps |
| CPU time | 1.87 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029444351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2029444351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.3681656851 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 198756995 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681656851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.3681656851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.41440026 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 189081128 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:04:47 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41440026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_in_trans.41440026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.375189894 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 2446286182 ps |
| CPU time | 18 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:05:04 AM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375189894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.375189894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2009954321 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 5969793807 ps |
| CPU time | 40.91 seconds |
| Started | Oct 15 01:04:45 AM UTC 24 |
| Finished | Oct 15 01:05:28 AM UTC 24 |
| Peak memory | 219232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009954321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2009954321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.4246132418 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 182840606 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:04:46 AM UTC 24 |
| Finished | Oct 15 01:04:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246132418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.4246132418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.1163300673 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 9699207257 ps |
| CPU time | 17.82 seconds |
| Started | Oct 15 01:04:46 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163300673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.1163300673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.930170233 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 8383005471 ps |
| CPU time | 11.96 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:05:00 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930170233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_suspend.930170233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3271579063 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 3794121953 ps |
| CPU time | 26.26 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 236060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271579063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3271579063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.1777548106 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 1802943531 ps |
| CPU time | 17.06 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 229556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777548106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.1777548106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.3904220397 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 239118487 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904220397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.3904220397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.4179849082 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 225392961 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179849082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.4179849082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.701868631 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 3824136590 ps |
| CPU time | 99.78 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:06:29 AM UTC 24 |
| Peak memory | 229364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701868631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.701868631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.3400027836 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 150381450 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400027836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.3400027836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.3752294038 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 157013568 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:04:47 AM UTC 24 |
| Finished | Oct 15 01:04:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752294038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.3752294038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.3420717359 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 233448452 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420717359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.3420717359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.1363524401 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 190053128 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363524401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.1363524401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.1074212530 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 164989070 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:51 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074212530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.1074212530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2297850476 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 194097098 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297850476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2297850476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.456071523 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 191733160 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456071523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pending_in_trans.456071523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.67977867 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 217774136 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=67977867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.67977867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.760053490 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 149977165 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:52 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760053490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.760053490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.728303662 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 32813917 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:04:49 AM UTC 24 |
| Finished | Oct 15 01:04:51 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728303662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.728303662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.187068239 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 7075318477 ps |
| CPU time | 20.77 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187068239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_pkt_buffer.187068239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.2548101058 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 219079203 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:54 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548101058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.2548101058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.1107498828 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 212316668 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:54 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107498828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.1107498828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.660080414 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 156510929 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:53 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660080414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_random_length_in_transaction.660080414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1798704478 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 172811707 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798704478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1798704478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.490224020 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 175053452 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:53 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490224020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_rx_crc_err.490224020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.673173612 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 250062719 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:54 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673173612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_rx_full.673173612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2754922696 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 154823024 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:04:51 AM UTC 24 |
| Finished | Oct 15 01:04:54 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754922696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2754922696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.1951414107 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 217370887 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:04:55 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951414107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.1951414107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.3887307464 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 201258354 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887307464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.3887307464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.3125904243 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 2550382272 ps |
| CPU time | 18.46 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125904243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.3125904243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.1238220694 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 207973928 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238220694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.1238220694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.3782764140 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 201319705 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:04:56 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782764140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.3782764140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.1403507191 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 1074355972 ps |
| CPU time | 3.12 seconds |
| Started | Oct 15 01:04:54 AM UTC 24 |
| Finished | Oct 15 01:04:58 AM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403507191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.1403507191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.2776286066 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 2000873424 ps |
| CPU time | 15.02 seconds |
| Started | Oct 15 01:04:53 AM UTC 24 |
| Finished | Oct 15 01:05:10 AM UTC 24 |
| Peak memory | 235836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776286066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.2776286066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.2874765789 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 1407505537 ps |
| CPU time | 31.69 seconds |
| Started | Oct 15 01:04:44 AM UTC 24 |
| Finished | Oct 15 01:05:17 AM UTC 24 |
| Peak memory | 219128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874765789 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.2874765789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.1722087787 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 625909815 ps |
| CPU time | 2.55 seconds |
| Started | Oct 15 01:04:54 AM UTC 24 |
| Finished | Oct 15 01:04:57 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1722087787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.1722087787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.3546380996 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 579403929 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3546380996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.3546380996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.2611637487 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 530163166 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:08:33 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2611637487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.2611637487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.260783981 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 424625989 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:08:39 AM UTC 24 |
| Finished | Oct 15 01:08:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=260783981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_t x_rx_disruption.260783981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.1268383330 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 500745549 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:08:43 AM UTC 24 |
| Finished | Oct 15 01:08:55 AM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1268383330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.1268383330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.572705490 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 460226849 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:08:43 AM UTC 24 |
| Finished | Oct 15 01:08:48 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=572705490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_t x_rx_disruption.572705490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.3341443809 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 601067399 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:43 AM UTC 24 |
| Finished | Oct 15 01:08:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3341443809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.3341443809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.4229404331 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 443055879 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:49 AM UTC 24 |
| Finished | Oct 15 01:08:52 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4229404331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.4229404331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2058987676 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 573124975 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:08:49 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2058987676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2058987676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.809599176 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 477592365 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 01:08:49 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809599176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_t x_rx_disruption.809599176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.4145585420 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 485796989 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:08:49 AM UTC 24 |
| Finished | Oct 15 01:08:53 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4145585420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.4145585420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3831859844 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 75872140 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:11 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831859844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3831859844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.3727764181 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 10632073861 ps |
| CPU time | 19.72 seconds |
| Started | Oct 15 01:04:54 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 219164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727764181 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.3727764181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.604577552 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 16419606634 ps |
| CPU time | 24.17 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=604577552 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.604577552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.480881817 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 25592491999 ps |
| CPU time | 36.89 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480881817 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.480881817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.3506524215 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 178620809 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:04:57 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506524215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.3506524215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.2583651114 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 155086921 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:04:57 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583651114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.2583651114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.2493424798 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 394370318 ps |
| CPU time | 2.24 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:04:58 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493424798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.2493424798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.2473043205 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 1192653379 ps |
| CPU time | 4.99 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473043205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.2473043205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.3269052351 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 21308081229 ps |
| CPU time | 38.69 seconds |
| Started | Oct 15 01:04:55 AM UTC 24 |
| Finished | Oct 15 01:05:35 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269052351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3269052351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.2576575623 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 2892751299 ps |
| CPU time | 17.58 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 219280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576575623 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.2576575623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.2770334401 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 1216845891 ps |
| CPU time | 5.32 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:03 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770334401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.2770334401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.540223450 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 194998454 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:04:59 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540223450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_disconnected.540223450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_enable.597719181 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 60676682 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:04:59 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597719181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.597719181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.1653946409 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 957438690 ps |
| CPU time | 2.84 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653946409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.1653946409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.977635640 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 431720523 ps |
| CPU time | 2.32 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:00 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=977635640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.977635640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.900070531 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 304278590 ps |
| CPU time | 1.97 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:00 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900070531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_fifo_levels.900070531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.3398360053 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 371828872 ps |
| CPU time | 2.94 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398360053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.3398360053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.1859221182 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 244355696 ps |
| CPU time | 2.05 seconds |
| Started | Oct 15 01:04:58 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859221182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.1859221182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3688168062 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 153896657 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:04:59 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688168062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3688168062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.86143575 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 229052581 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:04:59 AM UTC 24 |
| Finished | Oct 15 01:05:01 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86143575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_in_trans.86143575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3834297443 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 4445089528 ps |
| CPU time | 115.54 seconds |
| Started | Oct 15 01:04:58 AM UTC 24 |
| Finished | Oct 15 01:06:56 AM UTC 24 |
| Peak memory | 231508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834297443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3834297443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.1426025 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 12059403757 ps |
| CPU time | 81.72 seconds |
| Started | Oct 15 01:05:00 AM UTC 24 |
| Finished | Oct 15 01:06:24 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.1426025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1470413893 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 150473765 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:05:00 AM UTC 24 |
| Finished | Oct 15 01:05:03 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470413893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1470413893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.3941410603 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 28363897378 ps |
| CPU time | 44.6 seconds |
| Started | Oct 15 01:05:00 AM UTC 24 |
| Finished | Oct 15 01:05:46 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941410603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.3941410603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.1029833151 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 8701492082 ps |
| CPU time | 14.57 seconds |
| Started | Oct 15 01:05:00 AM UTC 24 |
| Finished | Oct 15 01:05:16 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029833151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.1029833151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.953900660 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 5068769747 ps |
| CPU time | 37.37 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:41 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953900660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.953900660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2294717619 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 2112829938 ps |
| CPU time | 14.71 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:19 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294717619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2294717619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.93066354 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 255855504 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93066354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.93066354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.3823946291 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 189047296 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823946291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.3823946291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.594128476 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 1924887050 ps |
| CPU time | 14.44 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 218960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=594128476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.594128476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.1958051267 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 186282677 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958051267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.1958051267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.1080496250 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 158925483 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080496250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1080496250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.1170604476 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 210777674 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170604476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.1170604476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.269917365 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 200071490 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:02 AM UTC 24 |
| Finished | Oct 15 01:05:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269917365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_out_iso.269917365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.3810223411 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 180465131 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:04 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810223411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.3810223411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.1746432714 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 150918202 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:05:04 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746432714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.1746432714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.825650320 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 148713358 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:05:04 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825650320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pending_in_trans.825650320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.3343468873 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 216023459 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:05:04 AM UTC 24 |
| Finished | Oct 15 01:05:06 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343468873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.3343468873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.2920419693 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 209603980 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920419693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.2920419693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.1413925588 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 38389473 ps |
| CPU time | 0.71 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:08 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413925588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1413925588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.2445129994 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 18112446114 ps |
| CPU time | 52.66 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:06:01 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445129994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.2445129994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.1213477182 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 197252980 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213477182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.1213477182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.193405909 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 189651896 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193405909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_pkt_sent.193405909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.3109537391 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 219013272 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:10 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109537391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.3109537391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2149014995 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 177287592 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149014995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.2149014995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.1421701277 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 220124043 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421701277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.1421701277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.1463956052 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 379702294 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:10 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463956052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.1463956052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.1289715802 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 159922602 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289715802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.1289715802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.4144416896 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 151893750 ps |
| CPU time | 0.89 seconds |
| Started | Oct 15 01:05:06 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144416896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.4144416896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.1752330854 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 206017463 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:05:07 AM UTC 24 |
| Finished | Oct 15 01:05:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752330854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.1752330854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.4106631788 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 2288473980 ps |
| CPU time | 21.13 seconds |
| Started | Oct 15 01:05:08 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106631788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.4106631788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.152273232 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 195319783 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:05:08 AM UTC 24 |
| Finished | Oct 15 01:05:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=152273232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.152273232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.99350958 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 141250985 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:11 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99350958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_stall_trans.99350958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1113387532 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 969346676 ps |
| CPU time | 2.95 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113387532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.1113387532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1266961169 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 2696535604 ps |
| CPU time | 68.55 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266961169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.1266961169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.2752813192 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 1342767267 ps |
| CPU time | 9.57 seconds |
| Started | Oct 15 01:04:57 AM UTC 24 |
| Finished | Oct 15 01:05:07 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752813192 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.2752813192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.4061087902 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 474681307 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:12 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4061087902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.4061087902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.722703197 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 424137702 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:08:52 AM UTC 24 |
| Finished | Oct 15 01:08:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=722703197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_t x_rx_disruption.722703197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.2563975759 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 574701668 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:08:52 AM UTC 24 |
| Finished | Oct 15 01:08:55 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2563975759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.2563975759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1076198246 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 648836051 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1076198246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.1076198246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1755136116 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 567232809 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1755136116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.1755136116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3448614634 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 661166975 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3448614634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3448614634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.3009335126 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 503040512 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3009335126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.3009335126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.3757625086 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 585963768 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3757625086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.3757625086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.2545335336 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 498125394 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2545335336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.2545335336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.1135271210 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 433214466 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:57 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1135271210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.1135271210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.1982131434 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 551885181 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1982131434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.1982131434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.2394500127 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 37182788 ps |
| CPU time | 0.95 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:23 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394500127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2394500127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.1855275477 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 3854194818 ps |
| CPU time | 5.63 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:16 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855275477 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.1855275477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.2679957251 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 20069814476 ps |
| CPU time | 28.04 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:38 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679957251 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.2679957251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.4105228556 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 25538523922 ps |
| CPU time | 37.58 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105228556 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.4105228556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1198045127 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 216572256 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:05:09 AM UTC 24 |
| Finished | Oct 15 01:05:11 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198045127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1198045127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2513918733 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 195009281 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:10 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513918733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.2513918733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.3141776552 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 193491922 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141776552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.3141776552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.1742282477 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 1040685506 ps |
| CPU time | 3.43 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742282477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.1742282477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.501474763 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 19660949250 ps |
| CPU time | 35.67 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 219296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501474763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_device_address.501474763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.3961199872 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 1966482822 ps |
| CPU time | 43.62 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:56 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961199872 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.3961199872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3971609302 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 450085005 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971609302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3971609302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.3891364964 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 158504049 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891364964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.3891364964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_enable.1568685322 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 50678587 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568685322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.1568685322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.1553791429 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 1103465568 ps |
| CPU time | 4.19 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:16 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553791429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.1553791429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.3509826746 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 247911370 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509826746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.3509826746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.302177229 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 496330025 ps |
| CPU time | 3.15 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302177229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_fifo_rst.302177229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.654811419 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 176880659 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:05:12 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=654811419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.654811419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.1701202435 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 146825064 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:05:12 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701202435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.1701202435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.1628169819 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 260691565 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:05:13 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628169819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.1628169819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.1634530418 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 4800948063 ps |
| CPU time | 46.1 seconds |
| Started | Oct 15 01:05:12 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 229344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634530418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1634530418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.400540309 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 10465087131 ps |
| CPU time | 73.4 seconds |
| Started | Oct 15 01:05:13 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400540309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.400540309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.1416534166 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 229651421 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:05:13 AM UTC 24 |
| Finished | Oct 15 01:05:15 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1416534166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.1416534166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.1186231705 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 26475074803 ps |
| CPU time | 43.41 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:59 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186231705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.1186231705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.56203512 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 9893699657 ps |
| CPU time | 14.74 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:30 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56203512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_suspend.56203512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.3805551244 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 4652973064 ps |
| CPU time | 49.89 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:06:06 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805551244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.3805551244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3692198574 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 1598931783 ps |
| CPU time | 15.07 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:30 AM UTC 24 |
| Peak memory | 229412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692198574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3692198574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.112626083 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 236780809 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:17 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=112626083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.112626083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2339387946 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 197162235 ps |
| CPU time | 0.96 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:16 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339387946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2339387946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.814855129 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 2523710433 ps |
| CPU time | 68.75 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:06:25 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=814855129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.814855129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.151386663 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 152076324 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:17 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151386663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.151386663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2573273816 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 187691686 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:14 AM UTC 24 |
| Finished | Oct 15 01:05:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573273816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.2573273816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.4106288291 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 219991854 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:05:15 AM UTC 24 |
| Finished | Oct 15 01:05:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106288291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.4106288291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.4279252183 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 190375915 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:19 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279252183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.4279252183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.1711824232 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 168372741 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711824232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.1711824232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.198487640 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 195015177 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198487640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_out_trans_nak.198487640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.2607884586 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 174269144 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607884586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.2607884586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.3814053402 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 224252755 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:19 AM UTC 24 |
| Peak memory | 216552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814053402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.3814053402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.52421592 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 145070344 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52421592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.52421592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.2978118450 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 85640332 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978118450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.2978118450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.2703666193 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 17243699988 ps |
| CPU time | 45.53 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:06:03 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703666193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.2703666193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.1359458325 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 186632028 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:05:16 AM UTC 24 |
| Finished | Oct 15 01:05:19 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359458325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.1359458325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3699270071 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 193266164 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699270071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3699270071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.4155693373 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 242860529 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155693373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.4155693373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.628416809 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 145412492 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=628416809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.628416809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.35501029 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 142862058 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:20 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35501029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_rx_crc_err.35501029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.2875821323 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 247867592 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:21 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875821323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.2875821323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1050724581 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 172843237 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:21 AM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050724581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1050724581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2729694741 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 173370715 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:21 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729694741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.2729694741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.256106566 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 191053213 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:05:21 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256106566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.256106566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.75482010 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 2540539789 ps |
| CPU time | 66.8 seconds |
| Started | Oct 15 01:05:18 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75482010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.75482010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.459207249 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 164073715 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459207249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.459207249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.2492474488 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 193686594 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492474488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.2492474488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.2475628959 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 1083660091 ps |
| CPU time | 2.91 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:24 AM UTC 24 |
| Peak memory | 219108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475628959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.2475628959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.3844615597 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 2621320730 ps |
| CPU time | 26.27 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 235816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844615597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.3844615597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.3758766239 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 1534521898 ps |
| CPU time | 14.53 seconds |
| Started | Oct 15 01:05:11 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758766239 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.3758766239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.2575034788 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 626682082 ps |
| CPU time | 1.94 seconds |
| Started | Oct 15 01:05:20 AM UTC 24 |
| Finished | Oct 15 01:05:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2575034788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.2575034788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.416271378 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 493427878 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=416271378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_t x_rx_disruption.416271378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.4005724388 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 475369042 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4005724388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.4005724388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.364578163 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 529855208 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=364578163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_t x_rx_disruption.364578163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.1465822633 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 572177181 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1465822633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.1465822633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3888734349 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 502257927 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:08:55 AM UTC 24 |
| Finished | Oct 15 01:08:58 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3888734349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.3888734349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.1377447486 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 54217564 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:05:33 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377447486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1377447486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3664431871 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 7236131138 ps |
| CPU time | 11.15 seconds |
| Started | Oct 15 01:05:21 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664431871 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3664431871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.1868911055 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 14021764308 ps |
| CPU time | 19.59 seconds |
| Started | Oct 15 01:05:21 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868911055 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.1868911055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.3293668012 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 30096261349 ps |
| CPU time | 43.26 seconds |
| Started | Oct 15 01:05:21 AM UTC 24 |
| Finished | Oct 15 01:06:06 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293668012 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.3293668012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.1126412393 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 152796513 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:05:21 AM UTC 24 |
| Finished | Oct 15 01:05:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126412393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.1126412393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.2566950495 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 162154030 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:05:21 AM UTC 24 |
| Finished | Oct 15 01:05:23 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566950495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.2566950495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.2098809448 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 252554706 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098809448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.2098809448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.3454543274 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 490521472 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454543274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.3454543274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.33278115 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 16409880759 ps |
| CPU time | 32.99 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:57 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33278115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_device_address.33278115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.2540125180 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 750021238 ps |
| CPU time | 15.14 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540125180 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2540125180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.3003005174 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 922916748 ps |
| CPU time | 2.43 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:26 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003005174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.3003005174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.2491800403 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 147356580 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491800403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.2491800403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_enable.2833140435 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 32084851 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833140435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.2833140435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.1356598395 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 1027257638 ps |
| CPU time | 3.58 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:28 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356598395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.1356598395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.4100349966 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 379999416 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:05:23 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100349966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.4100349966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.1930203750 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 178887209 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:05:23 AM UTC 24 |
| Finished | Oct 15 01:05:25 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930203750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.1930203750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.1246620550 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 575472340 ps |
| CPU time | 3.86 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:05:29 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246620550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.1246620550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.2331310973 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 175240880 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331310973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.2331310973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1820644468 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 146194281 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1820644468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.1820644468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.420274989 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 302003744 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=420274989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.420274989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.404663132 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 3908644738 ps |
| CPU time | 97.49 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:07:04 AM UTC 24 |
| Peak memory | 229560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=404663132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.404663132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1478260393 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 9180766872 ps |
| CPU time | 101.18 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:07:08 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478260393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1478260393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.4171380204 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 178915173 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:24 AM UTC 24 |
| Finished | Oct 15 01:05:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171380204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.4171380204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.769075708 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 28450227860 ps |
| CPU time | 57.74 seconds |
| Started | Oct 15 01:05:25 AM UTC 24 |
| Finished | Oct 15 01:06:24 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=769075708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_resume.769075708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.990421388 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 3253392021 ps |
| CPU time | 6.24 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990421388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_suspend.990421388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1520355564 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 2697042913 ps |
| CPU time | 67.72 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:06:36 AM UTC 24 |
| Peak memory | 231440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520355564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1520355564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1742694459 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 2562612493 ps |
| CPU time | 67.11 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:06:35 AM UTC 24 |
| Peak memory | 229620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742694459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1742694459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.2343376053 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 283765466 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:05:29 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343376053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.2343376053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.1316452262 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 225946710 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:05:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316452262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.1316452262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.4031169976 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 2375189472 ps |
| CPU time | 59.58 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031169976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.4031169976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.1200377564 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 161799236 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:05:26 AM UTC 24 |
| Finished | Oct 15 01:05:29 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200377564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.1200377564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.1128755679 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 146555533 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:05:27 AM UTC 24 |
| Finished | Oct 15 01:05:29 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128755679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.1128755679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.3965600238 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 167133436 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965600238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.3965600238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.3775704335 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 209043887 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:30 AM UTC 24 |
| Peak memory | 216656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775704335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.3775704335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.1537762064 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 169432040 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537762064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.1537762064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.1554485666 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 172409864 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554485666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.1554485666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.3932445172 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 173076833 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932445172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.3932445172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.1884850924 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 220204819 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:31 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884850924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.1884850924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.3343305987 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 155078857 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:28 AM UTC 24 |
| Finished | Oct 15 01:05:30 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343305987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.3343305987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.2383937333 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 68218635 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383937333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.2383937333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2589047230 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 12682572593 ps |
| CPU time | 35.22 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:06:07 AM UTC 24 |
| Peak memory | 235944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589047230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.2589047230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.4047931698 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 188411899 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:32 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047931698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.4047931698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.295281935 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 242444040 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=295281935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_pkt_sent.295281935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2005798164 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 216778224 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005798164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.2005798164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.1444388910 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 194848189 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444388910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.1444388910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.2219835726 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 168598864 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219835726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.2219835726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.2410480825 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 240924751 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410480825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.2410480825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1785122419 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 153035723 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:05:30 AM UTC 24 |
| Finished | Oct 15 01:05:33 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785122419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1785122419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.746635827 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 156055211 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746635827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 47.usbdev_setup_trans_ignored.746635827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.2502471182 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 189685814 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502471182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2502471182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.2248031699 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 2148319037 ps |
| CPU time | 20.74 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:54 AM UTC 24 |
| Peak memory | 235896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248031699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.2248031699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.1539513813 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 184973725 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:35 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539513813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.1539513813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.3109365278 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 202734710 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:34 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109365278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.3109365278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.1333778435 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 382957793 ps |
| CPU time | 2.27 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:05:36 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333778435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.1333778435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.4008966264 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 3954616307 ps |
| CPU time | 37.36 seconds |
| Started | Oct 15 01:05:32 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008966264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.4008966264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.3488834892 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 3663957320 ps |
| CPU time | 21.02 seconds |
| Started | Oct 15 01:05:22 AM UTC 24 |
| Finished | Oct 15 01:05:45 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488834892 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.3488834892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.2270338043 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 594740439 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:05:33 AM UTC 24 |
| Finished | Oct 15 01:05:35 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2270338043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.2270338043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.1536153500 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 104808285 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:05:51 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536153500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.1536153500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.531320142 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 9065968016 ps |
| CPU time | 15.21 seconds |
| Started | Oct 15 01:05:33 AM UTC 24 |
| Finished | Oct 15 01:05:49 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=531320142 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.531320142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.4031260246 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 18765405912 ps |
| CPU time | 28 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:06:03 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031260246 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.4031260246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2393380171 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 31468022667 ps |
| CPU time | 47.63 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393380171 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.2393380171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.2512528394 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 192761289 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:05:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512528394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.2512528394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.2464247047 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 183741675 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:05:36 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464247047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.2464247047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.3178588732 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 409163186 ps |
| CPU time | 2.14 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:05:37 AM UTC 24 |
| Peak memory | 219148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178588732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.3178588732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.1247851168 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 1241277321 ps |
| CPU time | 3.91 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 219160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247851168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.1247851168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.2049951081 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 43839339702 ps |
| CPU time | 79.72 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:06:56 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049951081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.2049951081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3558546570 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 3896441388 ps |
| CPU time | 32.18 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:06:08 AM UTC 24 |
| Peak memory | 219080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558546570 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3558546570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.827666070 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 538436206 ps |
| CPU time | 2.91 seconds |
| Started | Oct 15 01:05:35 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=827666070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.827666070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.117538593 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 135693518 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:38 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117538593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.117538593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_enable.293378863 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 36633908 ps |
| CPU time | 0.99 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293378863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.293378863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.208958542 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 836060671 ps |
| CPU time | 3.66 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:41 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208958542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.208958542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.622916243 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 254864148 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=622916243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_fifo_levels.622916243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.4117805357 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 248846352 ps |
| CPU time | 1.93 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117805357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.4117805357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3775970531 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 164409155 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775970531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3775970531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3839167843 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 187666033 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:05:37 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839167843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.3839167843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.2685624231 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 164438304 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:05:37 AM UTC 24 |
| Finished | Oct 15 01:05:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685624231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.2685624231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.552218212 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 4374165823 ps |
| CPU time | 31.35 seconds |
| Started | Oct 15 01:05:36 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 236040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552218212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.552218212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3143287541 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 8106907784 ps |
| CPU time | 84.82 seconds |
| Started | Oct 15 01:05:38 AM UTC 24 |
| Finished | Oct 15 01:07:12 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143287541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3143287541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.4221181976 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 180328299 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:05:38 AM UTC 24 |
| Finished | Oct 15 01:05:46 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221181976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.4221181976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.167114597 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 31527441858 ps |
| CPU time | 55.06 seconds |
| Started | Oct 15 01:05:38 AM UTC 24 |
| Finished | Oct 15 01:06:41 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167114597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_resume.167114597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.695828364 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 10605777199 ps |
| CPU time | 17.51 seconds |
| Started | Oct 15 01:05:38 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 219224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695828364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_suspend.695828364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.2400521307 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 4311872869 ps |
| CPU time | 42.52 seconds |
| Started | Oct 15 01:05:38 AM UTC 24 |
| Finished | Oct 15 01:06:29 AM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400521307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.2400521307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2659653127 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 2287440202 ps |
| CPU time | 61.43 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:06:43 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659653127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.2659653127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.3528633735 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 242192171 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528633735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.3528633735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.3673920756 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 206336995 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673920756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.3673920756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.554822562 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 3438174298 ps |
| CPU time | 31.5 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554822562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.554822562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.3343588601 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 177113661 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343588601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.3343588601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.1395713331 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 150801407 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395713331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.1395713331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.2575824607 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 186513317 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575824607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.2575824607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.3910528342 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 184987321 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910528342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.3910528342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3950446059 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 208116552 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950446059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.3950446059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3940300156 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 227819305 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:43 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940300156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.3940300156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1878935514 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 148606372 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:05:40 AM UTC 24 |
| Finished | Oct 15 01:05:42 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878935514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.1878935514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2640650135 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 235029652 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:05:41 AM UTC 24 |
| Finished | Oct 15 01:05:47 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640650135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2640650135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.1679876045 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 154245274 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:05:41 AM UTC 24 |
| Finished | Oct 15 01:05:47 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679876045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.1679876045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.1770342210 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 41115227 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770342210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.1770342210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.4107364084 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 12503694934 ps |
| CPU time | 38.33 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:06:26 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107364084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.4107364084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.35255193 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 172836503 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35255193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_received.35255193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.1945060678 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 222991108 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945060678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.1945060678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.3557967974 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 227111409 ps |
| CPU time | 1.12 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557967974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.3557967974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2287496149 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 182854475 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287496149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2287496149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.2479297862 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 166696807 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:49 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479297862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.2479297862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.2224572120 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 423788669 ps |
| CPU time | 2.4 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:50 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224572120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.2224572120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.824935691 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 148067514 ps |
| CPU time | 0.92 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824935691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_setup_stage.824935691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.4022521546 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 158217861 ps |
| CPU time | 1.17 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:46 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022521546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.4022521546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.3258032649 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 243516090 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:05:43 AM UTC 24 |
| Finished | Oct 15 01:05:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258032649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.3258032649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3081431521 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 2302119570 ps |
| CPU time | 21.43 seconds |
| Started | Oct 15 01:05:45 AM UTC 24 |
| Finished | Oct 15 01:06:07 AM UTC 24 |
| Peak memory | 236128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081431521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3081431521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1948432071 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 154633238 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:05:45 AM UTC 24 |
| Finished | Oct 15 01:05:47 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948432071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1948432071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.1305686467 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 164607009 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:05:46 AM UTC 24 |
| Finished | Oct 15 01:05:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305686467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.1305686467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.2719416543 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 262517175 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:47 AM UTC 24 |
| Finished | Oct 15 01:05:49 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719416543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.2719416543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.3984274205 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 3258460270 ps |
| CPU time | 29.36 seconds |
| Started | Oct 15 01:05:47 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 236028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984274205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.3984274205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.4195112228 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 1024511755 ps |
| CPU time | 22.84 seconds |
| Started | Oct 15 01:05:34 AM UTC 24 |
| Finished | Oct 15 01:05:59 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195112228 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.4195112228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3234877772 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 572732129 ps |
| CPU time | 2.01 seconds |
| Started | Oct 15 01:05:47 AM UTC 24 |
| Finished | Oct 15 01:05:50 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3234877772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3234877772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.2281925474 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 503193887 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2281925474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.2281925474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.1379876661 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 467856323 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1379876661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.1379876661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2928843867 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 640323253 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2928843867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.2928843867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.1452904928 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 567376030 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1452904928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.1452904928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.673317207 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 640426334 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=673317207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.673317207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.2201163043 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 442783339 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:25 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2201163043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.2201163043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3652357112 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 623829856 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3652357112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.3652357112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.3575182960 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 526947739 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3575182960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.3575182960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.2000641490 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 36900626 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:08 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000641490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.2000641490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3600857120 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 4810625600 ps |
| CPU time | 10.9 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:06:01 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600857120 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.3600857120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.942812691 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 18596386731 ps |
| CPU time | 25.79 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:06:16 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=942812691 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.942812691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.1810694463 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 26118897278 ps |
| CPU time | 37.75 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810694463 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.1810694463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.446125274 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 156661756 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:05:51 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446125274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.446125274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.811749552 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 160100936 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:05:51 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811749552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_bitstuff_err.811749552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.911413892 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 484700521 ps |
| CPU time | 2.5 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:05:53 AM UTC 24 |
| Peak memory | 219072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911413892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_data_toggle_clear.911413892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.150400570 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 507058926 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:05:52 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=150400570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.150400570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.1964765346 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 25511575963 ps |
| CPU time | 45.38 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:06:36 AM UTC 24 |
| Peak memory | 219068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964765346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.1964765346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.3726769992 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 2881061824 ps |
| CPU time | 18.3 seconds |
| Started | Oct 15 01:05:49 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 219144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726769992 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.3726769992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3736326662 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 1359912759 ps |
| CPU time | 3.29 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:55 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736326662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.3736326662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.3977893282 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 137333879 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:53 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977893282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.3977893282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_enable.853753658 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 42215871 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:53 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=853753658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_enable.853753658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3398065473 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 900884511 ps |
| CPU time | 3.74 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:56 AM UTC 24 |
| Peak memory | 219024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398065473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3398065473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.61472325 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 340813621 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:54 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61472325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.61472325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.862199370 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 205165363 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:53 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862199370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_fifo_levels.862199370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.3105589595 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 267464282 ps |
| CPU time | 1.91 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:05:54 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105589595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.3105589595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.4277939596 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 237279729 ps |
| CPU time | 2 seconds |
| Started | Oct 15 01:05:53 AM UTC 24 |
| Finished | Oct 15 01:05:56 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277939596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.4277939596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.4013191638 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 174908410 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:05:53 AM UTC 24 |
| Finished | Oct 15 01:05:55 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013191638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.4013191638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.1392540869 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 257224955 ps |
| CPU time | 1.69 seconds |
| Started | Oct 15 01:05:53 AM UTC 24 |
| Finished | Oct 15 01:05:55 AM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392540869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.1392540869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.1640157948 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 5762188955 ps |
| CPU time | 54.81 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:06:48 AM UTC 24 |
| Peak memory | 235992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640157948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.1640157948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.3029231889 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 3926515549 ps |
| CPU time | 47.4 seconds |
| Started | Oct 15 01:05:53 AM UTC 24 |
| Finished | Oct 15 01:06:42 AM UTC 24 |
| Peak memory | 219296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029231889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.3029231889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2750379951 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 286160030 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:05:54 AM UTC 24 |
| Finished | Oct 15 01:05:57 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750379951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2750379951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.2089610716 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 6546960540 ps |
| CPU time | 12.04 seconds |
| Started | Oct 15 01:05:54 AM UTC 24 |
| Finished | Oct 15 01:06:07 AM UTC 24 |
| Peak memory | 229260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089610716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.2089610716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2613151176 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 11233609612 ps |
| CPU time | 17.1 seconds |
| Started | Oct 15 01:05:54 AM UTC 24 |
| Finished | Oct 15 01:06:12 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613151176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2613151176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.4211613019 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 4269084407 ps |
| CPU time | 113.57 seconds |
| Started | Oct 15 01:05:54 AM UTC 24 |
| Finished | Oct 15 01:07:50 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211613019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.4211613019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.166796779 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 2974070434 ps |
| CPU time | 75.85 seconds |
| Started | Oct 15 01:05:56 AM UTC 24 |
| Finished | Oct 15 01:07:13 AM UTC 24 |
| Peak memory | 229348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=166796779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.166796779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.1883586827 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 255905386 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:05:56 AM UTC 24 |
| Finished | Oct 15 01:05:58 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883586827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1883586827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.3946477360 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 200432956 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:05:56 AM UTC 24 |
| Finished | Oct 15 01:05:58 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946477360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.3946477360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.3573885002 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 4350870928 ps |
| CPU time | 40.85 seconds |
| Started | Oct 15 01:05:56 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573885002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.3573885002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.399752338 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 154960338 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:05:57 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=399752338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.399752338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2335089780 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 164012969 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 01:05:57 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335089780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2335089780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.1127653434 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 201073290 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:05:57 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127653434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.1127653434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2442520982 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 198926357 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:05:57 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442520982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2442520982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.3236341216 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 164518689 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:05:57 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236341216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.3236341216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3643826271 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 191715757 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 01:05:58 AM UTC 24 |
| Finished | Oct 15 01:06:00 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643826271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3643826271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2949340629 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 150149734 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 01:05:59 AM UTC 24 |
| Finished | Oct 15 01:06:01 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949340629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2949340629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.4165859582 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 249510617 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 01:05:59 AM UTC 24 |
| Finished | Oct 15 01:06:02 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165859582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.4165859582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.2935118726 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 153609553 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:05:59 AM UTC 24 |
| Finished | Oct 15 01:06:01 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935118726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.2935118726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.2458848098 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 33294445 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 01:06:01 AM UTC 24 |
| Finished | Oct 15 01:06:03 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458848098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.2458848098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1538862324 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 20803421188 ps |
| CPU time | 52.59 seconds |
| Started | Oct 15 01:06:01 AM UTC 24 |
| Finished | Oct 15 01:06:55 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538862324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1538862324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.1989617194 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 159115730 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:01 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989617194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.1989617194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.2116379529 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 198620784 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:06:01 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116379529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.2116379529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3851474366 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 256346086 ps |
| CPU time | 1.76 seconds |
| Started | Oct 15 01:06:01 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851474366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3851474366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1863565505 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 188961973 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863565505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.1863565505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.4270952016 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 167182936 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270952016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.4270952016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.1484922350 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 366745554 ps |
| CPU time | 2.1 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:05 AM UTC 24 |
| Peak memory | 219204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484922350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.1484922350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1405131848 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 147968465 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405131848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1405131848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2769314598 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 182727545 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769314598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2769314598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.2554047698 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 213738236 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:06:02 AM UTC 24 |
| Finished | Oct 15 01:06:04 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554047698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.2554047698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1634643345 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 2509262458 ps |
| CPU time | 63.5 seconds |
| Started | Oct 15 01:06:04 AM UTC 24 |
| Finished | Oct 15 01:07:09 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634643345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.1634643345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.2185053396 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 159061930 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:06:04 AM UTC 24 |
| Finished | Oct 15 01:06:06 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185053396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.2185053396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.3198285828 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 180218046 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:06:04 AM UTC 24 |
| Finished | Oct 15 01:06:06 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198285828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.3198285828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.1572564709 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 519055234 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:06:04 AM UTC 24 |
| Finished | Oct 15 01:06:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572564709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.1572564709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.1334964494 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 3810555981 ps |
| CPU time | 94.31 seconds |
| Started | Oct 15 01:06:04 AM UTC 24 |
| Finished | Oct 15 01:07:40 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334964494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.1334964494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.2903228404 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 1446499471 ps |
| CPU time | 30.99 seconds |
| Started | Oct 15 01:05:51 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903228404 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.2903228404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.229716729 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 639883951 ps |
| CPU time | 2.72 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:10 AM UTC 24 |
| Peak memory | 218696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=229716729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_tx _rx_disruption.229716729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.3222089206 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 633569495 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3222089206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.3222089206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.3298813179 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 600952941 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3298813179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.3298813179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.139540976 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 523421663 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=139540976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_t x_rx_disruption.139540976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3226479614 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 640911802 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3226479614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3226479614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.1360132828 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 663992736 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1360132828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.1360132828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.3064468392 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 606651002 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:08:56 AM UTC 24 |
| Finished | Oct 15 01:09:26 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3064468392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.3064468392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.684398891 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 507399848 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=684398891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_t x_rx_disruption.684398891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.3450756697 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 456802755 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3450756697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.3450756697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.4284973938 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 605976257 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:17 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4284973938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.4284973938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.2477956601 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 641056394 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 01:08:58 AM UTC 24 |
| Finished | Oct 15 01:09:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2477956601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.2477956601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.4216857564 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 41890381 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:53:42 AM UTC 24 |
| Finished | Oct 15 12:53:44 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216857564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.4216857564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1787311501 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 14782025291 ps |
| CPU time | 26.05 seconds |
| Started | Oct 15 12:53:08 AM UTC 24 |
| Finished | Oct 15 12:53:36 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787311501 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1787311501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.773669887 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 23626723870 ps |
| CPU time | 29.71 seconds |
| Started | Oct 15 12:53:08 AM UTC 24 |
| Finished | Oct 15 12:53:39 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=773669887 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.773669887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.2199023926 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 155592405 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 12:53:09 AM UTC 24 |
| Finished | Oct 15 12:53:12 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199023926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.2199023926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.29845320 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 150880187 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:53:11 AM UTC 24 |
| Finished | Oct 15 12:53:13 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29845320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_bitstuff_err.29845320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.1662046390 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 233307619 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 12:53:11 AM UTC 24 |
| Finished | Oct 15 12:53:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662046390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.1662046390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.3872850121 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 713119840 ps |
| CPU time | 3.69 seconds |
| Started | Oct 15 12:53:11 AM UTC 24 |
| Finished | Oct 15 12:53:15 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872850121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.3872850121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2071722383 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 24803373871 ps |
| CPU time | 51.77 seconds |
| Started | Oct 15 12:53:12 AM UTC 24 |
| Finished | Oct 15 12:54:06 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071722383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2071722383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3728505989 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 1000659662 ps |
| CPU time | 22.73 seconds |
| Started | Oct 15 12:53:12 AM UTC 24 |
| Finished | Oct 15 12:53:36 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728505989 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3728505989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.3608038772 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 687168367 ps |
| CPU time | 2.99 seconds |
| Started | Oct 15 12:53:13 AM UTC 24 |
| Finished | Oct 15 12:53:17 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608038772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.3608038772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.1802328983 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 185786363 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:53:14 AM UTC 24 |
| Finished | Oct 15 12:53:16 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802328983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.1802328983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_enable.555754220 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 36093172 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 12:53:14 AM UTC 24 |
| Finished | Oct 15 12:53:16 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555754220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.555754220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.2101821112 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 938793010 ps |
| CPU time | 3.83 seconds |
| Started | Oct 15 12:53:14 AM UTC 24 |
| Finished | Oct 15 12:53:19 AM UTC 24 |
| Peak memory | 219028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101821112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.2101821112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.2015947147 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 270522794 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:53:16 AM UTC 24 |
| Finished | Oct 15 12:53:19 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015947147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.2015947147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.2898706147 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 425352710 ps |
| CPU time | 3.46 seconds |
| Started | Oct 15 12:53:16 AM UTC 24 |
| Finished | Oct 15 12:53:21 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898706147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.2898706147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.1628490040 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 194587041 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:53:18 AM UTC 24 |
| Finished | Oct 15 12:53:20 AM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628490040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.1628490040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.2331706161 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 143263665 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:53:18 AM UTC 24 |
| Finished | Oct 15 12:53:20 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331706161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.2331706161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.3452811445 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 226776871 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:53:18 AM UTC 24 |
| Finished | Oct 15 12:53:20 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452811445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.3452811445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.178757989 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 3707245132 ps |
| CPU time | 38.74 seconds |
| Started | Oct 15 12:53:16 AM UTC 24 |
| Finished | Oct 15 12:53:56 AM UTC 24 |
| Peak memory | 236036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=178757989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.178757989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.4064268452 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 9992326558 ps |
| CPU time | 74.51 seconds |
| Started | Oct 15 12:53:19 AM UTC 24 |
| Finished | Oct 15 12:54:35 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064268452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.4064268452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2473338173 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 212036508 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:53:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473338173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.2473338173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.1566757115 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 27640985313 ps |
| CPU time | 81.1 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:54:44 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566757115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.1566757115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3168234380 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 8657216814 ps |
| CPU time | 12.21 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:53:34 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168234380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3168234380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2022848665 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 5509112992 ps |
| CPU time | 55.98 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:54:18 AM UTC 24 |
| Peak memory | 236112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022848665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2022848665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.1623715292 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 2269816483 ps |
| CPU time | 27.26 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:53:50 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623715292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.1623715292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.1646629691 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 243880961 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:53:23 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646629691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.1646629691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.63016554 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 235119207 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 12:53:21 AM UTC 24 |
| Finished | Oct 15 12:53:24 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=63016554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.63016554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.3822792469 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 2872657351 ps |
| CPU time | 29.33 seconds |
| Started | Oct 15 12:53:23 AM UTC 24 |
| Finished | Oct 15 12:53:53 AM UTC 24 |
| Peak memory | 235972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822792469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.3822792469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2566019943 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 2960086526 ps |
| CPU time | 23.78 seconds |
| Started | Oct 15 12:53:23 AM UTC 24 |
| Finished | Oct 15 12:53:48 AM UTC 24 |
| Peak memory | 219112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566019943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2566019943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.3230179332 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 1896172522 ps |
| CPU time | 49.21 seconds |
| Started | Oct 15 12:53:23 AM UTC 24 |
| Finished | Oct 15 12:54:14 AM UTC 24 |
| Peak memory | 229188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230179332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.3230179332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.447256571 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 174683460 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:53:24 AM UTC 24 |
| Finished | Oct 15 12:53:26 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447256571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.447256571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.3512199385 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 138721894 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 12:53:24 AM UTC 24 |
| Finished | Oct 15 12:53:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512199385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.3512199385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.1355075796 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 213602720 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 12:53:24 AM UTC 24 |
| Finished | Oct 15 12:53:27 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355075796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.1355075796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.1824449788 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 144777164 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:53:27 AM UTC 24 |
| Finished | Oct 15 12:53:30 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824449788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.1824449788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.1487162695 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 188772765 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:53:28 AM UTC 24 |
| Finished | Oct 15 12:53:30 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487162695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.1487162695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.4068105237 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 162213354 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:53:28 AM UTC 24 |
| Finished | Oct 15 12:53:30 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068105237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.4068105237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.1941045977 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 154528003 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:53:28 AM UTC 24 |
| Finished | Oct 15 12:53:30 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941045977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.1941045977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.3814302026 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 230872972 ps |
| CPU time | 1.78 seconds |
| Started | Oct 15 12:53:31 AM UTC 24 |
| Finished | Oct 15 12:53:34 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814302026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3814302026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.615888377 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 216607958 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:53:31 AM UTC 24 |
| Finished | Oct 15 12:53:33 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615888377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.615888377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.3255643600 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 33777470 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:53:31 AM UTC 24 |
| Finished | Oct 15 12:53:33 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255643600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.3255643600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.3826995654 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 12679035250 ps |
| CPU time | 45.92 seconds |
| Started | Oct 15 12:53:31 AM UTC 24 |
| Finished | Oct 15 12:54:18 AM UTC 24 |
| Peak memory | 229400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826995654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.3826995654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.3071905610 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 149868397 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:53:33 AM UTC 24 |
| Finished | Oct 15 12:53:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071905610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.3071905610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.2262157626 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 234078811 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:53:33 AM UTC 24 |
| Finished | Oct 15 12:53:35 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262157626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.2262157626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3572457644 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 11225835159 ps |
| CPU time | 200 seconds |
| Started | Oct 15 12:53:34 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572457644 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.3572457644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.494800292 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 5591460098 ps |
| CPU time | 154.53 seconds |
| Started | Oct 15 12:53:34 AM UTC 24 |
| Finished | Oct 15 12:56:11 AM UTC 24 |
| Peak memory | 236100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494800292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.494800292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.2285027015 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 10396892209 ps |
| CPU time | 63.37 seconds |
| Started | Oct 15 12:53:34 AM UTC 24 |
| Finished | Oct 15 12:54:40 AM UTC 24 |
| Peak memory | 235848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285027015 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.2285027015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.4010046629 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 195576755 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:53:33 AM UTC 24 |
| Finished | Oct 15 12:53:35 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010046629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.4010046629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.3272147689 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 176722079 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:53:34 AM UTC 24 |
| Finished | Oct 15 12:53:37 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272147689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.3272147689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.3782771713 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 20161534543 ps |
| CPU time | 39.08 seconds |
| Started | Oct 15 12:53:36 AM UTC 24 |
| Finished | Oct 15 12:54:16 AM UTC 24 |
| Peak memory | 219016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782771713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.3782771713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2011316174 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 149571569 ps |
| CPU time | 1.36 seconds |
| Started | Oct 15 12:53:36 AM UTC 24 |
| Finished | Oct 15 12:53:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011316174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2011316174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.1669068978 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 319006905 ps |
| CPU time | 1.98 seconds |
| Started | Oct 15 12:53:36 AM UTC 24 |
| Finished | Oct 15 12:53:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669068978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.1669068978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.2558982461 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 165469768 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:53:36 AM UTC 24 |
| Finished | Oct 15 12:53:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558982461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.2558982461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.2637200591 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 160217148 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:53:37 AM UTC 24 |
| Finished | Oct 15 12:53:40 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637200591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.2637200591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.309270886 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 211519425 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:53:37 AM UTC 24 |
| Finished | Oct 15 12:53:40 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309270886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.309270886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3400181389 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 3010752596 ps |
| CPU time | 23.59 seconds |
| Started | Oct 15 12:53:37 AM UTC 24 |
| Finished | Oct 15 12:54:02 AM UTC 24 |
| Peak memory | 235932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400181389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3400181389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.407444840 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 176310644 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:53:37 AM UTC 24 |
| Finished | Oct 15 12:53:40 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407444840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.407444840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.2723154740 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 187116096 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:53:37 AM UTC 24 |
| Finished | Oct 15 12:53:40 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723154740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.2723154740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.2657165378 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 1203148228 ps |
| CPU time | 3.9 seconds |
| Started | Oct 15 12:53:39 AM UTC 24 |
| Finished | Oct 15 12:53:44 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657165378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.2657165378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.801135629 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 3021041411 ps |
| CPU time | 24.58 seconds |
| Started | Oct 15 12:53:39 AM UTC 24 |
| Finished | Oct 15 12:54:05 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801135629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_streaming_out.801135629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.462663400 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 10678116534 ps |
| CPU time | 274.33 seconds |
| Started | Oct 15 12:53:40 AM UTC 24 |
| Finished | Oct 15 12:58:18 AM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462663400 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 4/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.462663400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.4261306848 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 1949271655 ps |
| CPU time | 40.64 seconds |
| Started | Oct 15 12:53:12 AM UTC 24 |
| Finished | Oct 15 12:53:54 AM UTC 24 |
| Peak memory | 219196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261306848 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.4261306848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1075699887 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 481441134 ps |
| CPU time | 2.25 seconds |
| Started | Oct 15 12:53:41 AM UTC 24 |
| Finished | Oct 15 12:53:45 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1075699887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1075699887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.844799257 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 288408575 ps |
| CPU time | 1.99 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=844799257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.844799257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.447878992 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 264137943 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447878992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 50.usbdev_fifo_levels.447878992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2392223315 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 521493054 ps |
| CPU time | 2.49 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:10 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2392223315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.2392223315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.4011229800 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 526679882 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011229800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.4011229800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.1025135917 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 286906713 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025135917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.1025135917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1062397374 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 576957228 ps |
| CPU time | 2.54 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:10 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1062397374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1062397374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3980783794 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 289805866 ps |
| CPU time | 1.76 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980783794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3980783794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.4031776322 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 266885529 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:06:06 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031776322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.4031776322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2303457303 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 599845118 ps |
| CPU time | 2.1 seconds |
| Started | Oct 15 01:06:07 AM UTC 24 |
| Finished | Oct 15 01:06:10 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2303457303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.2303457303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.75976010 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 623157740 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 01:06:07 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75976010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.75976010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2816756294 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 269799591 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:06:07 AM UTC 24 |
| Finished | Oct 15 01:06:09 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816756294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.2816756294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3056172081 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 506913732 ps |
| CPU time | 1.81 seconds |
| Started | Oct 15 01:06:08 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3056172081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.3056172081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.3464693254 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 272924917 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:06:08 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464693254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.3464693254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.3953375735 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 230505306 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:06:08 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953375735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.3953375735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.1726965910 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 488256213 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 01:06:08 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1726965910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.1726965910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3189222424 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 223345853 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:06:08 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189222424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3189222424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.1446387410 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 242770842 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:06:09 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446387410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.1446387410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.297440920 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 480513170 ps |
| CPU time | 2.01 seconds |
| Started | Oct 15 01:06:09 AM UTC 24 |
| Finished | Oct 15 01:06:12 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=297440920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_tx _rx_disruption.297440920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3126510274 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 316064114 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:06:09 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126510274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3126510274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.602041300 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 270225782 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:06:09 AM UTC 24 |
| Finished | Oct 15 01:06:11 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602041300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 56.usbdev_fifo_levels.602041300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.91705038 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 591819447 ps |
| CPU time | 2.28 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=91705038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_ rx_disruption.91705038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.1802370581 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 456299506 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802370581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.1802370581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2466360139 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 257959399 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:12 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466360139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.2466360139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2846765181 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 584197794 ps |
| CPU time | 2.48 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:14 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2846765181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2846765181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3376315615 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 265006335 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376315615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.3376315615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.358757995 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 271505401 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358757995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 58.usbdev_fifo_levels.358757995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.297921479 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 561190057 ps |
| CPU time | 2.22 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:14 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=297921479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.297921479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.3203750770 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 476577434 ps |
| CPU time | 2.11 seconds |
| Started | Oct 15 01:06:10 AM UTC 24 |
| Finished | Oct 15 01:06:14 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203750770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.3203750770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2774952479 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 248182846 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:11 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774952479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.2774952479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1327529429 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 499584874 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 01:06:11 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1327529429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.1327529429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.2877925040 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 71973764 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:54:17 AM UTC 24 |
| Finished | Oct 15 12:54:19 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877925040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.2877925040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3706417778 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 6139472796 ps |
| CPU time | 15.52 seconds |
| Started | Oct 15 12:53:42 AM UTC 24 |
| Finished | Oct 15 12:53:58 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706417778 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3706417778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.1807229106 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 20119560441 ps |
| CPU time | 31.46 seconds |
| Started | Oct 15 12:53:42 AM UTC 24 |
| Finished | Oct 15 12:54:14 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807229106 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.1807229106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.4065257148 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 28533624302 ps |
| CPU time | 35.93 seconds |
| Started | Oct 15 12:53:43 AM UTC 24 |
| Finished | Oct 15 12:54:21 AM UTC 24 |
| Peak memory | 219216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065257148 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.4065257148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.3517434735 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 228790003 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:53:45 AM UTC 24 |
| Finished | Oct 15 12:53:48 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517434735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.3517434735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1494500218 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 146561816 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:53:45 AM UTC 24 |
| Finished | Oct 15 12:53:48 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494500218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1494500218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.1975709392 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 268582470 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:53:45 AM UTC 24 |
| Finished | Oct 15 12:53:48 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975709392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.1975709392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.509191520 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 546310244 ps |
| CPU time | 2.34 seconds |
| Started | Oct 15 12:53:45 AM UTC 24 |
| Finished | Oct 15 12:53:49 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=509191520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.509191520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.1217856803 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 20588803244 ps |
| CPU time | 37.63 seconds |
| Started | Oct 15 12:53:46 AM UTC 24 |
| Finished | Oct 15 12:54:25 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217856803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.1217856803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.2987460751 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 7016207384 ps |
| CPU time | 44.46 seconds |
| Started | Oct 15 12:53:48 AM UTC 24 |
| Finished | Oct 15 12:54:34 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987460751 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.2987460751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.479429339 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 702940208 ps |
| CPU time | 2.49 seconds |
| Started | Oct 15 12:53:48 AM UTC 24 |
| Finished | Oct 15 12:53:52 AM UTC 24 |
| Peak memory | 219076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=479429339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.479429339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.947404707 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 168427081 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:53:50 AM UTC 24 |
| Finished | Oct 15 12:53:52 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947404707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_disconnected.947404707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_enable.612533324 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 99688534 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:53:50 AM UTC 24 |
| Finished | Oct 15 12:53:52 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=612533324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.612533324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1787266193 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 842065183 ps |
| CPU time | 3.91 seconds |
| Started | Oct 15 12:53:50 AM UTC 24 |
| Finished | Oct 15 12:53:55 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787266193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1787266193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.756481927 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 734548566 ps |
| CPU time | 3.17 seconds |
| Started | Oct 15 12:53:50 AM UTC 24 |
| Finished | Oct 15 12:53:54 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=756481927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.756481927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1972720454 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 152198257 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:53:51 AM UTC 24 |
| Finished | Oct 15 12:53:54 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972720454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1972720454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.4275901297 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 411007407 ps |
| CPU time | 2.56 seconds |
| Started | Oct 15 12:53:53 AM UTC 24 |
| Finished | Oct 15 12:53:57 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275901297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.4275901297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.3211676304 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 227384608 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:53:53 AM UTC 24 |
| Finished | Oct 15 12:53:56 AM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211676304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.3211676304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.1150046909 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 154014056 ps |
| CPU time | 1.4 seconds |
| Started | Oct 15 12:53:55 AM UTC 24 |
| Finished | Oct 15 12:53:57 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150046909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.1150046909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.194434019 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 226277737 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:53:55 AM UTC 24 |
| Finished | Oct 15 12:53:57 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=194434019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_trans.194434019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.252523501 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 3212211082 ps |
| CPU time | 29.68 seconds |
| Started | Oct 15 12:53:53 AM UTC 24 |
| Finished | Oct 15 12:54:24 AM UTC 24 |
| Peak memory | 231472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252523501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.252523501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1418275259 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 11272668722 ps |
| CPU time | 76.1 seconds |
| Started | Oct 15 12:53:55 AM UTC 24 |
| Finished | Oct 15 12:55:13 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418275259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1418275259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.539806798 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 250479268 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:53:55 AM UTC 24 |
| Finished | Oct 15 12:53:57 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539806798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.539806798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.2164139202 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 11564505110 ps |
| CPU time | 17.48 seconds |
| Started | Oct 15 12:53:56 AM UTC 24 |
| Finished | Oct 15 12:54:15 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164139202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.2164139202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.2242428176 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 9997820602 ps |
| CPU time | 16.99 seconds |
| Started | Oct 15 12:53:56 AM UTC 24 |
| Finished | Oct 15 12:54:15 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242428176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.2242428176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.46987956 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 4147639893 ps |
| CPU time | 37.91 seconds |
| Started | Oct 15 12:53:56 AM UTC 24 |
| Finished | Oct 15 12:54:36 AM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=46987956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.46987956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.1967277048 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 2647252651 ps |
| CPU time | 17.98 seconds |
| Started | Oct 15 12:53:56 AM UTC 24 |
| Finished | Oct 15 12:54:16 AM UTC 24 |
| Peak memory | 219180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967277048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.1967277048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.179573721 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 248073602 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:54:02 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179573721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.179573721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.477944190 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 211630066 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:54:01 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477944190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.477944190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.208269806 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 2148737579 ps |
| CPU time | 22.01 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:54:22 AM UTC 24 |
| Peak memory | 229480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208269806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.208269806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.892501230 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 2329213347 ps |
| CPU time | 23.37 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:54:24 AM UTC 24 |
| Peak memory | 219324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892501230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.892501230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.421275982 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 3638990189 ps |
| CPU time | 97.62 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:55:39 AM UTC 24 |
| Peak memory | 229388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=421275982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.421275982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.342344267 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 150303738 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:53:59 AM UTC 24 |
| Finished | Oct 15 12:54:02 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342344267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.342344267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.3639387028 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 152198702 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:54:00 AM UTC 24 |
| Finished | Oct 15 12:54:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639387028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.3639387028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.865219534 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 184119635 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:54:00 AM UTC 24 |
| Finished | Oct 15 12:54:03 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=865219534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.865219534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.1926614168 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 205928180 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:54:02 AM UTC 24 |
| Finished | Oct 15 12:54:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926614168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.1926614168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.3014069649 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 164548097 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:54:02 AM UTC 24 |
| Finished | Oct 15 12:54:05 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014069649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.3014069649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.4197925210 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 166466448 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 12:54:02 AM UTC 24 |
| Finished | Oct 15 12:54:05 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197925210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.4197925210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.1357532311 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 158306554 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:54:04 AM UTC 24 |
| Finished | Oct 15 12:54:06 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357532311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.1357532311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.3373867900 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 244338573 ps |
| CPU time | 1.89 seconds |
| Started | Oct 15 12:54:04 AM UTC 24 |
| Finished | Oct 15 12:54:07 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373867900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.3373867900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.1843836836 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 179081745 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:54:04 AM UTC 24 |
| Finished | Oct 15 12:54:07 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843836836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.1843836836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.4018030208 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 41069642 ps |
| CPU time | 0.98 seconds |
| Started | Oct 15 12:54:05 AM UTC 24 |
| Finished | Oct 15 12:54:07 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018030208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.4018030208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.3657688711 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 7359495546 ps |
| CPU time | 20.49 seconds |
| Started | Oct 15 12:54:05 AM UTC 24 |
| Finished | Oct 15 12:54:27 AM UTC 24 |
| Peak memory | 236004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657688711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.3657688711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.3170162298 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 192581985 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:54:07 AM UTC 24 |
| Finished | Oct 15 12:54:10 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170162298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.3170162298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.3965277238 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 232212604 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:54:07 AM UTC 24 |
| Finished | Oct 15 12:54:10 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965277238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.3965277238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.799930652 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 5499382239 ps |
| CPU time | 24.42 seconds |
| Started | Oct 15 12:54:07 AM UTC 24 |
| Finished | Oct 15 12:54:33 AM UTC 24 |
| Peak memory | 235760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=799930652 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.799930652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.4294951700 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 6065159203 ps |
| CPU time | 28.57 seconds |
| Started | Oct 15 12:54:09 AM UTC 24 |
| Finished | Oct 15 12:54:39 AM UTC 24 |
| Peak memory | 231372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294951700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.4294951700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.1728190365 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 17810401667 ps |
| CPU time | 117.55 seconds |
| Started | Oct 15 12:54:09 AM UTC 24 |
| Finished | Oct 15 12:56:09 AM UTC 24 |
| Peak memory | 235784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728190365 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.1728190365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2275328382 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 228917534 ps |
| CPU time | 1.41 seconds |
| Started | Oct 15 12:54:07 AM UTC 24 |
| Finished | Oct 15 12:54:10 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275328382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.2275328382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.46369802 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 163288061 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:54:07 AM UTC 24 |
| Finished | Oct 15 12:54:10 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=46369802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.46369802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.4039012891 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 20187845295 ps |
| CPU time | 32.63 seconds |
| Started | Oct 15 12:54:09 AM UTC 24 |
| Finished | Oct 15 12:54:43 AM UTC 24 |
| Peak memory | 218984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4039012891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.4039012891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.4079529311 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 160773954 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:54:09 AM UTC 24 |
| Finished | Oct 15 12:54:11 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079529311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.4079529311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.561380995 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 357750210 ps |
| CPU time | 2.29 seconds |
| Started | Oct 15 12:54:10 AM UTC 24 |
| Finished | Oct 15 12:54:14 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561380995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_rx_full.561380995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.2139957465 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 149152377 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:54:10 AM UTC 24 |
| Finished | Oct 15 12:54:13 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139957465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.2139957465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.1933730606 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 190075853 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:54:10 AM UTC 24 |
| Finished | Oct 15 12:54:13 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933730606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.1933730606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.4291718495 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 266582652 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 12:54:11 AM UTC 24 |
| Finished | Oct 15 12:54:13 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291718495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.4291718495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3815478102 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 3208853832 ps |
| CPU time | 93.54 seconds |
| Started | Oct 15 12:54:13 AM UTC 24 |
| Finished | Oct 15 12:55:48 AM UTC 24 |
| Peak memory | 231484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815478102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3815478102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.3646300934 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 196039810 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:54:14 AM UTC 24 |
| Finished | Oct 15 12:54:17 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646300934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.3646300934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.909478161 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 188608265 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:54:14 AM UTC 24 |
| Finished | Oct 15 12:54:17 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909478161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_stall_trans.909478161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.4282101400 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 340688288 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:54:15 AM UTC 24 |
| Finished | Oct 15 12:54:18 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282101400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.4282101400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.1997791546 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 3133040053 ps |
| CPU time | 23.91 seconds |
| Started | Oct 15 12:54:14 AM UTC 24 |
| Finished | Oct 15 12:54:39 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997791546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.1997791546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.407173408 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 8774126060 ps |
| CPU time | 49.71 seconds |
| Started | Oct 15 12:54:16 AM UTC 24 |
| Finished | Oct 15 12:55:07 AM UTC 24 |
| Peak memory | 235940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407173408 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_1 4/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.407173408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.2166513443 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 6334322349 ps |
| CPU time | 41.65 seconds |
| Started | Oct 15 12:53:48 AM UTC 24 |
| Finished | Oct 15 12:54:32 AM UTC 24 |
| Peak memory | 219004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166513443 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.2166513443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.3379686612 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 655530398 ps |
| CPU time | 3.21 seconds |
| Started | Oct 15 12:54:16 AM UTC 24 |
| Finished | Oct 15 12:54:20 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3379686612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.3379686612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3939153629 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 287926527 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:06:11 AM UTC 24 |
| Finished | Oct 15 01:06:13 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939153629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.3939153629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.684419607 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 572238992 ps |
| CPU time | 1.77 seconds |
| Started | Oct 15 01:06:11 AM UTC 24 |
| Finished | Oct 15 01:06:14 AM UTC 24 |
| Peak memory | 216656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=684419607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_tx _rx_disruption.684419607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.2144235283 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 249949262 ps |
| CPU time | 1.45 seconds |
| Started | Oct 15 01:06:12 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144235283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.2144235283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.267923573 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 636002229 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 01:06:12 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=267923573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_tx _rx_disruption.267923573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.368222638 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 464433614 ps |
| CPU time | 1.95 seconds |
| Started | Oct 15 01:06:12 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368222638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.368222638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.1758129638 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 576343412 ps |
| CPU time | 1.92 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1758129638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.1758129638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3571305705 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 651917793 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 218956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571305705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.3571305705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.3101166675 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 156215105 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101166675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.3101166675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.475208434 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 663915982 ps |
| CPU time | 1.9 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=475208434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_tx _rx_disruption.475208434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.3410368399 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 540377055 ps |
| CPU time | 2.16 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410368399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.3410368399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.649838415 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 269597422 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649838415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 64.usbdev_fifo_levels.649838415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.4188950164 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 600046149 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4188950164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.4188950164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1392915436 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 397802902 ps |
| CPU time | 1.25 seconds |
| Started | Oct 15 01:06:13 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392915436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1392915436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2003051009 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 284685528 ps |
| CPU time | 1.85 seconds |
| Started | Oct 15 01:06:14 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003051009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2003051009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.591895232 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 579462661 ps |
| CPU time | 1.76 seconds |
| Started | Oct 15 01:06:14 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=591895232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx _rx_disruption.591895232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.3860143375 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 196594009 ps |
| CPU time | 1.42 seconds |
| Started | Oct 15 01:06:14 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860143375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.3860143375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2640624881 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 246074432 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 01:06:14 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640624881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2640624881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.3941180164 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 527184049 ps |
| CPU time | 2.04 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 218864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3941180164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.3941180164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3981259370 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 203037155 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:16 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981259370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.3981259370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.1533687415 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 287544644 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533687415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.1533687415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.809388370 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 510387828 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=809388370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.809388370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.730799825 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 503384548 ps |
| CPU time | 1.87 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730799825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.730799825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.761224744 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 280489518 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761224744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 68.usbdev_fifo_levels.761224744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.526896685 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 518740650 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=526896685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.526896685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.195243808 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 179182874 ps |
| CPU time | 0.86 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195243808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.195243808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3308914956 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 252222831 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:17 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308914956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.3308914956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.3281387264 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 607597494 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 01:06:15 AM UTC 24 |
| Finished | Oct 15 01:06:18 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3281387264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.3281387264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.1025025573 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 50659541 ps |
| CPU time | 1.02 seconds |
| Started | Oct 15 12:54:42 AM UTC 24 |
| Finished | Oct 15 12:54:44 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025025573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.1025025573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.4093742547 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 10112050663 ps |
| CPU time | 14.11 seconds |
| Started | Oct 15 12:54:17 AM UTC 24 |
| Finished | Oct 15 12:54:32 AM UTC 24 |
| Peak memory | 219208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093742547 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.4093742547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.1860045388 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 14254665657 ps |
| CPU time | 22.26 seconds |
| Started | Oct 15 12:54:17 AM UTC 24 |
| Finished | Oct 15 12:54:41 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860045388 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.1860045388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.3198700419 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 25743820761 ps |
| CPU time | 35.91 seconds |
| Started | Oct 15 12:54:19 AM UTC 24 |
| Finished | Oct 15 12:54:56 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198700419 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.3198700419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.879646700 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 154372201 ps |
| CPU time | 1.35 seconds |
| Started | Oct 15 12:54:19 AM UTC 24 |
| Finished | Oct 15 12:54:21 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879646700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_av_buffer.879646700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1095065350 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 146199418 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:54:20 AM UTC 24 |
| Finished | Oct 15 12:54:23 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095065350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1095065350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.2464990995 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 224649221 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:54:20 AM UTC 24 |
| Finished | Oct 15 12:54:23 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464990995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.2464990995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.3630785487 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 379919037 ps |
| CPU time | 2.18 seconds |
| Started | Oct 15 12:54:20 AM UTC 24 |
| Finished | Oct 15 12:54:24 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630785487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3630785487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3308715738 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 21716496793 ps |
| CPU time | 46.73 seconds |
| Started | Oct 15 12:54:20 AM UTC 24 |
| Finished | Oct 15 12:55:09 AM UTC 24 |
| Peak memory | 219268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308715738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3308715738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.3014072833 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 288467315 ps |
| CPU time | 5.25 seconds |
| Started | Oct 15 12:54:21 AM UTC 24 |
| Finished | Oct 15 12:54:27 AM UTC 24 |
| Peak memory | 219252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014072833 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.3014072833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.284901894 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 406517558 ps |
| CPU time | 2.52 seconds |
| Started | Oct 15 12:54:22 AM UTC 24 |
| Finished | Oct 15 12:54:25 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284901894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.284901894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.4064462177 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 138628318 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:54:22 AM UTC 24 |
| Finished | Oct 15 12:54:24 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064462177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.4064462177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_enable.3032389864 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 34048004 ps |
| CPU time | 0.91 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:54:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032389864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.3032389864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.4114315708 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 893248887 ps |
| CPU time | 2.73 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:54:28 AM UTC 24 |
| Peak memory | 219104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114315708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.4114315708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.2020680198 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 265658912 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:54:27 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020680198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.2020680198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.490290165 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 255651879 ps |
| CPU time | 1.91 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:54:27 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490290165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_fifo_levels.490290165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3561690222 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 401091850 ps |
| CPU time | 2.7 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:54:28 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561690222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3561690222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.3525542157 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 234872583 ps |
| CPU time | 2.06 seconds |
| Started | Oct 15 12:54:26 AM UTC 24 |
| Finished | Oct 15 12:54:29 AM UTC 24 |
| Peak memory | 229268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525542157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.3525542157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.2997790419 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 141465366 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 12:54:26 AM UTC 24 |
| Finished | Oct 15 12:54:28 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997790419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.2997790419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2594556628 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 252953330 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:54:26 AM UTC 24 |
| Finished | Oct 15 12:54:29 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594556628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2594556628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.1711258546 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 4814779594 ps |
| CPU time | 134.69 seconds |
| Started | Oct 15 12:54:24 AM UTC 24 |
| Finished | Oct 15 12:56:41 AM UTC 24 |
| Peak memory | 235956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711258546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1711258546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.1338759954 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 13478881191 ps |
| CPU time | 97.24 seconds |
| Started | Oct 15 12:54:26 AM UTC 24 |
| Finished | Oct 15 12:56:05 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338759954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.1338759954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1773252026 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 186804222 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:54:28 AM UTC 24 |
| Finished | Oct 15 12:54:30 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773252026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1773252026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.3793267521 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 24002638772 ps |
| CPU time | 38.78 seconds |
| Started | Oct 15 12:54:28 AM UTC 24 |
| Finished | Oct 15 12:55:08 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793267521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.3793267521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.4103342786 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 10465421810 ps |
| CPU time | 19.3 seconds |
| Started | Oct 15 12:54:28 AM UTC 24 |
| Finished | Oct 15 12:54:48 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103342786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.4103342786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.2221942834 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 4670005626 ps |
| CPU time | 133.01 seconds |
| Started | Oct 15 12:54:28 AM UTC 24 |
| Finished | Oct 15 12:56:43 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221942834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2221942834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.4184968748 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 2245703565 ps |
| CPU time | 61.54 seconds |
| Started | Oct 15 12:54:29 AM UTC 24 |
| Finished | Oct 15 12:55:33 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184968748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.4184968748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.1182141588 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 262268223 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:54:29 AM UTC 24 |
| Finished | Oct 15 12:54:32 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182141588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.1182141588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.3229257532 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 233120994 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:54:29 AM UTC 24 |
| Finished | Oct 15 12:54:32 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229257532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.3229257532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.3999312167 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 2785629618 ps |
| CPU time | 28.83 seconds |
| Started | Oct 15 12:54:30 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 235968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999312167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3999312167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.730109986 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 2762708920 ps |
| CPU time | 22.68 seconds |
| Started | Oct 15 12:54:30 AM UTC 24 |
| Finished | Oct 15 12:54:53 AM UTC 24 |
| Peak memory | 231296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730109986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.730109986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.3961738230 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 1632445806 ps |
| CPU time | 15.58 seconds |
| Started | Oct 15 12:54:31 AM UTC 24 |
| Finished | Oct 15 12:54:48 AM UTC 24 |
| Peak memory | 235840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961738230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.3961738230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.3250971366 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 165493997 ps |
| CPU time | 1.33 seconds |
| Started | Oct 15 12:54:31 AM UTC 24 |
| Finished | Oct 15 12:54:34 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250971366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.3250971366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3712217550 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 167663382 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:54:31 AM UTC 24 |
| Finished | Oct 15 12:54:34 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712217550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3712217550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.1350576632 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 277880424 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:54:32 AM UTC 24 |
| Finished | Oct 15 12:54:35 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350576632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.1350576632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.756567573 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 276388321 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:54:32 AM UTC 24 |
| Finished | Oct 15 12:54:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756567573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_out_iso.756567573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.255488063 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 187519206 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:54:32 AM UTC 24 |
| Finished | Oct 15 12:54:35 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255488063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_out_stall.255488063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2088809336 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 226472873 ps |
| CPU time | 1.6 seconds |
| Started | Oct 15 12:54:34 AM UTC 24 |
| Finished | Oct 15 12:54:37 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088809336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2088809336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.2830337874 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 153398336 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 12:54:34 AM UTC 24 |
| Finished | Oct 15 12:54:36 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830337874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.2830337874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.210227314 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 233986466 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 12:54:34 AM UTC 24 |
| Finished | Oct 15 12:54:37 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210227314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.210227314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.182507898 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 155644516 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182507898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.182507898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.2392791729 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 38710382 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392791729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.2392791729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.4227354761 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 22014008751 ps |
| CPU time | 57.15 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:55:35 AM UTC 24 |
| Peak memory | 233668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227354761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.4227354761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.3595996606 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 152187833 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595996606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.3595996606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.800649461 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 199286257 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:39 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800649461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_pkt_sent.800649461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.2069295893 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 4798556357 ps |
| CPU time | 118.08 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:56:36 AM UTC 24 |
| Peak memory | 235900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069295893 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.2069295893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.339156215 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 1907779012 ps |
| CPU time | 39.77 seconds |
| Started | Oct 15 12:54:38 AM UTC 24 |
| Finished | Oct 15 12:55:19 AM UTC 24 |
| Peak memory | 229536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=339156215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.339156215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.1109702124 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 6603976504 ps |
| CPU time | 74.72 seconds |
| Started | Oct 15 12:54:38 AM UTC 24 |
| Finished | Oct 15 12:55:54 AM UTC 24 |
| Peak memory | 235960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109702124 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.1109702124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.2465399898 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 188456034 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:39 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465399898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.2465399898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.2037526908 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 179603609 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:54:36 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037526908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.2037526908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.723198366 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 20159089086 ps |
| CPU time | 26.93 seconds |
| Started | Oct 15 12:54:38 AM UTC 24 |
| Finished | Oct 15 12:55:06 AM UTC 24 |
| Peak memory | 219012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723198366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_resume_link_active.723198366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.4059246931 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 186925486 ps |
| CPU time | 1.37 seconds |
| Started | Oct 15 12:54:38 AM UTC 24 |
| Finished | Oct 15 12:54:40 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059246931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.4059246931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.3656091916 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 326094913 ps |
| CPU time | 1.63 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656091916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.3656091916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2397448111 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 166165750 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397448111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2397448111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.2213963879 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 148175235 ps |
| CPU time | 1.31 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213963879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.2213963879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3633934537 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 256919856 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633934537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3633934537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.2520266393 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 3381619701 ps |
| CPU time | 32.31 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:55:14 AM UTC 24 |
| Peak memory | 235904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520266393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.2520266393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.3519609712 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 167810439 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519609712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.3519609712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.348182238 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 180163338 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:42 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=348182238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.348182238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.2247313835 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 446335685 ps |
| CPU time | 2.59 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:54:44 AM UTC 24 |
| Peak memory | 218900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247313835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.2247313835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.4043192882 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 3348566806 ps |
| CPU time | 24.59 seconds |
| Started | Oct 15 12:54:40 AM UTC 24 |
| Finished | Oct 15 12:55:06 AM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043192882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.4043192882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.4043603255 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 727508279 ps |
| CPU time | 14.99 seconds |
| Started | Oct 15 12:54:22 AM UTC 24 |
| Finished | Oct 15 12:54:38 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043603255 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.4043603255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1191447072 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 594337456 ps |
| CPU time | 2.81 seconds |
| Started | Oct 15 12:54:42 AM UTC 24 |
| Finished | Oct 15 12:54:45 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191447072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1191447072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.423867633 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 417962201 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:06:16 AM UTC 24 |
| Finished | Oct 15 01:06:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=423867633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.423867633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3630883282 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 314149822 ps |
| CPU time | 1.3 seconds |
| Started | Oct 15 01:06:17 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630883282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.3630883282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.604964578 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 645050675 ps |
| CPU time | 2.14 seconds |
| Started | Oct 15 01:06:17 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=604964578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.604964578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.319114516 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 458785432 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:17 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319114516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.319114516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.1804766151 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 411794220 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1804766151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.1804766151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1438851716 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 294643680 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438851716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.1438851716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2711096720 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 617053971 ps |
| CPU time | 1.86 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2711096720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.2711096720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1043676413 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 606948131 ps |
| CPU time | 1.61 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043676413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1043676413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.936114819 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 155743627 ps |
| CPU time | 0.88 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936114819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 73.usbdev_fifo_levels.936114819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.876708666 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 566043918 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=876708666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_tx _rx_disruption.876708666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.1476364510 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 777567193 ps |
| CPU time | 1.96 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:24 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476364510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.1476364510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.2942157554 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 292154963 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:06:19 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942157554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.2942157554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2135891938 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 644686831 ps |
| CPU time | 2.03 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2135891938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.2135891938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.633722751 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 463463028 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=633722751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.633722751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.3409589566 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 275984503 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409589566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.3409589566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.160162348 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 520227207 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160162348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_tx _rx_disruption.160162348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.208898663 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 287003999 ps |
| CPU time | 1.2 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208898663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 76.usbdev_fifo_levels.208898663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.3829305347 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 495493655 ps |
| CPU time | 1.47 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3829305347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.3829305347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.779415147 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 202235888 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=779415147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.779415147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.586979843 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 274286177 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586979843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 77.usbdev_fifo_levels.586979843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1896882736 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 680803881 ps |
| CPU time | 1.88 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:23 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1896882736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.1896882736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.3918358890 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 234096870 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:06:20 AM UTC 24 |
| Finished | Oct 15 01:06:22 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918358890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.3918358890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.307788937 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 283899824 ps |
| CPU time | 1.09 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:26 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=307788937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 78.usbdev_fifo_levels.307788937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.496116776 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 570332060 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=496116776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_tx _rx_disruption.496116776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.2167036768 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 344692778 ps |
| CPU time | 1.22 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167036768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.2167036768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.4208909524 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 264706706 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208909524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.4208909524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2536360629 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 595590322 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2536360629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.2536360629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.1450189368 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 93445640 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:13 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450189368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.1450189368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.1974092882 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 4225016016 ps |
| CPU time | 8.28 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974092882 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.1974092882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.2469881328 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 13829060736 ps |
| CPU time | 27.63 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:55:12 AM UTC 24 |
| Peak memory | 229324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469881328 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.2469881328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.964985766 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 25116347638 ps |
| CPU time | 40.49 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:55:25 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=964985766 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.964985766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.1077403010 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 188471780 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:54:46 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077403010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.1077403010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.4251029544 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 156058211 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:54:46 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4251029544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.4251029544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.1871007752 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 545510632 ps |
| CPU time | 2.72 seconds |
| Started | Oct 15 12:54:43 AM UTC 24 |
| Finished | Oct 15 12:54:47 AM UTC 24 |
| Peak memory | 218948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871007752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.1871007752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.1950840919 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 660880390 ps |
| CPU time | 2.89 seconds |
| Started | Oct 15 12:54:46 AM UTC 24 |
| Finished | Oct 15 12:54:50 AM UTC 24 |
| Peak memory | 219092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950840919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.1950840919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.928097461 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 1542197309 ps |
| CPU time | 12.26 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 219284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=928097461 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.928097461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.2752438713 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 592343308 ps |
| CPU time | 2.55 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:50 AM UTC 24 |
| Peak memory | 218768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752438713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.2752438713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.3144846249 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 135160188 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144846249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.3144846249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2607496102 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 33656284 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:49 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607496102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2607496102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1521084232 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 1004227216 ps |
| CPU time | 3.49 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:51 AM UTC 24 |
| Peak memory | 219084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521084232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1521084232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.3425888696 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 303933353 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:49 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425888696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.3425888696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1971752126 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 264496178 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:50 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971752126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1971752126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.3152564346 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 380522084 ps |
| CPU time | 3.45 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152564346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.3152564346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.819980882 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 212409416 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:54:49 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 227152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819980882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.819980882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.4214101836 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 178890700 ps |
| CPU time | 1.58 seconds |
| Started | Oct 15 12:54:49 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214101836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.4214101836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.2464960011 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 193573782 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:54:50 AM UTC 24 |
| Finished | Oct 15 12:54:52 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464960011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.2464960011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.4284886304 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 5295410697 ps |
| CPU time | 51.19 seconds |
| Started | Oct 15 12:54:48 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 231380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284886304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.4284886304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.3590754378 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 9314715162 ps |
| CPU time | 63.78 seconds |
| Started | Oct 15 12:54:52 AM UTC 24 |
| Finished | Oct 15 12:55:57 AM UTC 24 |
| Peak memory | 219100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590754378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3590754378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.3208634337 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 256903985 ps |
| CPU time | 1.7 seconds |
| Started | Oct 15 12:54:53 AM UTC 24 |
| Finished | Oct 15 12:54:55 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208634337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.3208634337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.4042581453 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 30637590700 ps |
| CPU time | 63.4 seconds |
| Started | Oct 15 12:54:53 AM UTC 24 |
| Finished | Oct 15 12:55:58 AM UTC 24 |
| Peak memory | 219288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042581453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.4042581453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.194328609 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 10765038127 ps |
| CPU time | 18.89 seconds |
| Started | Oct 15 12:54:53 AM UTC 24 |
| Finished | Oct 15 12:55:13 AM UTC 24 |
| Peak memory | 219292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=194328609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_suspend.194328609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.2996857441 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 5103013370 ps |
| CPU time | 61.6 seconds |
| Started | Oct 15 12:54:53 AM UTC 24 |
| Finished | Oct 15 12:55:56 AM UTC 24 |
| Peak memory | 235692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996857441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.2996857441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.555443374 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 2424727777 ps |
| CPU time | 65.48 seconds |
| Started | Oct 15 12:54:53 AM UTC 24 |
| Finished | Oct 15 12:56:00 AM UTC 24 |
| Peak memory | 235880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=555443374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.555443374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.3341790699 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 269373899 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:58 AM UTC 24 |
| Peak memory | 216608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341790699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3341790699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.1614799475 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 211620844 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:57 AM UTC 24 |
| Peak memory | 216476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1614799475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.1614799475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.650027071 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 2311214723 ps |
| CPU time | 64 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 235892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650027071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.650027071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.2264166709 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 3085784328 ps |
| CPU time | 35.09 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:55:31 AM UTC 24 |
| Peak memory | 236032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264166709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.2264166709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1570654285 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 2697765119 ps |
| CPU time | 28.76 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:55:25 AM UTC 24 |
| Peak memory | 229340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570654285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1570654285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1035536944 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 176620353 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:57 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035536944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1035536944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.3753494201 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 143690567 ps |
| CPU time | 1.38 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753494201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.3753494201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.3369526593 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 222621122 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:58 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369526593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.3369526593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1426829865 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 196153383 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:54:55 AM UTC 24 |
| Finished | Oct 15 12:54:58 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426829865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1426829865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.4234724482 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 178425910 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:54:58 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234724482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.4234724482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1028151546 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 179438428 ps |
| CPU time | 1.29 seconds |
| Started | Oct 15 12:54:58 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028151546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1028151546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.615129420 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 185964565 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:54:58 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615129420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pending_in_trans.615129420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.1390509695 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 215201377 ps |
| CPU time | 1.59 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:03 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390509695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.1390509695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.129102272 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 146005366 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:02 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129102272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.129102272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.2495609346 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 45170507 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:02 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495609346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.2495609346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.113562920 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 17417405038 ps |
| CPU time | 50.74 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:53 AM UTC 24 |
| Peak memory | 229316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113562920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.113562920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.789491563 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 183431431 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:03 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789491563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_pkt_received.789491563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.1231340444 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 238244416 ps |
| CPU time | 1.73 seconds |
| Started | Oct 15 12:55:00 AM UTC 24 |
| Finished | Oct 15 12:55:03 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1231340444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.1231340444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.2451350706 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 4207253855 ps |
| CPU time | 33.06 seconds |
| Started | Oct 15 12:55:03 AM UTC 24 |
| Finished | Oct 15 12:55:38 AM UTC 24 |
| Peak memory | 236012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451350706 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.2451350706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.772916461 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 3039215448 ps |
| CPU time | 82.28 seconds |
| Started | Oct 15 12:55:03 AM UTC 24 |
| Finished | Oct 15 12:56:28 AM UTC 24 |
| Peak memory | 231384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=772916461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.772916461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.3033050039 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 8540270911 ps |
| CPU time | 59.82 seconds |
| Started | Oct 15 12:55:03 AM UTC 24 |
| Finished | Oct 15 12:56:05 AM UTC 24 |
| Peak memory | 236036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033050039 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3033050039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.2114937014 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 222609716 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 12:55:02 AM UTC 24 |
| Finished | Oct 15 12:55:05 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114937014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.2114937014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.4271910044 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 157137284 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:55:03 AM UTC 24 |
| Finished | Oct 15 12:55:06 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271910044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.4271910044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3226393157 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 20164233471 ps |
| CPU time | 35.75 seconds |
| Started | Oct 15 12:55:03 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226393157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3226393157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.3753295938 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 208874945 ps |
| CPU time | 1.56 seconds |
| Started | Oct 15 12:55:05 AM UTC 24 |
| Finished | Oct 15 12:55:08 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753295938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.3753295938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.3863689334 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 256727500 ps |
| CPU time | 1.87 seconds |
| Started | Oct 15 12:55:05 AM UTC 24 |
| Finished | Oct 15 12:55:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863689334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.3863689334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.288442873 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 148063302 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:55:05 AM UTC 24 |
| Finished | Oct 15 12:55:08 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288442873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_setup_stage.288442873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.2834440912 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 179203464 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 12:55:05 AM UTC 24 |
| Finished | Oct 15 12:55:07 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834440912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.2834440912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.3302441632 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 208152692 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 12:55:05 AM UTC 24 |
| Finished | Oct 15 12:55:08 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302441632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.3302441632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.1831655544 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 1381165970 ps |
| CPU time | 34.21 seconds |
| Started | Oct 15 12:55:07 AM UTC 24 |
| Finished | Oct 15 12:55:43 AM UTC 24 |
| Peak memory | 229416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831655544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.1831655544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.224598816 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 188202180 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 12:55:07 AM UTC 24 |
| Finished | Oct 15 12:55:10 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=224598816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.224598816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.3392638922 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 194739722 ps |
| CPU time | 1.27 seconds |
| Started | Oct 15 12:55:08 AM UTC 24 |
| Finished | Oct 15 12:55:10 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392638922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.3392638922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.4129634157 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 1208336658 ps |
| CPU time | 5 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:16 AM UTC 24 |
| Peak memory | 219124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129634157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.4129634157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.2382007220 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 3237551805 ps |
| CPU time | 25.95 seconds |
| Started | Oct 15 12:55:08 AM UTC 24 |
| Finished | Oct 15 12:55:35 AM UTC 24 |
| Peak memory | 219200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382007220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.2382007220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.4128831462 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 6438513887 ps |
| CPU time | 98.71 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:56:51 AM UTC 24 |
| Peak memory | 231420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128831462 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.4128831462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.3696122874 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 581579660 ps |
| CPU time | 12.04 seconds |
| Started | Oct 15 12:54:47 AM UTC 24 |
| Finished | Oct 15 12:55:00 AM UTC 24 |
| Peak memory | 219136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696122874 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.3696122874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.4288155287 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 493658605 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:13 AM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4288155287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.4288155287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2901494165 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 688046199 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901494165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.2901494165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3931781883 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 151919055 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:06:21 AM UTC 24 |
| Finished | Oct 15 01:06:26 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931781883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.3931781883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.1906954669 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 516642846 ps |
| CPU time | 1.79 seconds |
| Started | Oct 15 01:06:23 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1906954669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.1906954669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.2552950522 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 658214429 ps |
| CPU time | 1.72 seconds |
| Started | Oct 15 01:06:23 AM UTC 24 |
| Finished | Oct 15 01:06:43 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2552950522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.2552950522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3462971542 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 257688709 ps |
| CPU time | 1.1 seconds |
| Started | Oct 15 01:06:23 AM UTC 24 |
| Finished | Oct 15 01:06:52 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462971542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.3462971542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.3564443457 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 263184893 ps |
| CPU time | 1.04 seconds |
| Started | Oct 15 01:06:23 AM UTC 24 |
| Finished | Oct 15 01:06:52 AM UTC 24 |
| Peak memory | 216464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564443457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.3564443457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3867695462 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 532001921 ps |
| CPU time | 1.55 seconds |
| Started | Oct 15 01:06:23 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3867695462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.3867695462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.4279250561 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 306273738 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279250561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.4279250561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.4155799386 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 521856572 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4155799386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.4155799386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3797050631 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 227876996 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797050631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3797050631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.990952171 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 154223910 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:27 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990952171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 85.usbdev_fifo_levels.990952171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3734903996 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 510603023 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3734903996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.3734903996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.935799741 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 389067156 ps |
| CPU time | 1.21 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=935799741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.935799741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.993301432 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 263951396 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=993301432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 86.usbdev_fifo_levels.993301432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3614783265 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 667858497 ps |
| CPU time | 1.53 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3614783265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.3614783265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1686767471 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 284154457 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686767471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1686767471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.3363532350 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 259625977 ps |
| CPU time | 1.16 seconds |
| Started | Oct 15 01:06:25 AM UTC 24 |
| Finished | Oct 15 01:06:28 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363532350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.3363532350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1457081260 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 700539316 ps |
| CPU time | 1.83 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:39 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1457081260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.1457081260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2995650116 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 334723624 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995650116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2995650116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.4259102393 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 295190462 ps |
| CPU time | 1.15 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259102393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.4259102393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2437342563 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 455250668 ps |
| CPU time | 1.54 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2437342563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.2437342563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.4095603426 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 424987693 ps |
| CPU time | 1.26 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095603426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.4095603426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.3124156663 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 333377497 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124156663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.3124156663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.4226320045 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 511311011 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:06:26 AM UTC 24 |
| Finished | Oct 15 01:06:39 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4226320045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.4226320045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.1131721480 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 75828714 ps |
| CPU time | 1.05 seconds |
| Started | Oct 15 12:55:39 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131721480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.1131721480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.2215669069 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 6807848788 ps |
| CPU time | 19.44 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:31 AM UTC 24 |
| Peak memory | 229252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215669069 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.2215669069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.1401507601 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 20990345358 ps |
| CPU time | 25.5 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:37 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401507601 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.1401507601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.17855229 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 31211405053 ps |
| CPU time | 41.59 seconds |
| Started | Oct 15 12:55:10 AM UTC 24 |
| Finished | Oct 15 12:55:54 AM UTC 24 |
| Peak memory | 219088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=17855229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.17855229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2093592437 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 194255947 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:55:12 AM UTC 24 |
| Finished | Oct 15 12:55:14 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093592437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2093592437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.3239370854 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 152299017 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:55:12 AM UTC 24 |
| Finished | Oct 15 12:55:14 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239370854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.3239370854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.3416218230 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 168804634 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:12 AM UTC 24 |
| Finished | Oct 15 12:55:14 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416218230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.3416218230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.1291828268 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 835997824 ps |
| CPU time | 4.23 seconds |
| Started | Oct 15 12:55:13 AM UTC 24 |
| Finished | Oct 15 12:55:19 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291828268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.1291828268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.1771843521 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 44136756342 ps |
| CPU time | 103.6 seconds |
| Started | Oct 15 12:55:14 AM UTC 24 |
| Finished | Oct 15 12:56:59 AM UTC 24 |
| Peak memory | 219152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771843521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1771843521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.2130953737 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 1057883890 ps |
| CPU time | 11.55 seconds |
| Started | Oct 15 12:55:14 AM UTC 24 |
| Finished | Oct 15 12:55:26 AM UTC 24 |
| Peak memory | 218936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130953737 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.2130953737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.1132460475 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 561224697 ps |
| CPU time | 2.77 seconds |
| Started | Oct 15 12:55:14 AM UTC 24 |
| Finished | Oct 15 12:55:18 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132460475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.1132460475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.424988979 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 140456710 ps |
| CPU time | 1.14 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:17 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424988979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_disconnected.424988979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1505805349 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 37413555 ps |
| CPU time | 1.08 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:17 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505805349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1505805349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.2079576455 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 955793523 ps |
| CPU time | 3.96 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:20 AM UTC 24 |
| Peak memory | 219048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079576455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.2079576455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2219319749 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 374886459 ps |
| CPU time | 2.14 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:19 AM UTC 24 |
| Peak memory | 218952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219319749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2219319749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.1671897542 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 160013512 ps |
| CPU time | 1.18 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:18 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671897542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.1671897542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.1910690285 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 307370991 ps |
| CPU time | 3.85 seconds |
| Started | Oct 15 12:55:15 AM UTC 24 |
| Finished | Oct 15 12:55:20 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910690285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.1910690285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1233805668 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 232391771 ps |
| CPU time | 2.17 seconds |
| Started | Oct 15 12:55:19 AM UTC 24 |
| Finished | Oct 15 12:55:22 AM UTC 24 |
| Peak memory | 229404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233805668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.1233805668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.554438903 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 142840200 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:55:19 AM UTC 24 |
| Finished | Oct 15 12:55:21 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554438903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.554438903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.41405145 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 212644828 ps |
| CPU time | 1.68 seconds |
| Started | Oct 15 12:55:19 AM UTC 24 |
| Finished | Oct 15 12:55:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41405145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_in_trans.41405145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.1851942726 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 2923923887 ps |
| CPU time | 30.78 seconds |
| Started | Oct 15 12:55:18 AM UTC 24 |
| Finished | Oct 15 12:55:50 AM UTC 24 |
| Peak memory | 235832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851942726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.1851942726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.1444580070 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 12206956083 ps |
| CPU time | 85.42 seconds |
| Started | Oct 15 12:55:19 AM UTC 24 |
| Finished | Oct 15 12:56:46 AM UTC 24 |
| Peak memory | 219228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444580070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.1444580070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.1259859002 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 184276021 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:20 AM UTC 24 |
| Finished | Oct 15 12:55:23 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259859002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.1259859002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1741106950 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 8032321269 ps |
| CPU time | 14.95 seconds |
| Started | Oct 15 12:55:21 AM UTC 24 |
| Finished | Oct 15 12:55:37 AM UTC 24 |
| Peak memory | 219156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741106950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1741106950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2452578483 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 9330615320 ps |
| CPU time | 19.29 seconds |
| Started | Oct 15 12:55:21 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 219020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452578483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2452578483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.2297752691 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 3400236186 ps |
| CPU time | 32.96 seconds |
| Started | Oct 15 12:55:22 AM UTC 24 |
| Finished | Oct 15 12:55:56 AM UTC 24 |
| Peak memory | 231284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297752691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.2297752691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2413908478 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 2463915493 ps |
| CPU time | 20.79 seconds |
| Started | Oct 15 12:55:22 AM UTC 24 |
| Finished | Oct 15 12:55:44 AM UTC 24 |
| Peak memory | 229420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413908478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.2413908478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.1342835981 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 259408223 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:55:22 AM UTC 24 |
| Finished | Oct 15 12:55:25 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342835981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.1342835981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.531592214 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 194362776 ps |
| CPU time | 1.64 seconds |
| Started | Oct 15 12:55:23 AM UTC 24 |
| Finished | Oct 15 12:55:26 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531592214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.531592214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.1841020687 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 3452308824 ps |
| CPU time | 91.09 seconds |
| Started | Oct 15 12:55:23 AM UTC 24 |
| Finished | Oct 15 12:56:56 AM UTC 24 |
| Peak memory | 235968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841020687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.1841020687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.2092205283 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 3053111609 ps |
| CPU time | 86.08 seconds |
| Started | Oct 15 12:55:25 AM UTC 24 |
| Finished | Oct 15 12:56:53 AM UTC 24 |
| Peak memory | 231444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092205283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.2092205283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.1377691798 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 4149776954 ps |
| CPU time | 108.87 seconds |
| Started | Oct 15 12:55:26 AM UTC 24 |
| Finished | Oct 15 12:57:17 AM UTC 24 |
| Peak memory | 229336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377691798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.1377691798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.3515306218 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 173524634 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:55:26 AM UTC 24 |
| Finished | Oct 15 12:55:29 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515306218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.3515306218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.4031778044 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 151568962 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 12:55:26 AM UTC 24 |
| Finished | Oct 15 12:55:29 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031778044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.4031778044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.1004889462 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 195059323 ps |
| CPU time | 1.5 seconds |
| Started | Oct 15 12:55:28 AM UTC 24 |
| Finished | Oct 15 12:55:31 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004889462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.1004889462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.2320980074 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 227801304 ps |
| CPU time | 1.23 seconds |
| Started | Oct 15 12:55:28 AM UTC 24 |
| Finished | Oct 15 12:55:31 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320980074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.2320980074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3348211144 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 165960033 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 12:55:28 AM UTC 24 |
| Finished | Oct 15 12:55:31 AM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348211144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.3348211144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1550044208 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 176357992 ps |
| CPU time | 1.62 seconds |
| Started | Oct 15 12:55:30 AM UTC 24 |
| Finished | Oct 15 12:55:32 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550044208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.1550044208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2746327997 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 159406009 ps |
| CPU time | 1.07 seconds |
| Started | Oct 15 12:55:30 AM UTC 24 |
| Finished | Oct 15 12:55:32 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746327997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.2746327997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.1119868658 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 224290504 ps |
| CPU time | 1.66 seconds |
| Started | Oct 15 12:55:30 AM UTC 24 |
| Finished | Oct 15 12:55:33 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119868658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.1119868658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3495645807 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 142558324 ps |
| CPU time | 1.34 seconds |
| Started | Oct 15 12:55:31 AM UTC 24 |
| Finished | Oct 15 12:55:34 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495645807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.3495645807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1513878775 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 51976491 ps |
| CPU time | 1.13 seconds |
| Started | Oct 15 12:55:32 AM UTC 24 |
| Finished | Oct 15 12:55:34 AM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513878775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.1513878775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.3560751500 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 12572689961 ps |
| CPU time | 36.67 seconds |
| Started | Oct 15 12:55:32 AM UTC 24 |
| Finished | Oct 15 12:56:10 AM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560751500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.3560751500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1974878474 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 197202392 ps |
| CPU time | 1.57 seconds |
| Started | Oct 15 12:55:32 AM UTC 24 |
| Finished | Oct 15 12:55:34 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974878474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1974878474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.226079312 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 226759042 ps |
| CPU time | 1.24 seconds |
| Started | Oct 15 12:55:33 AM UTC 24 |
| Finished | Oct 15 12:55:36 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226079312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_pkt_sent.226079312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3509796995 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 7623067262 ps |
| CPU time | 35.78 seconds |
| Started | Oct 15 12:55:34 AM UTC 24 |
| Finished | Oct 15 12:56:11 AM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509796995 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3509796995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.2424518706 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 2288850113 ps |
| CPU time | 50.12 seconds |
| Started | Oct 15 12:55:34 AM UTC 24 |
| Finished | Oct 15 12:56:26 AM UTC 24 |
| Peak memory | 236008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424518706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.2424518706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.2072420071 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 13624042246 ps |
| CPU time | 81.84 seconds |
| Started | Oct 15 12:55:34 AM UTC 24 |
| Finished | Oct 15 12:56:57 AM UTC 24 |
| Peak memory | 235752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072420071 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2072420071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.1508297631 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 210476715 ps |
| CPU time | 1.46 seconds |
| Started | Oct 15 12:55:34 AM UTC 24 |
| Finished | Oct 15 12:55:36 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508297631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.1508297631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.2494002128 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 175854841 ps |
| CPU time | 1.44 seconds |
| Started | Oct 15 12:55:34 AM UTC 24 |
| Finished | Oct 15 12:55:36 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494002128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.2494002128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1366649070 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 20167496982 ps |
| CPU time | 38.74 seconds |
| Started | Oct 15 12:55:35 AM UTC 24 |
| Finished | Oct 15 12:56:16 AM UTC 24 |
| Peak memory | 218944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366649070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.1366649070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.2554192384 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 171849781 ps |
| CPU time | 1.32 seconds |
| Started | Oct 15 12:55:35 AM UTC 24 |
| Finished | Oct 15 12:55:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554192384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.2554192384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3749070841 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 340041166 ps |
| CPU time | 1.74 seconds |
| Started | Oct 15 12:55:35 AM UTC 24 |
| Finished | Oct 15 12:55:38 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749070841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3749070841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.4271261156 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 156715598 ps |
| CPU time | 1.39 seconds |
| Started | Oct 15 12:55:35 AM UTC 24 |
| Finished | Oct 15 12:55:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271261156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.4271261156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.3663304 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 202960598 ps |
| CPU time | 1.48 seconds |
| Started | Oct 15 12:55:35 AM UTC 24 |
| Finished | Oct 15 12:55:38 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_setup_trans_ignored.3663304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2955918925 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 240921227 ps |
| CPU time | 1.51 seconds |
| Started | Oct 15 12:55:37 AM UTC 24 |
| Finished | Oct 15 12:55:39 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955918925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2955918925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.563420866 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 3000795033 ps |
| CPU time | 23.15 seconds |
| Started | Oct 15 12:55:37 AM UTC 24 |
| Finished | Oct 15 12:56:01 AM UTC 24 |
| Peak memory | 235976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563420866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.563420866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.259514403 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 190376898 ps |
| CPU time | 1.19 seconds |
| Started | Oct 15 12:55:37 AM UTC 24 |
| Finished | Oct 15 12:55:39 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259514403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.259514403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.807678982 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 188872191 ps |
| CPU time | 1.28 seconds |
| Started | Oct 15 12:55:37 AM UTC 24 |
| Finished | Oct 15 12:55:39 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807678982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_stall_trans.807678982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.4165455971 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 330431026 ps |
| CPU time | 1.65 seconds |
| Started | Oct 15 12:55:38 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165455971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.4165455971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.4025272352 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 3345868435 ps |
| CPU time | 25.87 seconds |
| Started | Oct 15 12:55:37 AM UTC 24 |
| Finished | Oct 15 12:56:04 AM UTC 24 |
| Peak memory | 229412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025272352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.4025272352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.3579189904 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 7383672746 ps |
| CPU time | 102.55 seconds |
| Started | Oct 15 12:55:39 AM UTC 24 |
| Finished | Oct 15 12:57:23 AM UTC 24 |
| Peak memory | 235924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579189904 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_ 14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.3579189904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.4085707939 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 2047440835 ps |
| CPU time | 17.71 seconds |
| Started | Oct 15 12:55:14 AM UTC 24 |
| Finished | Oct 15 12:55:33 AM UTC 24 |
| Peak memory | 219096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085707939 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.4085707939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3295585536 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 522131016 ps |
| CPU time | 1.84 seconds |
| Started | Oct 15 12:55:39 AM UTC 24 |
| Finished | Oct 15 12:55:41 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3295585536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3295585536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.2027625281 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 544068794 ps |
| CPU time | 1.52 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:43 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2027625281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.2027625281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.780622890 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 698819184 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:43 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=780622890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.780622890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1711561267 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 639368644 ps |
| CPU time | 1.71 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:43 AM UTC 24 |
| Peak memory | 216408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1711561267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1711561267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.3387483661 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 150267184 ps |
| CPU time | 0.81 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:41 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387483661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.3387483661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1730144311 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 559360603 ps |
| CPU time | 1.75 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1730144311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1730144311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.2199020418 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 278842872 ps |
| CPU time | 0.9 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:52 AM UTC 24 |
| Peak memory | 216616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199020418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.2199020418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.1682298016 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 147163966 ps |
| CPU time | 0.79 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682298016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.1682298016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.415209636 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 496178379 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:06:29 AM UTC 24 |
| Finished | Oct 15 01:06:53 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=415209636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.415209636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2076830211 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 275314221 ps |
| CPU time | 1 seconds |
| Started | Oct 15 01:06:30 AM UTC 24 |
| Finished | Oct 15 01:06:32 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076830211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2076830211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3183140527 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 290911337 ps |
| CPU time | 1.03 seconds |
| Started | Oct 15 01:06:30 AM UTC 24 |
| Finished | Oct 15 01:06:32 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183140527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.3183140527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.4255553859 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 541418124 ps |
| CPU time | 1.49 seconds |
| Started | Oct 15 01:06:30 AM UTC 24 |
| Finished | Oct 15 01:06:32 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4255553859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.4255553859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3927218408 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 226637681 ps |
| CPU time | 0.93 seconds |
| Started | Oct 15 01:06:30 AM UTC 24 |
| Finished | Oct 15 01:06:32 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927218408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.3927218408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.771750035 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 257371947 ps |
| CPU time | 1.01 seconds |
| Started | Oct 15 01:06:31 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=771750035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.771750035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1191238475 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 607971656 ps |
| CPU time | 1.67 seconds |
| Started | Oct 15 01:06:31 AM UTC 24 |
| Finished | Oct 15 01:06:57 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191238475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.1191238475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3070949033 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 346175905 ps |
| CPU time | 1.11 seconds |
| Started | Oct 15 01:06:32 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070949033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.3070949033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.661743351 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 255709614 ps |
| CPU time | 1.06 seconds |
| Started | Oct 15 01:06:32 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661743351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 99.usbdev_fifo_levels.661743351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.199470964 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 549709991 ps |
| CPU time | 1.43 seconds |
| Started | Oct 15 01:06:32 AM UTC 24 |
| Finished | Oct 15 01:06:38 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=199470964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_tx _rx_disruption.199470964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |