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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.44 98.11 95.91 97.44 87.30 98.22 98.17 92.94


Total test records in report: 3732
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T1019 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.579493015 Feb 08 06:03:59 PM UTC 25 Feb 08 06:04:02 PM UTC 25 218682948 ps
T1020 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1530472955 Feb 08 06:03:10 PM UTC 25 Feb 08 06:04:03 PM UTC 25 5320697404 ps
T1021 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.544088226 Feb 08 06:04:02 PM UTC 25 Feb 08 06:04:04 PM UTC 25 211286598 ps
T1022 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.2579414914 Feb 08 06:04:02 PM UTC 25 Feb 08 06:04:04 PM UTC 25 252760128 ps
T1023 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.1280398683 Feb 08 06:04:04 PM UTC 25 Feb 08 06:04:06 PM UTC 25 148438627 ps
T1024 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1302994506 Feb 08 06:04:04 PM UTC 25 Feb 08 06:04:07 PM UTC 25 151567462 ps
T1025 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.1381292096 Feb 08 06:03:17 PM UTC 25 Feb 08 06:04:07 PM UTC 25 31354669618 ps
T150 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.1988143299 Feb 08 06:04:05 PM UTC 25 Feb 08 06:04:08 PM UTC 25 222371313 ps
T1026 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.816277948 Feb 08 06:03:10 PM UTC 25 Feb 08 06:04:09 PM UTC 25 20162000156 ps
T1027 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.1124763590 Feb 08 06:04:07 PM UTC 25 Feb 08 06:04:10 PM UTC 25 170883855 ps
T1028 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2638034895 Feb 08 06:04:08 PM UTC 25 Feb 08 06:04:10 PM UTC 25 174387069 ps
T1029 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.3020046985 Feb 08 06:03:40 PM UTC 25 Feb 08 06:04:11 PM UTC 25 20216624116 ps
T1030 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.880951893 Feb 08 06:04:09 PM UTC 25 Feb 08 06:04:11 PM UTC 25 173541867 ps
T1031 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2430799071 Feb 08 06:04:09 PM UTC 25 Feb 08 06:04:11 PM UTC 25 222697605 ps
T1032 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.3045911969 Feb 08 06:04:10 PM UTC 25 Feb 08 06:04:13 PM UTC 25 222435715 ps
T1033 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.588483954 Feb 08 06:04:11 PM UTC 25 Feb 08 06:04:13 PM UTC 25 35097871 ps
T1034 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.4086395897 Feb 08 06:04:11 PM UTC 25 Feb 08 06:04:14 PM UTC 25 182722282 ps
T1035 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.2278727594 Feb 08 06:04:00 PM UTC 25 Feb 08 06:04:15 PM UTC 25 4598832993 ps
T1036 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.18148174 Feb 08 06:04:12 PM UTC 25 Feb 08 06:04:16 PM UTC 25 167244260 ps
T1037 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.2581422159 Feb 08 06:04:12 PM UTC 25 Feb 08 06:04:16 PM UTC 25 267149844 ps
T245 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3160462789 Feb 08 06:03:49 PM UTC 25 Feb 08 06:04:16 PM UTC 25 11992157836 ps
T1038 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.2132410762 Feb 08 06:04:00 PM UTC 25 Feb 08 06:04:16 PM UTC 25 9909758834 ps
T1039 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.616003695 Feb 08 06:04:14 PM UTC 25 Feb 08 06:04:17 PM UTC 25 189664766 ps
T1040 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.2588748572 Feb 08 06:02:55 PM UTC 25 Feb 08 06:04:17 PM UTC 25 9293850743 ps
T1041 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.860813196 Feb 08 06:03:45 PM UTC 25 Feb 08 06:04:17 PM UTC 25 2848500627 ps
T1042 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.1432380261 Feb 08 06:03:49 PM UTC 25 Feb 08 06:04:18 PM UTC 25 18329606424 ps
T1043 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.1476129764 Feb 08 06:04:15 PM UTC 25 Feb 08 06:04:18 PM UTC 25 141106919 ps
T1044 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.991345279 Feb 08 06:04:15 PM UTC 25 Feb 08 06:04:18 PM UTC 25 155370028 ps
T60 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.1923363056 Feb 08 06:04:16 PM UTC 25 Feb 08 06:04:19 PM UTC 25 252604682 ps
T1045 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1918031485 Feb 08 06:04:18 PM UTC 25 Feb 08 06:04:20 PM UTC 25 147213326 ps
T1046 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.344004138 Feb 08 06:03:57 PM UTC 25 Feb 08 06:04:20 PM UTC 25 2557963878 ps
T1047 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.1274434767 Feb 08 06:04:18 PM UTC 25 Feb 08 06:04:20 PM UTC 25 156164958 ps
T1048 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.926687090 Feb 08 06:04:18 PM UTC 25 Feb 08 06:04:21 PM UTC 25 160120660 ps
T1049 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.1911682957 Feb 08 06:04:18 PM UTC 25 Feb 08 06:04:21 PM UTC 25 226609828 ps
T1050 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.796967419 Feb 08 06:04:18 PM UTC 25 Feb 08 06:04:21 PM UTC 25 156126184 ps
T1051 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.931722105 Feb 08 06:10:10 PM UTC 25 Feb 08 06:10:56 PM UTC 25 1516820664 ps
T1052 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3032273156 Feb 08 06:04:19 PM UTC 25 Feb 08 06:04:23 PM UTC 25 565226422 ps
T1053 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.1378339617 Feb 08 06:04:21 PM UTC 25 Feb 08 06:04:23 PM UTC 25 89971062 ps
T1054 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.3603649141 Feb 08 06:04:22 PM UTC 25 Feb 08 06:04:25 PM UTC 25 184880522 ps
T1055 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.2317743401 Feb 08 06:04:19 PM UTC 25 Feb 08 06:04:24 PM UTC 25 930206384 ps
T1056 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.1691745289 Feb 08 06:03:32 PM UTC 25 Feb 08 06:04:24 PM UTC 25 1844188627 ps
T1057 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2302781299 Feb 08 06:04:22 PM UTC 25 Feb 08 06:04:24 PM UTC 25 190517492 ps
T1058 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.2242085449 Feb 08 06:03:53 PM UTC 25 Feb 08 06:04:25 PM UTC 25 2996042997 ps
T1059 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.1821769785 Feb 08 06:03:28 PM UTC 25 Feb 08 06:04:25 PM UTC 25 6032178909 ps
T1060 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.276033949 Feb 08 06:04:22 PM UTC 25 Feb 08 06:04:25 PM UTC 25 366107020 ps
T1061 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_enable.1508380427 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:28 PM UTC 25 47911485 ps
T319 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.2299349621 Feb 08 06:04:23 PM UTC 25 Feb 08 06:04:28 PM UTC 25 951574611 ps
T1062 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.2527982571 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:29 PM UTC 25 180814914 ps
T405 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.2984705854 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:29 PM UTC 25 378226058 ps
T1063 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.165066998 Feb 08 06:03:30 PM UTC 25 Feb 08 06:04:30 PM UTC 25 27287929506 ps
T1064 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.313515598 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:31 PM UTC 25 186021892 ps
T1065 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.160127254 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:31 PM UTC 25 877173971 ps
T1066 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.3663248891 Feb 08 06:04:26 PM UTC 25 Feb 08 06:04:32 PM UTC 25 916201827 ps
T1067 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.3932819398 Feb 08 06:04:30 PM UTC 25 Feb 08 06:04:32 PM UTC 25 148681386 ps
T1068 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.707910704 Feb 08 06:01:29 PM UTC 25 Feb 08 06:04:32 PM UTC 25 9598316794 ps
T1069 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.4010454058 Feb 08 06:04:30 PM UTC 25 Feb 08 06:04:32 PM UTC 25 176860568 ps
T1070 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.109759057 Feb 08 06:04:29 PM UTC 25 Feb 08 06:04:33 PM UTC 25 235148904 ps
T1071 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.1386532644 Feb 08 06:03:30 PM UTC 25 Feb 08 06:04:33 PM UTC 25 2275533040 ps
T1072 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.2219449539 Feb 08 06:02:59 PM UTC 25 Feb 08 06:04:34 PM UTC 25 3145012970 ps
T1073 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.2145476889 Feb 08 06:04:32 PM UTC 25 Feb 08 06:04:35 PM UTC 25 270255498 ps
T1074 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.1601409167 Feb 08 06:04:33 PM UTC 25 Feb 08 06:04:36 PM UTC 25 241011111 ps
T1075 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.1311351882 Feb 08 06:04:33 PM UTC 25 Feb 08 06:04:36 PM UTC 25 245494405 ps
T1076 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.534488557 Feb 08 06:04:03 PM UTC 25 Feb 08 06:04:38 PM UTC 25 2536700416 ps
T1077 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.2527082010 Feb 08 06:04:37 PM UTC 25 Feb 08 06:04:40 PM UTC 25 143045802 ps
T1078 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.3962606975 Feb 08 06:04:37 PM UTC 25 Feb 08 06:04:40 PM UTC 25 150726820 ps
T1079 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.1857857866 Feb 08 06:03:49 PM UTC 25 Feb 08 06:04:40 PM UTC 25 29983131415 ps
T1080 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.965072102 Feb 08 06:03:51 PM UTC 25 Feb 08 06:04:42 PM UTC 25 25525525245 ps
T129 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.2379499925 Feb 08 06:04:39 PM UTC 25 Feb 08 06:04:42 PM UTC 25 203700188 ps
T1081 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.2535837233 Feb 08 06:04:41 PM UTC 25 Feb 08 06:04:43 PM UTC 25 175519890 ps
T1082 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.2386608506 Feb 08 06:03:32 PM UTC 25 Feb 08 06:04:43 PM UTC 25 2337012674 ps
T1083 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.3898920108 Feb 08 06:04:41 PM UTC 25 Feb 08 06:04:43 PM UTC 25 164905493 ps
T1084 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.2148002112 Feb 08 06:04:41 PM UTC 25 Feb 08 06:04:44 PM UTC 25 168050538 ps
T1085 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.3183644113 Feb 08 06:04:43 PM UTC 25 Feb 08 06:04:46 PM UTC 25 152157149 ps
T1086 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2839281303 Feb 08 06:04:43 PM UTC 25 Feb 08 06:04:46 PM UTC 25 234939700 ps
T1087 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.1097119266 Feb 08 06:04:22 PM UTC 25 Feb 08 06:04:47 PM UTC 25 15344465329 ps
T1088 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.1678142228 Feb 08 06:04:45 PM UTC 25 Feb 08 06:04:47 PM UTC 25 57578927 ps
T1089 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.3602393254 Feb 08 06:03:53 PM UTC 25 Feb 08 06:04:47 PM UTC 25 6753972260 ps
T1090 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.2301110447 Feb 08 06:04:45 PM UTC 25 Feb 08 06:04:47 PM UTC 25 139717467 ps
T1091 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1244374136 Feb 08 06:04:45 PM UTC 25 Feb 08 06:04:48 PM UTC 25 161723668 ps
T1092 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.245774235 Feb 08 06:04:47 PM UTC 25 Feb 08 06:04:50 PM UTC 25 193554229 ps
T1093 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1230713822 Feb 08 06:04:47 PM UTC 25 Feb 08 06:04:50 PM UTC 25 230600706 ps
T1094 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3911913211 Feb 08 06:04:48 PM UTC 25 Feb 08 06:04:51 PM UTC 25 158701488 ps
T1095 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.1929082334 Feb 08 06:04:24 PM UTC 25 Feb 08 06:04:51 PM UTC 25 3611045722 ps
T1096 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.3944976250 Feb 08 06:04:48 PM UTC 25 Feb 08 06:04:51 PM UTC 25 168500825 ps
T1097 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.600273117 Feb 08 06:04:49 PM UTC 25 Feb 08 06:04:51 PM UTC 25 161585066 ps
T1098 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.4169603064 Feb 08 06:04:21 PM UTC 25 Feb 08 06:04:52 PM UTC 25 10022320294 ps
T1099 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.3217404838 Feb 08 06:04:49 PM UTC 25 Feb 08 06:04:52 PM UTC 25 245908358 ps
T193 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.2995177383 Feb 08 06:01:27 PM UTC 25 Feb 08 06:04:53 PM UTC 25 7772470965 ps
T1100 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2596314821 Feb 08 06:04:51 PM UTC 25 Feb 08 06:04:53 PM UTC 25 160128868 ps
T1101 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.3877467138 Feb 08 06:04:51 PM UTC 25 Feb 08 06:04:54 PM UTC 25 203418170 ps
T1102 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.2941861515 Feb 08 06:04:52 PM UTC 25 Feb 08 06:04:55 PM UTC 25 185925752 ps
T1103 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3304778037 Feb 08 06:04:52 PM UTC 25 Feb 08 06:04:55 PM UTC 25 201636336 ps
T1104 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1192526871 Feb 08 06:04:15 PM UTC 25 Feb 08 06:04:56 PM UTC 25 20232917223 ps
T224 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.825893411 Feb 08 06:06:22 PM UTC 25 Feb 08 06:06:26 PM UTC 25 543680802 ps
T1105 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.1202421653 Feb 08 06:04:55 PM UTC 25 Feb 08 06:04:57 PM UTC 25 44798621 ps
T1106 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.976328791 Feb 08 06:04:53 PM UTC 25 Feb 08 06:04:57 PM UTC 25 991779139 ps
T1107 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.192405258 Feb 08 06:04:53 PM UTC 25 Feb 08 06:04:57 PM UTC 25 488449783 ps
T1108 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.172581140 Feb 08 06:04:57 PM UTC 25 Feb 08 06:05:00 PM UTC 25 191861372 ps
T401 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.1800412989 Feb 08 06:04:33 PM UTC 25 Feb 08 06:05:00 PM UTC 25 2716165722 ps
T1109 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.569239927 Feb 08 06:04:57 PM UTC 25 Feb 08 06:05:00 PM UTC 25 171069364 ps
T1110 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3464883021 Feb 08 06:02:59 PM UTC 25 Feb 08 06:05:00 PM UTC 25 4390355811 ps
T1111 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.4025469271 Feb 08 06:03:44 PM UTC 25 Feb 08 06:05:01 PM UTC 25 2620279501 ps
T1112 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.1269757907 Feb 08 06:04:59 PM UTC 25 Feb 08 06:05:01 PM UTC 25 432630963 ps
T1113 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.922975494 Feb 08 06:04:36 PM UTC 25 Feb 08 06:05:01 PM UTC 25 2413366513 ps
T1114 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.3146615522 Feb 08 06:04:57 PM UTC 25 Feb 08 06:05:02 PM UTC 25 558810133 ps
T1115 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.1030058019 Feb 08 06:04:12 PM UTC 25 Feb 08 06:05:03 PM UTC 25 14025394603 ps
T1116 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.1994243103 Feb 08 06:05:01 PM UTC 25 Feb 08 06:05:04 PM UTC 25 182457362 ps
T1117 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.25476186 Feb 08 06:04:33 PM UTC 25 Feb 08 06:05:04 PM UTC 25 9806070121 ps
T1118 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.2314034562 Feb 08 06:04:24 PM UTC 25 Feb 08 06:05:05 PM UTC 25 1399362776 ps
T1119 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_enable.3510586208 Feb 08 06:05:03 PM UTC 25 Feb 08 06:05:05 PM UTC 25 46518003 ps
T1120 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.3091380603 Feb 08 06:05:01 PM UTC 25 Feb 08 06:05:06 PM UTC 25 629517681 ps
T372 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.905300507 Feb 08 06:05:03 PM UTC 25 Feb 08 06:05:06 PM UTC 25 670174648 ps
T1121 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.2091320751 Feb 08 06:04:35 PM UTC 25 Feb 08 06:05:06 PM UTC 25 3127638308 ps
T1122 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.2995339843 Feb 08 06:05:04 PM UTC 25 Feb 08 06:05:07 PM UTC 25 143288293 ps
T1123 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.1282945452 Feb 08 06:05:03 PM UTC 25 Feb 08 06:05:07 PM UTC 25 270174027 ps
T1124 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.2330617815 Feb 08 06:05:04 PM UTC 25 Feb 08 06:05:08 PM UTC 25 239152989 ps
T1125 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.943565324 Feb 08 06:04:22 PM UTC 25 Feb 08 06:05:08 PM UTC 25 31340844587 ps
T1126 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.3512843723 Feb 08 06:05:06 PM UTC 25 Feb 08 06:05:08 PM UTC 25 174525030 ps
T1127 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.1813101812 Feb 08 06:05:03 PM UTC 25 Feb 08 06:05:09 PM UTC 25 1085372367 ps
T1128 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.2305061827 Feb 08 06:05:07 PM UTC 25 Feb 08 06:05:10 PM UTC 25 224628060 ps
T1129 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.4237313201 Feb 08 06:05:08 PM UTC 25 Feb 08 06:05:11 PM UTC 25 239958590 ps
T1130 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.3371237050 Feb 08 06:05:09 PM UTC 25 Feb 08 06:05:12 PM UTC 25 188046284 ps
T1131 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.85470225 Feb 08 06:04:19 PM UTC 25 Feb 08 06:05:12 PM UTC 25 1876340763 ps
T1132 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2328197589 Feb 08 06:05:12 PM UTC 25 Feb 08 06:05:14 PM UTC 25 154255176 ps
T1133 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.3882544645 Feb 08 06:05:01 PM UTC 25 Feb 08 06:05:15 PM UTC 25 565704017 ps
T1134 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.429546355 Feb 08 06:05:01 PM UTC 25 Feb 08 06:05:15 PM UTC 25 1355611677 ps
T1135 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.2011211180 Feb 08 06:04:55 PM UTC 25 Feb 08 06:05:15 PM UTC 25 11800660236 ps
T1136 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.4105072226 Feb 08 06:05:13 PM UTC 25 Feb 08 06:05:16 PM UTC 25 150587624 ps
T1137 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3192270116 Feb 08 06:04:03 PM UTC 25 Feb 08 06:05:16 PM UTC 25 2076415407 ps
T137 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3117458108 Feb 08 06:05:13 PM UTC 25 Feb 08 06:05:16 PM UTC 25 175959900 ps
T1138 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.3379374733 Feb 08 06:04:52 PM UTC 25 Feb 08 06:05:16 PM UTC 25 2087016241 ps
T100 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.3346055571 Feb 08 06:05:08 PM UTC 25 Feb 08 06:05:17 PM UTC 25 3963762747 ps
T1139 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1462792517 Feb 08 06:04:02 PM UTC 25 Feb 08 06:05:18 PM UTC 25 2780414614 ps
T1140 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3501936586 Feb 08 06:05:15 PM UTC 25 Feb 08 06:05:18 PM UTC 25 177499922 ps
T1141 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.2990523471 Feb 08 06:05:15 PM UTC 25 Feb 08 06:05:18 PM UTC 25 173370391 ps
T1142 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.3718894492 Feb 08 06:03:26 PM UTC 25 Feb 08 06:05:18 PM UTC 25 3698444603 ps
T1143 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.2916034660 Feb 08 06:05:16 PM UTC 25 Feb 08 06:05:18 PM UTC 25 203440757 ps
T1144 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.2176552780 Feb 08 06:05:16 PM UTC 25 Feb 08 06:05:18 PM UTC 25 159421422 ps
T1145 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.2939040157 Feb 08 06:05:17 PM UTC 25 Feb 08 06:05:19 PM UTC 25 40479413 ps
T1146 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.1302958874 Feb 08 06:05:17 PM UTC 25 Feb 08 06:05:19 PM UTC 25 216452209 ps
T1147 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.452097044 Feb 08 06:05:17 PM UTC 25 Feb 08 06:05:20 PM UTC 25 158260767 ps
T1148 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.3262535974 Feb 08 06:05:18 PM UTC 25 Feb 08 06:05:21 PM UTC 25 228651385 ps
T1149 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.1306196445 Feb 08 06:05:18 PM UTC 25 Feb 08 06:05:21 PM UTC 25 167814604 ps
T1150 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1053260073 Feb 08 06:05:18 PM UTC 25 Feb 08 06:05:21 PM UTC 25 230808206 ps
T1151 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3565378717 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:22 PM UTC 25 151468777 ps
T1152 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.3804160232 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:22 PM UTC 25 186895588 ps
T1153 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.3289972713 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:23 PM UTC 25 148974778 ps
T1154 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.3637636141 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:23 PM UTC 25 149735982 ps
T1155 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.1956204229 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:23 PM UTC 25 338509470 ps
T101 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.3114899975 Feb 08 06:05:07 PM UTC 25 Feb 08 06:05:24 PM UTC 25 9109547685 ps
T1156 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.2684240499 Feb 08 06:05:22 PM UTC 25 Feb 08 06:05:24 PM UTC 25 152972509 ps
T1157 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.784928557 Feb 08 06:05:22 PM UTC 25 Feb 08 06:05:24 PM UTC 25 164016501 ps
T1158 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.322068631 Feb 08 06:05:22 PM UTC 25 Feb 08 06:05:25 PM UTC 25 241472303 ps
T1159 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.1531811805 Feb 08 06:04:56 PM UTC 25 Feb 08 06:05:25 PM UTC 25 19171983065 ps
T1160 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2696947529 Feb 08 06:04:29 PM UTC 25 Feb 08 06:05:49 PM UTC 25 2687268129 ps
T1161 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.3355511901 Feb 08 06:05:23 PM UTC 25 Feb 08 06:05:25 PM UTC 25 69671238 ps
T1162 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.105002159 Feb 08 06:04:48 PM UTC 25 Feb 08 06:05:26 PM UTC 25 20153922963 ps
T1163 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1313198364 Feb 08 06:04:32 PM UTC 25 Feb 08 06:05:26 PM UTC 25 24880245526 ps
T183 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.2991181321 Feb 08 06:05:23 PM UTC 25 Feb 08 06:05:27 PM UTC 25 582242149 ps
T1164 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.2923852982 Feb 08 06:05:11 PM UTC 25 Feb 08 06:05:27 PM UTC 25 1688920057 ps
T1165 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.1851415029 Feb 08 06:05:23 PM UTC 25 Feb 08 06:05:28 PM UTC 25 1139804935 ps
T1166 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.2947119817 Feb 08 06:05:26 PM UTC 25 Feb 08 06:05:28 PM UTC 25 158117049 ps
T1167 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.328055620 Feb 08 06:05:26 PM UTC 25 Feb 08 06:05:28 PM UTC 25 154033344 ps
T1168 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.3174008443 Feb 08 06:05:26 PM UTC 25 Feb 08 06:05:28 PM UTC 25 253674613 ps
T1169 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.535582454 Feb 08 06:05:27 PM UTC 25 Feb 08 06:05:30 PM UTC 25 202322691 ps
T1170 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.3564759308 Feb 08 06:05:26 PM UTC 25 Feb 08 06:05:30 PM UTC 25 574359026 ps
T1171 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_enable.4233942055 Feb 08 06:05:29 PM UTC 25 Feb 08 06:05:31 PM UTC 25 39422496 ps
T1172 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.1306023363 Feb 08 06:05:29 PM UTC 25 Feb 08 06:05:32 PM UTC 25 156770708 ps
T492 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.2066719166 Feb 08 06:05:29 PM UTC 25 Feb 08 06:05:32 PM UTC 25 184473373 ps
T1173 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2202246825 Feb 08 06:05:29 PM UTC 25 Feb 08 06:05:32 PM UTC 25 170373599 ps
T1174 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.1852887120 Feb 08 06:04:31 PM UTC 25 Feb 08 06:05:32 PM UTC 25 6369961505 ps
T1175 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3432361125 Feb 08 06:05:24 PM UTC 25 Feb 08 06:05:33 PM UTC 25 4170416469 ps
T1176 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.311100606 Feb 08 06:05:27 PM UTC 25 Feb 08 06:05:33 PM UTC 25 1187807516 ps
T1177 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.3142019771 Feb 08 06:05:31 PM UTC 25 Feb 08 06:05:34 PM UTC 25 229542203 ps
T1178 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.4207515116 Feb 08 06:05:29 PM UTC 25 Feb 08 06:05:34 PM UTC 25 1126024827 ps
T1179 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.3009659428 Feb 08 06:04:45 PM UTC 25 Feb 08 06:05:34 PM UTC 25 18810867104 ps
T1180 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.1486196150 Feb 08 06:05:32 PM UTC 25 Feb 08 06:05:35 PM UTC 25 152969336 ps
T1181 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.4123034053 Feb 08 06:05:32 PM UTC 25 Feb 08 06:05:35 PM UTC 25 250378238 ps
T1182 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4041182304 Feb 08 06:02:59 PM UTC 25 Feb 08 06:05:35 PM UTC 25 5139854304 ps
T1183 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.3762939107 Feb 08 06:04:03 PM UTC 25 Feb 08 06:05:36 PM UTC 25 3145084265 ps
T1184 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.179019783 Feb 08 06:05:34 PM UTC 25 Feb 08 06:05:37 PM UTC 25 188244059 ps
T1185 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.1906867796 Feb 08 06:05:36 PM UTC 25 Feb 08 06:05:38 PM UTC 25 191823891 ps
T1186 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.187084539 Feb 08 06:05:36 PM UTC 25 Feb 08 06:05:38 PM UTC 25 241687855 ps
T1187 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.709345857 Feb 08 06:05:37 PM UTC 25 Feb 08 06:05:40 PM UTC 25 160526573 ps
T1188 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.2031755459 Feb 08 06:05:37 PM UTC 25 Feb 08 06:05:40 PM UTC 25 226793173 ps
T1189 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.1311948646 Feb 08 06:05:40 PM UTC 25 Feb 08 06:05:42 PM UTC 25 219543410 ps
T1190 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2341541384 Feb 08 06:05:40 PM UTC 25 Feb 08 06:05:42 PM UTC 25 227303997 ps
T1191 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2079971464 Feb 08 06:05:41 PM UTC 25 Feb 08 06:05:43 PM UTC 25 161533779 ps
T1192 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.2011094133 Feb 08 06:05:41 PM UTC 25 Feb 08 06:05:44 PM UTC 25 214313280 ps
T1193 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1999570586 Feb 08 06:04:56 PM UTC 25 Feb 08 06:05:44 PM UTC 25 23746462308 ps
T269 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3887811419 Feb 08 06:03:59 PM UTC 25 Feb 08 06:05:44 PM UTC 25 8973371595 ps
T1194 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.3071114094 Feb 08 06:03:32 PM UTC 25 Feb 08 06:05:44 PM UTC 25 3895125581 ps
T1195 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.789137177 Feb 08 06:05:23 PM UTC 25 Feb 08 06:05:44 PM UTC 25 2154597885 ps
T1196 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.1657199905 Feb 08 06:05:43 PM UTC 25 Feb 08 06:05:46 PM UTC 25 153030248 ps
T1197 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.3097088323 Feb 08 06:05:43 PM UTC 25 Feb 08 06:05:46 PM UTC 25 217328352 ps
T1198 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.1642072754 Feb 08 06:05:44 PM UTC 25 Feb 08 06:05:46 PM UTC 25 47692829 ps
T1199 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3501843400 Feb 08 06:05:44 PM UTC 25 Feb 08 06:05:47 PM UTC 25 147147506 ps
T1200 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.4155709862 Feb 08 06:05:46 PM UTC 25 Feb 08 06:05:48 PM UTC 25 186066775 ps
T1201 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.4205877820 Feb 08 06:06:23 PM UTC 25 Feb 08 06:06:26 PM UTC 25 192911383 ps
T1202 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3873171109 Feb 08 06:04:00 PM UTC 25 Feb 08 06:05:49 PM UTC 25 3407561756 ps
T1203 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.405760423 Feb 08 06:05:46 PM UTC 25 Feb 08 06:05:49 PM UTC 25 180602840 ps
T1204 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.72752636 Feb 08 06:05:46 PM UTC 25 Feb 08 06:05:49 PM UTC 25 257093212 ps
T1205 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.323222378 Feb 08 06:05:48 PM UTC 25 Feb 08 06:05:50 PM UTC 25 144725262 ps
T1206 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.227443670 Feb 08 06:05:48 PM UTC 25 Feb 08 06:05:50 PM UTC 25 169603908 ps
T1207 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.4118901608 Feb 08 06:05:48 PM UTC 25 Feb 08 06:05:50 PM UTC 25 150854184 ps
T1208 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2229657534 Feb 08 06:05:48 PM UTC 25 Feb 08 06:05:51 PM UTC 25 333633010 ps
T1209 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.588918788 Feb 08 06:05:50 PM UTC 25 Feb 08 06:05:53 PM UTC 25 206649224 ps
T1210 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.2131507451 Feb 08 06:05:27 PM UTC 25 Feb 08 06:05:53 PM UTC 25 3609464854 ps
T1211 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.2769673361 Feb 08 06:05:50 PM UTC 25 Feb 08 06:05:53 PM UTC 25 162339082 ps
T1212 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.2407870241 Feb 08 06:05:50 PM UTC 25 Feb 08 06:05:53 PM UTC 25 222150672 ps
T1213 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.749005756 Feb 08 06:05:50 PM UTC 25 Feb 08 06:05:53 PM UTC 25 245371940 ps
T1214 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1812866188 Feb 08 06:05:20 PM UTC 25 Feb 08 06:05:53 PM UTC 25 20176565456 ps
T118 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.2294398374 Feb 08 06:05:52 PM UTC 25 Feb 08 06:05:55 PM UTC 25 578518971 ps
T1215 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3816834899 Feb 08 06:05:54 PM UTC 25 Feb 08 06:05:56 PM UTC 25 39918426 ps
T1216 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3864046124 Feb 08 06:05:54 PM UTC 25 Feb 08 06:05:57 PM UTC 25 160560905 ps
T1217 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.1023572880 Feb 08 06:05:54 PM UTC 25 Feb 08 06:05:57 PM UTC 25 176676405 ps
T1218 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.2807846914 Feb 08 06:05:54 PM UTC 25 Feb 08 06:05:57 PM UTC 25 269722453 ps
T1219 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2046801787 Feb 08 06:05:52 PM UTC 25 Feb 08 06:05:58 PM UTC 25 1116544860 ps
T1220 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.1689736770 Feb 08 06:05:37 PM UTC 25 Feb 08 06:05:59 PM UTC 25 2354945910 ps
T1221 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.876501945 Feb 08 06:05:31 PM UTC 25 Feb 08 06:06:00 PM UTC 25 2926873162 ps
T318 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3405042661 Feb 08 06:05:57 PM UTC 25 Feb 08 06:06:00 PM UTC 25 611078627 ps
T1222 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.1912568816 Feb 08 06:05:59 PM UTC 25 Feb 08 06:06:01 PM UTC 25 183979522 ps
T1223 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.84389948 Feb 08 06:05:58 PM UTC 25 Feb 08 06:06:01 PM UTC 25 636820560 ps
T1224 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.1399097326 Feb 08 06:05:36 PM UTC 25 Feb 08 06:06:03 PM UTC 25 2962592324 ps
T1225 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_enable.2522585187 Feb 08 06:06:00 PM UTC 25 Feb 08 06:06:03 PM UTC 25 54832807 ps
T456 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.801031534 Feb 08 06:06:01 PM UTC 25 Feb 08 06:06:03 PM UTC 25 189022623 ps
T1226 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.525749187 Feb 08 06:05:34 PM UTC 25 Feb 08 06:06:03 PM UTC 25 10336063392 ps
T1227 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.1865905314 Feb 08 06:05:34 PM UTC 25 Feb 08 06:06:05 PM UTC 25 13033175045 ps
T1228 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.1511157049 Feb 08 06:05:54 PM UTC 25 Feb 08 06:06:05 PM UTC 25 6131544015 ps
T497 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.1774923085 Feb 08 06:06:01 PM UTC 25 Feb 08 06:06:05 PM UTC 25 808009556 ps
T1229 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.531676329 Feb 08 06:05:26 PM UTC 25 Feb 08 06:06:06 PM UTC 25 25951155372 ps
T1230 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.4126316995 Feb 08 06:06:04 PM UTC 25 Feb 08 06:06:07 PM UTC 25 147696420 ps
T1231 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.3891967121 Feb 08 06:05:36 PM UTC 25 Feb 08 06:06:07 PM UTC 25 3098961606 ps
T1232 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.693068767 Feb 08 06:06:04 PM UTC 25 Feb 08 06:06:07 PM UTC 25 270068321 ps
T1233 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.3155880399 Feb 08 06:06:04 PM UTC 25 Feb 08 06:06:07 PM UTC 25 217503917 ps
T1234 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.3382019522 Feb 08 06:06:03 PM UTC 25 Feb 08 06:06:07 PM UTC 25 195526097 ps
T1235 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3652632915 Feb 08 06:05:25 PM UTC 25 Feb 08 06:06:07 PM UTC 25 20094159806 ps
T1236 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.2324053857 Feb 08 06:06:05 PM UTC 25 Feb 08 06:06:08 PM UTC 25 176279021 ps
T1237 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.1301106320 Feb 08 06:04:23 PM UTC 25 Feb 08 06:06:08 PM UTC 25 43345673542 ps
T1238 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.115637034 Feb 08 06:04:52 PM UTC 25 Feb 08 06:06:08 PM UTC 25 2289090031 ps
T1239 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.1500141811 Feb 08 06:06:08 PM UTC 25 Feb 08 06:06:11 PM UTC 25 158522126 ps
T1240 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.46420246 Feb 08 06:06:08 PM UTC 25 Feb 08 06:06:11 PM UTC 25 195570424 ps
T1241 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1486135943 Feb 08 06:06:08 PM UTC 25 Feb 08 06:06:11 PM UTC 25 157015739 ps
T1242 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.1310095357 Feb 08 06:06:08 PM UTC 25 Feb 08 06:06:11 PM UTC 25 240013578 ps
T1243 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.4063019315 Feb 08 06:06:10 PM UTC 25 Feb 08 06:06:13 PM UTC 25 153070042 ps
T134 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2040672866 Feb 08 06:06:10 PM UTC 25 Feb 08 06:06:13 PM UTC 25 217530725 ps
T1244 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.415903902 Feb 08 06:06:12 PM UTC 25 Feb 08 06:06:14 PM UTC 25 163571797 ps
T191 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2705694616 Feb 08 06:06:12 PM UTC 25 Feb 08 06:06:14 PM UTC 25 169991390 ps
T1245 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.645344218 Feb 08 06:06:12 PM UTC 25 Feb 08 06:06:14 PM UTC 25 174110379 ps
T1246 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.3308354266 Feb 08 06:05:36 PM UTC 25 Feb 08 06:06:15 PM UTC 25 3636111302 ps