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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.44 98.11 95.91 97.44 87.30 98.22 98.17 92.94


Total test records in report: 3732
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T2439 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3184864560 Feb 08 06:14:08 PM UTC 25 Feb 08 06:14:11 PM UTC 25 171406748 ps
T2440 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2564605478 Feb 08 06:14:08 PM UTC 25 Feb 08 06:14:11 PM UTC 25 257783508 ps
T2441 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1541643512 Feb 08 06:13:24 PM UTC 25 Feb 08 06:14:11 PM UTC 25 1821784247 ps
T2442 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1893205195 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:12 PM UTC 25 146452032 ps
T2443 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.3246824551 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:12 PM UTC 25 182867474 ps
T2444 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.339751499 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:12 PM UTC 25 180422129 ps
T2445 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.2195171704 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:13 PM UTC 25 176528963 ps
T2446 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2552484329 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:13 PM UTC 25 260974108 ps
T2447 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.572153440 Feb 08 06:14:15 PM UTC 25 Feb 08 06:14:18 PM UTC 25 563003124 ps
T2448 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.4026088233 Feb 08 06:16:29 PM UTC 25 Feb 08 06:16:32 PM UTC 25 274029600 ps
T2449 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3219742672 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:14 PM UTC 25 99978089 ps
T2450 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.993468507 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:15 PM UTC 25 212301123 ps
T2451 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.3982728007 Feb 08 06:13:33 PM UTC 25 Feb 08 06:14:15 PM UTC 25 29619961369 ps
T2452 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.3160258757 Feb 08 06:13:55 PM UTC 25 Feb 08 06:14:16 PM UTC 25 693853652 ps
T2453 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.1398990744 Feb 08 06:13:51 PM UTC 25 Feb 08 06:14:16 PM UTC 25 9696389001 ps
T2454 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3861068798 Feb 08 06:14:13 PM UTC 25 Feb 08 06:14:16 PM UTC 25 149789356 ps
T2455 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.753352811 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:16 PM UTC 25 532365451 ps
T2456 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1230290570 Feb 08 06:13:36 PM UTC 25 Feb 08 06:14:16 PM UTC 25 1703189409 ps
T2457 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.4246736920 Feb 08 06:14:13 PM UTC 25 Feb 08 06:14:17 PM UTC 25 364515437 ps
T2458 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.3373768175 Feb 08 06:14:13 PM UTC 25 Feb 08 06:14:17 PM UTC 25 478170997 ps
T2459 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.69735493 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:17 PM UTC 25 842118127 ps
T2460 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.4271904826 Feb 08 06:14:15 PM UTC 25 Feb 08 06:14:17 PM UTC 25 162046810 ps
T2461 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3672195854 Feb 08 06:14:01 PM UTC 25 Feb 08 06:14:17 PM UTC 25 1598022930 ps
T2462 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.597010870 Feb 08 06:13:17 PM UTC 25 Feb 08 06:14:17 PM UTC 25 32956377362 ps
T2463 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_enable.2215772764 Feb 08 06:14:16 PM UTC 25 Feb 08 06:14:18 PM UTC 25 63529632 ps
T2464 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.2791480942 Feb 08 06:12:48 PM UTC 25 Feb 08 06:14:18 PM UTC 25 2792502806 ps
T2465 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.400514997 Feb 08 06:14:02 PM UTC 25 Feb 08 06:14:19 PM UTC 25 1880836416 ps
T2466 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.4145273859 Feb 08 06:14:13 PM UTC 25 Feb 08 06:14:19 PM UTC 25 266898451 ps
T2467 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1366557186 Feb 08 06:13:38 PM UTC 25 Feb 08 06:14:20 PM UTC 25 4241111616 ps
T2468 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.3257667677 Feb 08 06:14:18 PM UTC 25 Feb 08 06:14:20 PM UTC 25 144341887 ps
T2469 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3511196342 Feb 08 06:14:18 PM UTC 25 Feb 08 06:14:20 PM UTC 25 164547656 ps
T2470 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2581951107 Feb 08 06:14:18 PM UTC 25 Feb 08 06:14:20 PM UTC 25 163572265 ps
T430 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.1219334664 Feb 08 06:14:17 PM UTC 25 Feb 08 06:14:21 PM UTC 25 287627611 ps
T2471 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.3685692582 Feb 08 06:14:18 PM UTC 25 Feb 08 06:14:21 PM UTC 25 255676954 ps
T2472 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.3848564810 Feb 08 06:14:16 PM UTC 25 Feb 08 06:14:21 PM UTC 25 1013380234 ps
T2473 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.142504511 Feb 08 06:14:18 PM UTC 25 Feb 08 06:14:21 PM UTC 25 273002331 ps
T2474 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.3983373843 Feb 08 06:14:20 PM UTC 25 Feb 08 06:14:22 PM UTC 25 217572147 ps
T2475 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.2251961532 Feb 08 06:14:20 PM UTC 25 Feb 08 06:14:23 PM UTC 25 270038173 ps
T2476 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.4128337007 Feb 08 06:13:53 PM UTC 25 Feb 08 06:14:23 PM UTC 25 16193100374 ps
T2477 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.1817183088 Feb 08 06:14:21 PM UTC 25 Feb 08 06:14:24 PM UTC 25 168753408 ps
T2478 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.995180073 Feb 08 06:14:21 PM UTC 25 Feb 08 06:14:24 PM UTC 25 182432127 ps
T2479 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.4292858012 Feb 08 06:14:21 PM UTC 25 Feb 08 06:14:24 PM UTC 25 180018648 ps
T2480 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3564595923 Feb 08 06:14:21 PM UTC 25 Feb 08 06:14:24 PM UTC 25 180216954 ps
T2481 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.3825361091 Feb 08 06:14:21 PM UTC 25 Feb 08 06:14:24 PM UTC 25 189801951 ps
T2482 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.3175566641 Feb 08 06:12:29 PM UTC 25 Feb 08 06:14:24 PM UTC 25 9619600410 ps
T2483 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.4280913850 Feb 08 06:14:23 PM UTC 25 Feb 08 06:14:25 PM UTC 25 149486171 ps
T2484 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.1189815448 Feb 08 06:14:22 PM UTC 25 Feb 08 06:14:25 PM UTC 25 182099007 ps
T2485 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.2697283609 Feb 08 06:14:23 PM UTC 25 Feb 08 06:14:25 PM UTC 25 174040349 ps
T2486 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.2718625780 Feb 08 06:13:41 PM UTC 25 Feb 08 06:14:25 PM UTC 25 23184792214 ps
T2487 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.1381573492 Feb 08 06:14:23 PM UTC 25 Feb 08 06:14:25 PM UTC 25 239486341 ps
T2488 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.2465477585 Feb 08 06:14:24 PM UTC 25 Feb 08 06:14:26 PM UTC 25 35218282 ps
T2489 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.2856497506 Feb 08 06:12:58 PM UTC 25 Feb 08 06:14:26 PM UTC 25 40071947772 ps
T2490 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.1048505888 Feb 08 06:13:35 PM UTC 25 Feb 08 06:14:27 PM UTC 25 29026372995 ps
T2491 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.2634859137 Feb 08 06:14:24 PM UTC 25 Feb 08 06:14:27 PM UTC 25 187821136 ps
T2492 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.1096069995 Feb 08 06:14:24 PM UTC 25 Feb 08 06:14:27 PM UTC 25 230952498 ps
T2493 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.828148481 Feb 08 06:13:31 PM UTC 25 Feb 08 06:14:27 PM UTC 25 2097084294 ps
T2494 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1009656794 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:28 PM UTC 25 153031699 ps
T2495 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2989880444 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:28 PM UTC 25 193421001 ps
T2496 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1202549190 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:28 PM UTC 25 239173746 ps
T2497 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.3904741738 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:28 PM UTC 25 173016763 ps
T298 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.577360440 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:29 PM UTC 25 291643702 ps
T2498 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3839994898 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:29 PM UTC 25 237060106 ps
T2499 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.3513936089 Feb 08 06:14:26 PM UTC 25 Feb 08 06:14:29 PM UTC 25 201829637 ps
T2500 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4161988765 Feb 08 06:14:19 PM UTC 25 Feb 08 06:14:29 PM UTC 25 4695270258 ps
T2501 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.395460698 Feb 08 06:14:10 PM UTC 25 Feb 08 06:14:29 PM UTC 25 1896552184 ps
T2502 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1397820724 Feb 08 06:16:27 PM UTC 25 Feb 08 06:16:32 PM UTC 25 190975674 ps
T2503 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.300226384 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:30 PM UTC 25 161974023 ps
T2504 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.2113980852 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:31 PM UTC 25 34275038 ps
T2505 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.554426464 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:31 PM UTC 25 178007603 ps
T2506 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.1531668776 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:31 PM UTC 25 13718322972 ps
T2507 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.778008101 Feb 08 06:13:03 PM UTC 25 Feb 08 06:14:32 PM UTC 25 2894034391 ps
T2508 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.404602483 Feb 08 06:14:30 PM UTC 25 Feb 08 06:14:32 PM UTC 25 146737721 ps
T2509 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.4149517810 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:32 PM UTC 25 580199065 ps
T2510 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.1833024597 Feb 08 06:14:30 PM UTC 25 Feb 08 06:14:32 PM UTC 25 226314662 ps
T2511 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.2705789797 Feb 08 06:14:30 PM UTC 25 Feb 08 06:14:33 PM UTC 25 312927930 ps
T2512 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2931092045 Feb 08 06:14:30 PM UTC 25 Feb 08 06:14:33 PM UTC 25 538651631 ps
T2513 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1459597224 Feb 08 06:14:31 PM UTC 25 Feb 08 06:14:34 PM UTC 25 46407498 ps
T2514 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.3039156496 Feb 08 06:14:31 PM UTC 25 Feb 08 06:14:34 PM UTC 25 159267050 ps
T2515 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.23132754 Feb 08 06:14:31 PM UTC 25 Feb 08 06:14:34 PM UTC 25 199422434 ps
T2516 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.3764128850 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:34 PM UTC 25 6203842684 ps
T2517 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3465780477 Feb 08 06:13:53 PM UTC 25 Feb 08 06:14:34 PM UTC 25 25948389582 ps
T2518 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.3541793156 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:34 PM UTC 25 1158771890 ps
T2519 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.1312435061 Feb 08 06:14:31 PM UTC 25 Feb 08 06:14:35 PM UTC 25 704804723 ps
T2520 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.1368742740 Feb 08 06:13:59 PM UTC 25 Feb 08 06:14:35 PM UTC 25 4998677537 ps
T461 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3045693275 Feb 08 06:14:33 PM UTC 25 Feb 08 06:14:35 PM UTC 25 197623204 ps
T2521 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.1988970851 Feb 08 06:14:33 PM UTC 25 Feb 08 06:14:35 PM UTC 25 164394257 ps
T2522 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.218878685 Feb 08 06:14:33 PM UTC 25 Feb 08 06:14:35 PM UTC 25 142375939 ps
T2523 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.1283183320 Feb 08 06:14:33 PM UTC 25 Feb 08 06:14:36 PM UTC 25 247748929 ps
T2524 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2014535027 Feb 08 06:13:41 PM UTC 25 Feb 08 06:14:36 PM UTC 25 4768541672 ps
T2525 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3710248662 Feb 08 06:14:34 PM UTC 25 Feb 08 06:14:37 PM UTC 25 257206351 ps
T2526 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.3667855467 Feb 08 06:14:34 PM UTC 25 Feb 08 06:14:37 PM UTC 25 224321726 ps
T2527 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2107738159 Feb 08 06:14:33 PM UTC 25 Feb 08 06:14:37 PM UTC 25 907296304 ps
T147 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.369545325 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:39 PM UTC 25 207428507 ps
T2528 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.459534254 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:39 PM UTC 25 185653136 ps
T2529 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2702906437 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:39 PM UTC 25 161789217 ps
T2530 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.1212253590 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:39 PM UTC 25 192153497 ps
T2531 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.3218347957 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:39 PM UTC 25 260433375 ps
T2532 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.2969251981 Feb 08 06:14:38 PM UTC 25 Feb 08 06:14:40 PM UTC 25 218232595 ps
T2533 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.3372459743 Feb 08 06:14:37 PM UTC 25 Feb 08 06:14:40 PM UTC 25 184305691 ps
T2534 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.3986562904 Feb 08 06:14:38 PM UTC 25 Feb 08 06:14:40 PM UTC 25 177551125 ps
T2535 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.2232672345 Feb 08 06:14:37 PM UTC 25 Feb 08 06:14:40 PM UTC 25 163157138 ps
T2536 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.106580820 Feb 08 06:14:39 PM UTC 25 Feb 08 06:14:41 PM UTC 25 221129117 ps
T2537 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2746683253 Feb 08 06:14:19 PM UTC 25 Feb 08 06:14:41 PM UTC 25 2415587287 ps
T2538 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.2362898116 Feb 08 06:15:39 PM UTC 25 Feb 08 06:16:32 PM UTC 25 19035611285 ps
T2539 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1865678489 Feb 08 06:14:28 PM UTC 25 Feb 08 06:14:41 PM UTC 25 9300291508 ps
T2540 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.1328462789 Feb 08 06:14:01 PM UTC 25 Feb 08 06:14:42 PM UTC 25 4661504239 ps
T2541 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2245147247 Feb 08 06:14:40 PM UTC 25 Feb 08 06:14:42 PM UTC 25 43026649 ps
T2542 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.4249378872 Feb 08 06:14:40 PM UTC 25 Feb 08 06:14:42 PM UTC 25 222735112 ps
T2543 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.3961584859 Feb 08 06:14:40 PM UTC 25 Feb 08 06:14:43 PM UTC 25 143570537 ps
T2544 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.2618081901 Feb 08 06:13:30 PM UTC 25 Feb 08 06:14:43 PM UTC 25 2677055180 ps
T2545 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.80939136 Feb 08 06:14:40 PM UTC 25 Feb 08 06:14:43 PM UTC 25 210845401 ps
T2546 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.1247390075 Feb 08 06:14:42 PM UTC 25 Feb 08 06:14:44 PM UTC 25 159189238 ps
T2547 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.2583157960 Feb 08 06:14:42 PM UTC 25 Feb 08 06:14:44 PM UTC 25 146314862 ps
T2548 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.154262517 Feb 08 06:14:14 PM UTC 25 Feb 08 06:14:44 PM UTC 25 4248085158 ps
T2549 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.42765325 Feb 08 06:14:42 PM UTC 25 Feb 08 06:14:44 PM UTC 25 220344789 ps
T2550 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.2972711012 Feb 08 06:14:42 PM UTC 25 Feb 08 06:14:45 PM UTC 25 398843255 ps
T2551 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3386814617 Feb 08 06:14:42 PM UTC 25 Feb 08 06:14:45 PM UTC 25 263948472 ps
T2552 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.209155065 Feb 08 06:14:07 PM UTC 25 Feb 08 06:14:46 PM UTC 25 13596768276 ps
T2553 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.1403970038 Feb 08 06:14:43 PM UTC 25 Feb 08 06:14:46 PM UTC 25 154285673 ps
T2554 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1865421505 Feb 08 06:14:43 PM UTC 25 Feb 08 06:14:46 PM UTC 25 185044773 ps
T2555 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.1399220848 Feb 08 06:14:43 PM UTC 25 Feb 08 06:14:46 PM UTC 25 149068941 ps
T2556 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.375781725 Feb 08 06:14:43 PM UTC 25 Feb 08 06:14:46 PM UTC 25 252831324 ps
T2557 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.4086712671 Feb 08 06:14:13 PM UTC 25 Feb 08 06:15:08 PM UTC 25 28342813299 ps
T2558 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.552488523 Feb 08 06:14:45 PM UTC 25 Feb 08 06:14:47 PM UTC 25 54687987 ps
T2559 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.346066842 Feb 08 06:14:20 PM UTC 25 Feb 08 06:14:48 PM UTC 25 2721683068 ps
T2560 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3676381612 Feb 08 06:14:45 PM UTC 25 Feb 08 06:14:48 PM UTC 25 465998507 ps
T2561 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.859208036 Feb 08 06:14:47 PM UTC 25 Feb 08 06:14:49 PM UTC 25 146188832 ps
T2562 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3714255160 Feb 08 06:14:47 PM UTC 25 Feb 08 06:14:50 PM UTC 25 157907071 ps
T2563 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.154509068 Feb 08 06:14:43 PM UTC 25 Feb 08 06:14:50 PM UTC 25 1144415100 ps
T2564 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.1931643510 Feb 08 06:14:31 PM UTC 25 Feb 08 06:14:51 PM UTC 25 1999079951 ps
T2565 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.2724618513 Feb 08 06:14:47 PM UTC 25 Feb 08 06:14:51 PM UTC 25 510870460 ps
T2566 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3736393702 Feb 08 06:14:48 PM UTC 25 Feb 08 06:14:51 PM UTC 25 149107445 ps
T2567 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1371461265 Feb 08 06:14:47 PM UTC 25 Feb 08 06:14:51 PM UTC 25 461365818 ps
T2568 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3419133202 Feb 08 06:14:50 PM UTC 25 Feb 08 06:14:52 PM UTC 25 61656531 ps
T2569 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.3654678842 Feb 08 06:13:42 PM UTC 25 Feb 08 06:14:52 PM UTC 25 2418458369 ps
T2570 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.325620811 Feb 08 06:14:48 PM UTC 25 Feb 08 06:14:53 PM UTC 25 986473963 ps
T2571 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.1574224678 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:54 PM UTC 25 9831088997 ps
T2572 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.2296828775 Feb 08 06:14:00 PM UTC 25 Feb 08 06:14:54 PM UTC 25 31968142236 ps
T2573 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.4240969822 Feb 08 06:13:46 PM UTC 25 Feb 08 06:14:54 PM UTC 25 22570685721 ps
T2574 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.111599617 Feb 08 06:12:45 PM UTC 25 Feb 08 06:14:54 PM UTC 25 4183290588 ps
T2575 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.4290697583 Feb 08 06:14:52 PM UTC 25 Feb 08 06:14:55 PM UTC 25 138874771 ps
T2576 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.779563044 Feb 08 06:14:52 PM UTC 25 Feb 08 06:14:55 PM UTC 25 264193476 ps
T2577 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.807254683 Feb 08 06:14:29 PM UTC 25 Feb 08 06:14:55 PM UTC 25 14033597353 ps
T387 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3482240939 Feb 08 06:14:51 PM UTC 25 Feb 08 06:14:55 PM UTC 25 770961337 ps
T2578 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.330541893 Feb 08 06:14:52 PM UTC 25 Feb 08 06:14:55 PM UTC 25 216844623 ps
T2579 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.2150023555 Feb 08 06:13:05 PM UTC 25 Feb 08 06:14:55 PM UTC 25 3837977030 ps
T2580 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.1571870882 Feb 08 06:14:40 PM UTC 25 Feb 08 06:15:08 PM UTC 25 7883816156 ps
T2581 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.482337738 Feb 08 06:14:51 PM UTC 25 Feb 08 06:14:56 PM UTC 25 464741515 ps
T2582 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.3121812328 Feb 08 06:14:54 PM UTC 25 Feb 08 06:14:56 PM UTC 25 243142024 ps
T2583 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.2919510253 Feb 08 06:14:51 PM UTC 25 Feb 08 06:14:56 PM UTC 25 847216150 ps
T2584 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1308772565 Feb 08 06:14:12 PM UTC 25 Feb 08 06:14:57 PM UTC 25 29455127615 ps
T2585 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.362437974 Feb 08 06:14:36 PM UTC 25 Feb 08 06:14:57 PM UTC 25 2364016297 ps
T2586 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.842039298 Feb 08 06:14:56 PM UTC 25 Feb 08 06:14:59 PM UTC 25 163616623 ps
T2587 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.1669331376 Feb 08 06:14:56 PM UTC 25 Feb 08 06:14:59 PM UTC 25 198901948 ps
T2588 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.2050693981 Feb 08 06:14:56 PM UTC 25 Feb 08 06:14:59 PM UTC 25 166066627 ps
T2589 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.3251546060 Feb 08 06:14:56 PM UTC 25 Feb 08 06:14:59 PM UTC 25 215085879 ps
T2590 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1096234475 Feb 08 06:14:56 PM UTC 25 Feb 08 06:14:59 PM UTC 25 239121814 ps
T2591 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.189777077 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:00 PM UTC 25 142995129 ps
T2592 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.2295512783 Feb 08 06:13:41 PM UTC 25 Feb 08 06:15:00 PM UTC 25 2595281500 ps
T2593 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.3136468777 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:01 PM UTC 25 141073509 ps
T2594 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1697573631 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:01 PM UTC 25 154374393 ps
T2595 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.1553873001 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:01 PM UTC 25 192700669 ps
T2596 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.428339350 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:01 PM UTC 25 197454391 ps
T2597 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2236493519 Feb 08 06:14:58 PM UTC 25 Feb 08 06:15:01 PM UTC 25 216477096 ps
T2598 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1087717371 Feb 08 06:15:00 PM UTC 25 Feb 08 06:15:03 PM UTC 25 93518655 ps
T2599 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.856336714 Feb 08 06:15:00 PM UTC 25 Feb 08 06:15:03 PM UTC 25 180721573 ps
T2600 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.148634056 Feb 08 06:14:18 PM UTC 25 Feb 08 06:15:03 PM UTC 25 24253908407 ps
T2601 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.891677848 Feb 08 06:15:00 PM UTC 25 Feb 08 06:15:03 PM UTC 25 194011866 ps
T2602 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.2443106640 Feb 08 06:14:45 PM UTC 25 Feb 08 06:15:04 PM UTC 25 5943417091 ps
T2603 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2591392478 Feb 08 06:15:00 PM UTC 25 Feb 08 06:15:04 PM UTC 25 256613408 ps
T2604 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.3727400637 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:04 PM UTC 25 175989234 ps
T2605 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.537298343 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:05 PM UTC 25 229999123 ps
T2606 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.3135908044 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:05 PM UTC 25 171191689 ps
T2607 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.3378135953 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:05 PM UTC 25 158374829 ps
T2608 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.11054494 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:05 PM UTC 25 214577341 ps
T299 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.939959236 Feb 08 06:15:02 PM UTC 25 Feb 08 06:15:05 PM UTC 25 253335359 ps
T2609 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.372295853 Feb 08 06:13:53 PM UTC 25 Feb 08 06:15:06 PM UTC 25 39572839390 ps
T2610 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.691830776 Feb 08 06:15:03 PM UTC 25 Feb 08 06:15:06 PM UTC 25 212988456 ps
T2611 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.1685428525 Feb 08 06:15:03 PM UTC 25 Feb 08 06:15:06 PM UTC 25 202381777 ps
T2612 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.4116342964 Feb 08 06:13:03 PM UTC 25 Feb 08 06:15:07 PM UTC 25 4094318379 ps
T2613 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.4256488951 Feb 08 06:16:02 PM UTC 25 Feb 08 06:16:04 PM UTC 25 153140304 ps
T2614 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.4070681384 Feb 08 06:15:05 PM UTC 25 Feb 08 06:15:07 PM UTC 25 51969316 ps
T185 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.1420194679 Feb 08 06:15:05 PM UTC 25 Feb 08 06:15:08 PM UTC 25 467817054 ps
T2615 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.3874901969 Feb 08 06:15:07 PM UTC 25 Feb 08 06:15:10 PM UTC 25 156003325 ps
T2616 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1889792897 Feb 08 06:15:07 PM UTC 25 Feb 08 06:15:10 PM UTC 25 145938823 ps
T2617 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.821669809 Feb 08 06:15:07 PM UTC 25 Feb 08 06:15:10 PM UTC 25 235926482 ps
T2618 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3703919903 Feb 08 06:14:24 PM UTC 25 Feb 08 06:15:10 PM UTC 25 16743891725 ps
T2619 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.383561661 Feb 08 06:14:56 PM UTC 25 Feb 08 06:15:11 PM UTC 25 8636323028 ps
T2620 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.3336147245 Feb 08 06:14:30 PM UTC 25 Feb 08 06:15:11 PM UTC 25 24865350408 ps
T2621 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.4116861873 Feb 08 06:15:07 PM UTC 25 Feb 08 06:15:12 PM UTC 25 949381903 ps
T2622 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.788756493 Feb 08 06:15:05 PM UTC 25 Feb 08 06:15:12 PM UTC 25 1323595048 ps
T2623 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_enable.3420238541 Feb 08 06:15:09 PM UTC 25 Feb 08 06:15:12 PM UTC 25 36344815 ps
T2624 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.3552752121 Feb 08 06:14:43 PM UTC 25 Feb 08 06:15:12 PM UTC 25 2620077775 ps
T2625 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.3524447902 Feb 08 06:15:09 PM UTC 25 Feb 08 06:15:12 PM UTC 25 152822966 ps
T2626 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.860560407 Feb 08 06:15:09 PM UTC 25 Feb 08 06:15:12 PM UTC 25 528153516 ps
T465 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.4184231072 Feb 08 06:15:11 PM UTC 25 Feb 08 06:15:14 PM UTC 25 738721547 ps
T2627 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.597194520 Feb 08 06:15:11 PM UTC 25 Feb 08 06:15:15 PM UTC 25 230192988 ps
T2628 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.2078314488 Feb 08 06:15:09 PM UTC 25 Feb 08 06:15:15 PM UTC 25 998627243 ps
T2629 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.335147779 Feb 08 06:15:13 PM UTC 25 Feb 08 06:15:16 PM UTC 25 151188948 ps
T2630 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.662649827 Feb 08 06:15:13 PM UTC 25 Feb 08 06:15:16 PM UTC 25 168011104 ps
T2631 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.1095443621 Feb 08 06:15:13 PM UTC 25 Feb 08 06:15:16 PM UTC 25 238730578 ps
T2632 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.2065128278 Feb 08 06:15:13 PM UTC 25 Feb 08 06:15:16 PM UTC 25 214976460 ps
T2633 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2034598841 Feb 08 06:14:33 PM UTC 25 Feb 08 06:15:16 PM UTC 25 5148992730 ps
T2634 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.2270019963 Feb 08 06:15:14 PM UTC 25 Feb 08 06:15:17 PM UTC 25 262651799 ps
T2635 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2869308912 Feb 08 06:14:30 PM UTC 25 Feb 08 06:15:18 PM UTC 25 26114600304 ps
T2636 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.1873160244 Feb 08 06:15:16 PM UTC 25 Feb 08 06:15:18 PM UTC 25 192051304 ps
T2637 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.3313952346 Feb 08 06:14:45 PM UTC 25 Feb 08 06:15:18 PM UTC 25 21179032573 ps
T2638 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.1369204508 Feb 08 06:14:20 PM UTC 25 Feb 08 06:15:18 PM UTC 25 2092893976 ps
T2639 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.178633933 Feb 08 06:15:17 PM UTC 25 Feb 08 06:15:20 PM UTC 25 215379241 ps
T2640 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.990903780 Feb 08 06:15:17 PM UTC 25 Feb 08 06:15:20 PM UTC 25 159708542 ps
T2641 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.2024627201 Feb 08 06:15:17 PM UTC 25 Feb 08 06:15:20 PM UTC 25 154602170 ps
T2642 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.2740318547 Feb 08 06:15:17 PM UTC 25 Feb 08 06:15:20 PM UTC 25 150584719 ps
T2643 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2132800455 Feb 08 06:14:26 PM UTC 25 Feb 08 06:15:20 PM UTC 25 1927961509 ps
T2644 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.2253661287 Feb 08 06:15:19 PM UTC 25 Feb 08 06:15:22 PM UTC 25 144393741 ps
T2645 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.3440565245 Feb 08 06:15:19 PM UTC 25 Feb 08 06:15:22 PM UTC 25 154083177 ps
T2646 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.1324503104 Feb 08 06:15:19 PM UTC 25 Feb 08 06:15:22 PM UTC 25 190535462 ps
T2647 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.15763443 Feb 08 06:15:19 PM UTC 25 Feb 08 06:15:22 PM UTC 25 147170952 ps
T2648 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.236597353 Feb 08 06:15:05 PM UTC 25 Feb 08 06:15:22 PM UTC 25 2119531240 ps
T2649 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.2122831713 Feb 08 06:14:52 PM UTC 25 Feb 08 06:15:22 PM UTC 25 3840468940 ps
T2650 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.3956575738 Feb 08 06:15:19 PM UTC 25 Feb 08 06:15:23 PM UTC 25 299537751 ps
T2651 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2732239482 Feb 08 06:15:20 PM UTC 25 Feb 08 06:15:23 PM UTC 25 40154212 ps
T2652 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1077961518 Feb 08 06:15:07 PM UTC 25 Feb 08 06:15:23 PM UTC 25 4803327608 ps
T2653 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.1048278892 Feb 08 06:15:21 PM UTC 25 Feb 08 06:15:23 PM UTC 25 189238690 ps
T2654 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.598958155 Feb 08 06:15:21 PM UTC 25 Feb 08 06:15:23 PM UTC 25 186416419 ps
T2655 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.293655918 Feb 08 06:15:21 PM UTC 25 Feb 08 06:15:24 PM UTC 25 185751478 ps
T2656 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.1192964045 Feb 08 06:15:22 PM UTC 25 Feb 08 06:15:24 PM UTC 25 168614392 ps
T2657 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2259219906 Feb 08 06:14:47 PM UTC 25 Feb 08 06:15:26 PM UTC 25 5691699809 ps
T2658 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.4231376631 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:26 PM UTC 25 210301185 ps
T2659 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.1284730813 Feb 08 06:15:23 PM UTC 25 Feb 08 06:15:26 PM UTC 25 154863617 ps
T2660 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.179940590 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:26 PM UTC 25 173155656 ps
T2661 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.2184964292 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:26 PM UTC 25 147821462 ps
T2662 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.2596966987 Feb 08 06:14:56 PM UTC 25 Feb 08 06:15:26 PM UTC 25 3077175579 ps
T2663 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.261597342 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:26 PM UTC 25 342264782 ps
T2664 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.382876299 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:26 PM UTC 25 174875341 ps
T2665 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.206052864 Feb 08 06:15:24 PM UTC 25 Feb 08 06:15:27 PM UTC 25 183762008 ps
T2666 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.1090102812 Feb 08 06:15:27 PM UTC 25 Feb 08 06:16:04 PM UTC 25 4891174938 ps
T2667 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.4011790412 Feb 08 06:14:28 PM UTC 25 Feb 08 06:15:27 PM UTC 25 2140487702 ps
T2668 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.55574783 Feb 08 06:15:25 PM UTC 25 Feb 08 06:15:27 PM UTC 25 62276316 ps
T2669 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2918758238 Feb 08 06:15:25 PM UTC 25 Feb 08 06:15:28 PM UTC 25 252028541 ps
T2670 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3311819258 Feb 08 06:14:48 PM UTC 25 Feb 08 06:15:28 PM UTC 25 5700657765 ps
T2671 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.471181349 Feb 08 06:15:25 PM UTC 25 Feb 08 06:15:29 PM UTC 25 627220152 ps
T2672 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.1072100565 Feb 08 06:14:54 PM UTC 25 Feb 08 06:15:29 PM UTC 25 25207726061 ps
T2673 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.2953081051 Feb 08 06:15:27 PM UTC 25 Feb 08 06:15:29 PM UTC 25 140039794 ps
T2674 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.1153104711 Feb 08 06:15:27 PM UTC 25 Feb 08 06:15:30 PM UTC 25 159342481 ps
T2675 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.1079425815 Feb 08 06:15:27 PM UTC 25 Feb 08 06:15:30 PM UTC 25 158236179 ps
T2676 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_enable.310187921 Feb 08 06:15:29 PM UTC 25 Feb 08 06:15:31 PM UTC 25 35373508 ps
T2677 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.1680129794 Feb 08 06:15:29 PM UTC 25 Feb 08 06:15:31 PM UTC 25 149997518 ps
T2678 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.3719105496 Feb 08 06:14:47 PM UTC 25 Feb 08 06:15:32 PM UTC 25 23076004584 ps
T2679 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.2656742535 Feb 08 06:15:13 PM UTC 25 Feb 08 06:15:32 PM UTC 25 11354931406 ps
T2680 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1429901759 Feb 08 06:14:36 PM UTC 25 Feb 08 06:15:32 PM UTC 25 2080114376 ps