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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.44 98.11 95.91 97.44 87.30 98.22 98.17 92.94


Total test records in report: 3732
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T1479 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.2958548816 Feb 08 06:08:04 PM UTC 25 Feb 08 06:08:07 PM UTC 25 147224400 ps
T1480 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.2047067441 Feb 08 06:07:50 PM UTC 25 Feb 08 06:08:07 PM UTC 25 5436200137 ps
T240 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1851603689 Feb 08 06:08:04 PM UTC 25 Feb 08 06:08:08 PM UTC 25 582354417 ps
T1481 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.3241153756 Feb 08 06:08:04 PM UTC 25 Feb 08 06:08:08 PM UTC 25 323374041 ps
T1482 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2408613446 Feb 08 06:07:45 PM UTC 25 Feb 08 06:08:08 PM UTC 25 739666995 ps
T1483 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2818008009 Feb 08 06:08:06 PM UTC 25 Feb 08 06:08:08 PM UTC 25 42522759 ps
T1484 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.335731590 Feb 08 06:07:53 PM UTC 25 Feb 08 06:08:08 PM UTC 25 1895914970 ps
T1485 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.2134932067 Feb 08 06:06:35 PM UTC 25 Feb 08 06:08:09 PM UTC 25 3314932246 ps
T1486 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.2108853756 Feb 08 06:08:07 PM UTC 25 Feb 08 06:08:09 PM UTC 25 144343636 ps
T1487 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.1029519648 Feb 08 06:06:03 PM UTC 25 Feb 08 06:08:09 PM UTC 25 4462282700 ps
T273 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.1896671204 Feb 08 06:07:08 PM UTC 25 Feb 08 06:08:10 PM UTC 25 21299597013 ps
T1488 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.1657438096 Feb 08 06:08:08 PM UTC 25 Feb 08 06:08:11 PM UTC 25 170241152 ps
T1489 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.1731494257 Feb 08 06:08:08 PM UTC 25 Feb 08 06:08:11 PM UTC 25 167815382 ps
T1490 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_enable.3157337437 Feb 08 06:08:10 PM UTC 25 Feb 08 06:08:12 PM UTC 25 48592811 ps
T1491 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.3677578312 Feb 08 06:08:10 PM UTC 25 Feb 08 06:08:12 PM UTC 25 144809005 ps
T1492 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.2344437818 Feb 08 06:08:10 PM UTC 25 Feb 08 06:08:13 PM UTC 25 562631305 ps
T360 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.1824051004 Feb 08 06:08:10 PM UTC 25 Feb 08 06:08:13 PM UTC 25 753365829 ps
T1493 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.706658002 Feb 08 06:08:08 PM UTC 25 Feb 08 06:08:13 PM UTC 25 871798459 ps
T1494 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.39530518 Feb 08 06:08:10 PM UTC 25 Feb 08 06:08:14 PM UTC 25 776207170 ps
T1495 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3522211580 Feb 08 06:06:31 PM UTC 25 Feb 08 06:08:15 PM UTC 25 9266468280 ps
T1496 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.851415235 Feb 08 06:08:12 PM UTC 25 Feb 08 06:08:15 PM UTC 25 297201511 ps
T1497 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.3210929669 Feb 08 06:08:13 PM UTC 25 Feb 08 06:08:16 PM UTC 25 162492342 ps
T1498 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.82566817 Feb 08 06:07:35 PM UTC 25 Feb 08 06:08:16 PM UTC 25 20164419995 ps
T1499 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.1560428509 Feb 08 06:08:13 PM UTC 25 Feb 08 06:08:16 PM UTC 25 199105659 ps
T1500 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.2847187703 Feb 08 06:07:53 PM UTC 25 Feb 08 06:08:16 PM UTC 25 2685157446 ps
T1501 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.3182688724 Feb 08 06:08:12 PM UTC 25 Feb 08 06:08:17 PM UTC 25 313323577 ps
T1502 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.1811586682 Feb 08 06:07:47 PM UTC 25 Feb 08 06:08:17 PM UTC 25 3622150798 ps
T1503 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1953247161 Feb 08 06:08:14 PM UTC 25 Feb 08 06:08:17 PM UTC 25 200862076 ps
T1504 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.649225821 Feb 08 06:07:26 PM UTC 25 Feb 08 06:08:17 PM UTC 25 4253564341 ps
T1505 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.1030854733 Feb 08 06:08:06 PM UTC 25 Feb 08 06:08:19 PM UTC 25 8958850830 ps
T1506 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.2659142101 Feb 08 06:08:17 PM UTC 25 Feb 08 06:08:20 PM UTC 25 180445402 ps
T1507 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.4198947504 Feb 08 06:08:18 PM UTC 25 Feb 08 06:08:20 PM UTC 25 191376585 ps
T1508 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2239939273 Feb 08 06:08:18 PM UTC 25 Feb 08 06:08:20 PM UTC 25 183359512 ps
T1509 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.2140919114 Feb 08 06:08:17 PM UTC 25 Feb 08 06:08:20 PM UTC 25 246922286 ps
T1510 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.3401813149 Feb 08 06:08:04 PM UTC 25 Feb 08 06:08:21 PM UTC 25 1564074221 ps
T1511 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.2577679485 Feb 08 06:08:19 PM UTC 25 Feb 08 06:08:22 PM UTC 25 193604031 ps
T132 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3608471353 Feb 08 06:08:19 PM UTC 25 Feb 08 06:08:22 PM UTC 25 190056724 ps
T1512 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2423114746 Feb 08 06:08:20 PM UTC 25 Feb 08 06:08:22 PM UTC 25 198889542 ps
T1513 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.4096359973 Feb 08 06:08:21 PM UTC 25 Feb 08 06:08:24 PM UTC 25 175627635 ps
T1514 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2178566262 Feb 08 06:08:21 PM UTC 25 Feb 08 06:08:24 PM UTC 25 164519563 ps
T1515 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.4143243260 Feb 08 06:08:21 PM UTC 25 Feb 08 06:08:24 PM UTC 25 150132107 ps
T1516 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1630820521 Feb 08 06:08:21 PM UTC 25 Feb 08 06:08:24 PM UTC 25 196085047 ps
T1517 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3181005679 Feb 08 06:08:09 PM UTC 25 Feb 08 06:08:25 PM UTC 25 748456975 ps
T1518 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.2702766236 Feb 08 06:08:23 PM UTC 25 Feb 08 06:08:25 PM UTC 25 39512923 ps
T1519 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.3777575896 Feb 08 06:07:01 PM UTC 25 Feb 08 06:08:25 PM UTC 25 2922895364 ps
T1520 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.566678156 Feb 08 06:07:32 PM UTC 25 Feb 08 06:08:25 PM UTC 25 18640347104 ps
T1521 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.17091462 Feb 08 06:08:23 PM UTC 25 Feb 08 06:08:26 PM UTC 25 200776651 ps
T1522 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2215971216 Feb 08 06:08:23 PM UTC 25 Feb 08 06:08:26 PM UTC 25 298327380 ps
T1523 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.550387976 Feb 08 06:08:03 PM UTC 25 Feb 08 06:08:27 PM UTC 25 3102651920 ps
T1524 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.3944172441 Feb 08 06:08:25 PM UTC 25 Feb 08 06:08:28 PM UTC 25 234328989 ps
T1525 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.779043304 Feb 08 06:08:25 PM UTC 25 Feb 08 06:08:28 PM UTC 25 191760589 ps
T1526 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.2309083858 Feb 08 06:08:25 PM UTC 25 Feb 08 06:08:28 PM UTC 25 168772393 ps
T1527 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.2953101104 Feb 08 06:08:07 PM UTC 25 Feb 08 06:08:29 PM UTC 25 14231826191 ps
T1528 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.3184192614 Feb 08 06:08:25 PM UTC 25 Feb 08 06:08:29 PM UTC 25 403399539 ps
T1529 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2998074577 Feb 08 06:08:27 PM UTC 25 Feb 08 06:08:30 PM UTC 25 178688477 ps
T1530 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.2854291649 Feb 08 06:08:27 PM UTC 25 Feb 08 06:08:30 PM UTC 25 213243581 ps
T1531 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2705255111 Feb 08 06:08:27 PM UTC 25 Feb 08 06:08:30 PM UTC 25 214532180 ps
T1532 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1624250436 Feb 08 06:08:27 PM UTC 25 Feb 08 06:08:30 PM UTC 25 173592547 ps
T1533 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.4293288886 Feb 08 06:08:27 PM UTC 25 Feb 08 06:08:30 PM UTC 25 276104812 ps
T1534 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.4275618837 Feb 08 06:08:29 PM UTC 25 Feb 08 06:08:32 PM UTC 25 405257327 ps
T1535 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3690029348 Feb 08 06:08:30 PM UTC 25 Feb 08 06:08:32 PM UTC 25 31599171 ps
T1536 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.3351368474 Feb 08 06:08:29 PM UTC 25 Feb 08 06:08:33 PM UTC 25 438033915 ps
T1537 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3245455472 Feb 08 06:06:50 PM UTC 25 Feb 08 06:08:33 PM UTC 25 47173877046 ps
T1538 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1242532744 Feb 08 06:08:32 PM UTC 25 Feb 08 06:08:34 PM UTC 25 160398036 ps
T1539 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.2966661697 Feb 08 06:08:32 PM UTC 25 Feb 08 06:08:34 PM UTC 25 152097611 ps
T1540 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.2297601555 Feb 08 06:07:51 PM UTC 25 Feb 08 06:08:35 PM UTC 25 4418751085 ps
T1541 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.1216754154 Feb 08 06:07:50 PM UTC 25 Feb 08 06:08:36 PM UTC 25 5934754258 ps
T1542 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.710339343 Feb 08 06:08:32 PM UTC 25 Feb 08 06:08:36 PM UTC 25 463778300 ps
T1543 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.139872184 Feb 08 06:08:32 PM UTC 25 Feb 08 06:08:36 PM UTC 25 669173077 ps
T1544 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.927903895 Feb 08 06:06:55 PM UTC 25 Feb 08 06:08:36 PM UTC 25 12911875449 ps
T1545 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.3934436725 Feb 08 06:08:07 PM UTC 25 Feb 08 06:08:43 PM UTC 25 23296564621 ps
T1546 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.32957692 Feb 08 06:08:41 PM UTC 25 Feb 08 06:08:43 PM UTC 25 192374358 ps
T1547 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.235075454 Feb 08 06:07:43 PM UTC 25 Feb 08 06:08:37 PM UTC 25 31432397773 ps
T1548 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.1490354782 Feb 08 06:08:00 PM UTC 25 Feb 08 06:08:37 PM UTC 25 20161237435 ps
T1549 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_enable.976431300 Feb 08 06:08:35 PM UTC 25 Feb 08 06:08:37 PM UTC 25 46777209 ps
T1550 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.1387815696 Feb 08 06:08:35 PM UTC 25 Feb 08 06:08:37 PM UTC 25 180174520 ps
T1551 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.3717878839 Feb 08 06:08:35 PM UTC 25 Feb 08 06:08:38 PM UTC 25 511076340 ps
T1552 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.1118383682 Feb 08 06:06:47 PM UTC 25 Feb 08 06:08:38 PM UTC 25 4006957617 ps
T1553 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.2473200272 Feb 08 06:08:09 PM UTC 25 Feb 08 06:08:39 PM UTC 25 1292108064 ps
T368 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.3862307008 Feb 08 06:08:36 PM UTC 25 Feb 08 06:08:40 PM UTC 25 668040039 ps
T1554 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2493280771 Feb 08 06:08:38 PM UTC 25 Feb 08 06:08:40 PM UTC 25 177070134 ps
T1555 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.2191520887 Feb 08 06:08:37 PM UTC 25 Feb 08 06:08:40 PM UTC 25 344576414 ps
T1556 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.2987155411 Feb 08 06:08:38 PM UTC 25 Feb 08 06:08:40 PM UTC 25 145453748 ps
T1557 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.3561429557 Feb 08 06:08:38 PM UTC 25 Feb 08 06:08:41 PM UTC 25 211167221 ps
T1558 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.3752404269 Feb 08 06:08:17 PM UTC 25 Feb 08 06:08:41 PM UTC 25 2630253424 ps
T1559 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.3876227609 Feb 08 06:08:38 PM UTC 25 Feb 08 06:08:41 PM UTC 25 259059437 ps
T1560 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.2763706533 Feb 08 06:08:16 PM UTC 25 Feb 08 06:08:41 PM UTC 25 10445055308 ps
T1561 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.1127028402 Feb 08 06:08:36 PM UTC 25 Feb 08 06:08:42 PM UTC 25 697069694 ps
T1562 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.1773283879 Feb 08 06:08:41 PM UTC 25 Feb 08 06:08:43 PM UTC 25 237374588 ps
T1563 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.3272324624 Feb 08 06:08:42 PM UTC 25 Feb 08 06:08:45 PM UTC 25 153160721 ps
T1564 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1196350967 Feb 08 06:08:43 PM UTC 25 Feb 08 06:08:45 PM UTC 25 140018378 ps
T1565 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.333574330 Feb 08 06:08:18 PM UTC 25 Feb 08 06:08:45 PM UTC 25 2488889188 ps
T1566 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.171368321 Feb 08 06:08:43 PM UTC 25 Feb 08 06:08:45 PM UTC 25 247975253 ps
T1567 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.51165217 Feb 08 06:08:43 PM UTC 25 Feb 08 06:08:45 PM UTC 25 189783805 ps
T1568 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.2873927979 Feb 08 06:07:50 PM UTC 25 Feb 08 06:08:45 PM UTC 25 29734476802 ps
T1569 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.883905901 Feb 08 06:08:44 PM UTC 25 Feb 08 06:08:46 PM UTC 25 152194887 ps
T1570 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.1296310148 Feb 08 06:08:44 PM UTC 25 Feb 08 06:08:46 PM UTC 25 151654835 ps
T1571 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2985638184 Feb 08 06:08:44 PM UTC 25 Feb 08 06:08:46 PM UTC 25 180736989 ps
T1572 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.1944129406 Feb 08 06:07:14 PM UTC 25 Feb 08 06:08:47 PM UTC 25 3246996174 ps
T1573 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.4293074243 Feb 08 06:06:58 PM UTC 25 Feb 08 06:08:47 PM UTC 25 3913096882 ps
T1574 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.565377344 Feb 08 06:08:46 PM UTC 25 Feb 08 06:08:49 PM UTC 25 177109176 ps
T1575 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.2143896152 Feb 08 06:08:30 PM UTC 25 Feb 08 06:08:49 PM UTC 25 6877376364 ps
T1576 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.1272798390 Feb 08 06:08:47 PM UTC 25 Feb 08 06:08:49 PM UTC 25 65920136 ps
T1577 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.1628005436 Feb 08 06:08:47 PM UTC 25 Feb 08 06:08:49 PM UTC 25 193244235 ps
T1578 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.1244700855 Feb 08 06:08:46 PM UTC 25 Feb 08 06:08:49 PM UTC 25 238974126 ps
T1579 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.2195791925 Feb 08 06:08:47 PM UTC 25 Feb 08 06:08:49 PM UTC 25 164707353 ps
T1580 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.1320244909 Feb 08 06:08:47 PM UTC 25 Feb 08 06:08:49 PM UTC 25 239201681 ps
T1581 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.344929999 Feb 08 06:08:48 PM UTC 25 Feb 08 06:08:50 PM UTC 25 151247887 ps
T1582 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1206863472 Feb 08 06:08:48 PM UTC 25 Feb 08 06:08:51 PM UTC 25 202879149 ps
T1583 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1248261120 Feb 08 06:08:48 PM UTC 25 Feb 08 06:08:51 PM UTC 25 160112479 ps
T1584 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1514949841 Feb 08 06:08:48 PM UTC 25 Feb 08 06:08:51 PM UTC 25 183774609 ps
T297 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.3790290356 Feb 08 06:08:48 PM UTC 25 Feb 08 06:08:51 PM UTC 25 245879690 ps
T1585 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.3550265491 Feb 08 06:08:39 PM UTC 25 Feb 08 06:08:51 PM UTC 25 4834755742 ps
T1586 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.206478844 Feb 08 06:08:50 PM UTC 25 Feb 08 06:08:52 PM UTC 25 158641697 ps
T1587 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.1895864754 Feb 08 06:08:50 PM UTC 25 Feb 08 06:08:52 PM UTC 25 152567612 ps
T1588 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.2155902329 Feb 08 06:08:16 PM UTC 25 Feb 08 06:08:52 PM UTC 25 3996175199 ps
T1589 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.621146000 Feb 08 06:08:49 PM UTC 25 Feb 08 06:08:52 PM UTC 25 239374043 ps
T274 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3416390787 Feb 08 06:07:59 PM UTC 25 Feb 08 06:08:53 PM UTC 25 20595061650 ps
T1590 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.853242606 Feb 08 06:10:52 PM UTC 25 Feb 08 06:10:54 PM UTC 25 177249638 ps
T1591 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.2430071189 Feb 08 06:08:31 PM UTC 25 Feb 08 06:08:54 PM UTC 25 16255131429 ps
T1592 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.413684567 Feb 08 06:08:29 PM UTC 25 Feb 08 06:08:54 PM UTC 25 2796383565 ps
T1593 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.1085240031 Feb 08 06:08:52 PM UTC 25 Feb 08 06:08:54 PM UTC 25 60051561 ps
T1594 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.576650384 Feb 08 06:08:51 PM UTC 25 Feb 08 06:08:55 PM UTC 25 830817640 ps
T1595 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3279036426 Feb 08 06:08:52 PM UTC 25 Feb 08 06:08:55 PM UTC 25 146550969 ps
T123 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.1296782864 Feb 08 06:08:51 PM UTC 25 Feb 08 06:08:55 PM UTC 25 593520211 ps
T1596 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.1798599841 Feb 08 06:08:52 PM UTC 25 Feb 08 06:08:55 PM UTC 25 146681115 ps
T1597 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.2014488754 Feb 08 06:08:52 PM UTC 25 Feb 08 06:08:55 PM UTC 25 169929464 ps
T1598 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_enable.2164578098 Feb 08 06:08:56 PM UTC 25 Feb 08 06:08:58 PM UTC 25 62398044 ps
T1599 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.1285832260 Feb 08 06:08:16 PM UTC 25 Feb 08 06:08:58 PM UTC 25 3987756564 ps
T1600 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.3739737642 Feb 08 06:08:56 PM UTC 25 Feb 08 06:08:59 PM UTC 25 157607470 ps
T1601 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.1338608403 Feb 08 06:08:56 PM UTC 25 Feb 08 06:08:59 PM UTC 25 236463838 ps
T448 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3683221526 Feb 08 06:08:56 PM UTC 25 Feb 08 06:09:00 PM UTC 25 645523729 ps
T1602 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.1420142218 Feb 08 06:08:54 PM UTC 25 Feb 08 06:09:00 PM UTC 25 937987972 ps
T1603 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.1129960905 Feb 08 06:08:56 PM UTC 25 Feb 08 06:09:01 PM UTC 25 370228229 ps
T1604 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.2361144488 Feb 08 06:08:56 PM UTC 25 Feb 08 06:09:01 PM UTC 25 832300206 ps
T1605 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.881007329 Feb 08 06:07:24 PM UTC 25 Feb 08 06:09:02 PM UTC 25 13618098632 ps
T1606 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.473743604 Feb 08 06:09:00 PM UTC 25 Feb 08 06:09:02 PM UTC 25 140190374 ps
T1607 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.2789669541 Feb 08 06:09:00 PM UTC 25 Feb 08 06:09:02 PM UTC 25 194873200 ps
T1608 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3030529774 Feb 08 06:08:56 PM UTC 25 Feb 08 06:09:02 PM UTC 25 1013898410 ps
T1609 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.3571553001 Feb 08 06:09:00 PM UTC 25 Feb 08 06:09:03 PM UTC 25 260413837 ps
T1610 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.546398798 Feb 08 06:07:51 PM UTC 25 Feb 08 06:09:04 PM UTC 25 2375346082 ps
T1611 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.166791350 Feb 08 06:09:04 PM UTC 25 Feb 08 06:09:06 PM UTC 25 298102326 ps
T1612 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.1575357276 Feb 08 06:09:04 PM UTC 25 Feb 08 06:09:06 PM UTC 25 212162392 ps
T1613 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.1900870542 Feb 08 06:08:52 PM UTC 25 Feb 08 06:09:06 PM UTC 25 6890461870 ps
T1614 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.2554187725 Feb 08 06:09:04 PM UTC 25 Feb 08 06:09:07 PM UTC 25 222978675 ps
T1615 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.2591638592 Feb 08 06:08:54 PM UTC 25 Feb 08 06:09:07 PM UTC 25 1400232871 ps
T1616 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.3169693902 Feb 08 06:07:45 PM UTC 25 Feb 08 06:09:07 PM UTC 25 30109530335 ps
T1617 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.563015420 Feb 08 06:09:05 PM UTC 25 Feb 08 06:09:07 PM UTC 25 156847081 ps
T1618 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.205171010 Feb 08 06:08:09 PM UTC 25 Feb 08 06:09:08 PM UTC 25 33146690764 ps
T1619 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.1748814485 Feb 08 06:09:08 PM UTC 25 Feb 08 06:09:10 PM UTC 25 157473453 ps
T1620 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.3871524227 Feb 08 06:09:08 PM UTC 25 Feb 08 06:09:10 PM UTC 25 170061200 ps
T1621 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1312943043 Feb 08 06:09:07 PM UTC 25 Feb 08 06:09:10 PM UTC 25 170927102 ps
T1622 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.165157118 Feb 08 06:09:08 PM UTC 25 Feb 08 06:09:10 PM UTC 25 200734756 ps
T140 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.104291121 Feb 08 06:09:07 PM UTC 25 Feb 08 06:09:10 PM UTC 25 207858939 ps
T1623 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.2917252126 Feb 08 06:08:14 PM UTC 25 Feb 08 06:09:10 PM UTC 25 25646956513 ps
T1624 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.530127171 Feb 08 06:09:10 PM UTC 25 Feb 08 06:09:12 PM UTC 25 36942534 ps
T1625 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.698291312 Feb 08 06:09:10 PM UTC 25 Feb 08 06:09:12 PM UTC 25 157460886 ps
T1626 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.317639401 Feb 08 06:09:10 PM UTC 25 Feb 08 06:09:13 PM UTC 25 235333416 ps
T1627 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.2302822302 Feb 08 06:09:11 PM UTC 25 Feb 08 06:09:14 PM UTC 25 171619606 ps
T1628 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.3506128638 Feb 08 06:09:11 PM UTC 25 Feb 08 06:09:14 PM UTC 25 178873006 ps
T1629 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.1435153714 Feb 08 06:08:54 PM UTC 25 Feb 08 06:09:14 PM UTC 25 1524071909 ps
T1630 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.1655421240 Feb 08 06:09:11 PM UTC 25 Feb 08 06:09:14 PM UTC 25 145713200 ps
T1631 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.2057771493 Feb 08 06:09:11 PM UTC 25 Feb 08 06:09:14 PM UTC 25 205957986 ps
T1632 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2356089278 Feb 08 06:09:11 PM UTC 25 Feb 08 06:09:14 PM UTC 25 211541298 ps
T1633 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.3685846901 Feb 08 06:09:01 PM UTC 25 Feb 08 06:09:15 PM UTC 25 6044181805 ps
T1634 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.372486089 Feb 08 06:09:12 PM UTC 25 Feb 08 06:09:15 PM UTC 25 249264382 ps
T1635 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.3715555452 Feb 08 06:09:14 PM UTC 25 Feb 08 06:09:16 PM UTC 25 153382432 ps
T1636 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.1200462482 Feb 08 06:09:14 PM UTC 25 Feb 08 06:09:16 PM UTC 25 152285022 ps
T1637 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.183207716 Feb 08 06:08:23 PM UTC 25 Feb 08 06:09:16 PM UTC 25 15411649858 ps
T1638 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.1783080919 Feb 08 06:09:15 PM UTC 25 Feb 08 06:09:18 PM UTC 25 175741044 ps
T1639 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1115298190 Feb 08 06:08:52 PM UTC 25 Feb 08 06:09:18 PM UTC 25 14646610332 ps
T1640 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.4120104775 Feb 08 06:09:15 PM UTC 25 Feb 08 06:09:18 PM UTC 25 169880608 ps
T1641 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.2006584540 Feb 08 06:09:15 PM UTC 25 Feb 08 06:09:18 PM UTC 25 257421614 ps
T1642 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.47873831 Feb 08 06:09:18 PM UTC 25 Feb 08 06:09:20 PM UTC 25 49789900 ps
T1643 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.4226588282 Feb 08 06:08:31 PM UTC 25 Feb 08 06:09:20 PM UTC 25 30344537537 ps
T1644 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.759575023 Feb 08 06:09:16 PM UTC 25 Feb 08 06:09:21 PM UTC 25 549315522 ps
T1645 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.2804241980 Feb 08 06:09:19 PM UTC 25 Feb 08 06:09:22 PM UTC 25 151126920 ps
T1646 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.2021844548 Feb 08 06:09:19 PM UTC 25 Feb 08 06:09:22 PM UTC 25 153862711 ps
T1647 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2723754936 Feb 08 06:09:19 PM UTC 25 Feb 08 06:09:22 PM UTC 25 270906456 ps
T1648 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.3528127269 Feb 08 06:09:15 PM UTC 25 Feb 08 06:09:23 PM UTC 25 1271327105 ps
T1649 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.1346884199 Feb 08 06:09:20 PM UTC 25 Feb 08 06:09:24 PM UTC 25 587154855 ps
T1650 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3850710714 Feb 08 06:06:29 PM UTC 25 Feb 08 06:09:25 PM UTC 25 6084599092 ps
T1651 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_enable.4033254953 Feb 08 06:09:23 PM UTC 25 Feb 08 06:09:25 PM UTC 25 39246546 ps
T1652 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.2610474980 Feb 08 06:09:23 PM UTC 25 Feb 08 06:09:26 PM UTC 25 163936259 ps
T1653 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.615451197 Feb 08 06:09:23 PM UTC 25 Feb 08 06:09:27 PM UTC 25 490155570 ps
T471 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.3156412926 Feb 08 06:09:24 PM UTC 25 Feb 08 06:09:27 PM UTC 25 189420918 ps
T1654 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.118111474 Feb 08 06:08:54 PM UTC 25 Feb 08 06:09:27 PM UTC 25 17889474473 ps
T1655 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1035533313 Feb 08 06:09:23 PM UTC 25 Feb 08 06:09:29 PM UTC 25 907289320 ps
T1656 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.411493268 Feb 08 06:09:26 PM UTC 25 Feb 08 06:09:29 PM UTC 25 220861553 ps
T1657 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.2426762580 Feb 08 06:09:27 PM UTC 25 Feb 08 06:09:29 PM UTC 25 177964830 ps
T1658 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.1985191947 Feb 08 06:09:28 PM UTC 25 Feb 08 06:09:31 PM UTC 25 145297172 ps
T1659 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.1526069995 Feb 08 06:09:28 PM UTC 25 Feb 08 06:09:31 PM UTC 25 195015777 ps
T1660 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.2990823258 Feb 08 06:09:30 PM UTC 25 Feb 08 06:09:33 PM UTC 25 235136994 ps
T246 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.716934084 Feb 08 06:09:18 PM UTC 25 Feb 08 06:09:33 PM UTC 25 6317091742 ps
T1661 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1718883566 Feb 08 06:08:41 PM UTC 25 Feb 08 06:09:35 PM UTC 25 1671148029 ps
T1662 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.3560910532 Feb 08 06:09:32 PM UTC 25 Feb 08 06:09:35 PM UTC 25 310652130 ps
T1663 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.4086566550 Feb 08 06:09:33 PM UTC 25 Feb 08 06:09:36 PM UTC 25 233050170 ps
T1664 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.1307646256 Feb 08 06:09:15 PM UTC 25 Feb 08 06:09:38 PM UTC 25 1913566320 ps
T1665 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.4286739411 Feb 08 06:09:36 PM UTC 25 Feb 08 06:09:38 PM UTC 25 155693707 ps
T1666 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.2284992382 Feb 08 06:08:42 PM UTC 25 Feb 08 06:09:38 PM UTC 25 1715574901 ps
T1667 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.3884991687 Feb 08 06:08:38 PM UTC 25 Feb 08 06:09:39 PM UTC 25 9010105577 ps
T1668 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.2855998056 Feb 08 06:08:35 PM UTC 25 Feb 08 06:09:39 PM UTC 25 5689637894 ps
T1669 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.3443041123 Feb 08 06:09:37 PM UTC 25 Feb 08 06:09:40 PM UTC 25 295924881 ps
T1670 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.547537039 Feb 08 06:07:26 PM UTC 25 Feb 08 06:09:40 PM UTC 25 4179702030 ps
T1671 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2148340886 Feb 08 06:09:37 PM UTC 25 Feb 08 06:09:40 PM UTC 25 169427001 ps
T1672 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.2383378 Feb 08 06:07:37 PM UTC 25 Feb 08 06:09:41 PM UTC 25 3813458312 ps
T1673 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.879819830 Feb 08 06:09:02 PM UTC 25 Feb 08 06:09:42 PM UTC 25 3574640569 ps
T1674 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.4202194201 Feb 08 06:09:40 PM UTC 25 Feb 08 06:09:42 PM UTC 25 176332170 ps
T1675 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.2307419306 Feb 08 06:09:40 PM UTC 25 Feb 08 06:09:42 PM UTC 25 149339653 ps
T1676 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.3835284735 Feb 08 06:09:40 PM UTC 25 Feb 08 06:09:42 PM UTC 25 153593974 ps
T1677 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.1645266097 Feb 08 06:09:40 PM UTC 25 Feb 08 06:09:42 PM UTC 25 190427132 ps
T1678 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.2194046479 Feb 08 06:09:22 PM UTC 25 Feb 08 06:09:43 PM UTC 25 723451646 ps
T1679 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.2617331874 Feb 08 06:09:41 PM UTC 25 Feb 08 06:09:44 PM UTC 25 31862676 ps
T1680 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.4102961468 Feb 08 06:09:41 PM UTC 25 Feb 08 06:09:44 PM UTC 25 233399969 ps
T1681 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.627676680 Feb 08 06:09:41 PM UTC 25 Feb 08 06:09:44 PM UTC 25 210580525 ps
T1682 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.1005892202 Feb 08 06:09:41 PM UTC 25 Feb 08 06:09:44 PM UTC 25 290376708 ps
T1683 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.2074562599 Feb 08 06:09:43 PM UTC 25 Feb 08 06:09:45 PM UTC 25 214284924 ps
T1684 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.4065022681 Feb 08 06:09:43 PM UTC 25 Feb 08 06:09:45 PM UTC 25 143323468 ps
T1685 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.373367830 Feb 08 06:09:43 PM UTC 25 Feb 08 06:09:45 PM UTC 25 186314999 ps
T1686 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2211070718 Feb 08 06:09:43 PM UTC 25 Feb 08 06:09:46 PM UTC 25 226381016 ps
T1687 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3301705556 Feb 08 06:08:52 PM UTC 25 Feb 08 06:09:46 PM UTC 25 31243365536 ps
T1688 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.913072471 Feb 08 06:09:44 PM UTC 25 Feb 08 06:09:46 PM UTC 25 154533797 ps
T1689 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.4020070856 Feb 08 06:09:44 PM UTC 25 Feb 08 06:09:47 PM UTC 25 163218714 ps
T1690 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.262301826 Feb 08 06:09:44 PM UTC 25 Feb 08 06:09:47 PM UTC 25 366588411 ps
T1691 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2249786420 Feb 08 06:09:45 PM UTC 25 Feb 08 06:09:48 PM UTC 25 180319808 ps
T1692 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.4099808426 Feb 08 06:09:45 PM UTC 25 Feb 08 06:09:48 PM UTC 25 217357611 ps
T341 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.741365740 Feb 08 06:09:54 PM UTC 25 Feb 08 06:09:57 PM UTC 25 385362949 ps
T1693 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.75437142 Feb 08 06:09:47 PM UTC 25 Feb 08 06:09:49 PM UTC 25 174563626 ps
T1694 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.3908562857 Feb 08 06:09:47 PM UTC 25 Feb 08 06:09:49 PM UTC 25 52088376 ps
T1695 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2939946787 Feb 08 06:09:47 PM UTC 25 Feb 08 06:09:50 PM UTC 25 450063480 ps
T1696 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3223966329 Feb 08 06:08:33 PM UTC 25 Feb 08 06:09:51 PM UTC 25 35634265963 ps
T1697 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.419168093 Feb 08 06:09:47 PM UTC 25 Feb 08 06:09:51 PM UTC 25 701493975 ps
T1698 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.4125523317 Feb 08 06:09:50 PM UTC 25 Feb 08 06:09:52 PM UTC 25 145024305 ps
T1699 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.3399133444 Feb 08 06:08:47 PM UTC 25 Feb 08 06:09:52 PM UTC 25 15075096807 ps
T1700 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1018300731 Feb 08 06:09:50 PM UTC 25 Feb 08 06:09:52 PM UTC 25 227902427 ps
T1701 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.2151266280 Feb 08 06:09:30 PM UTC 25 Feb 08 06:09:52 PM UTC 25 10262746076 ps
T1702 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.2209330620 Feb 08 06:09:00 PM UTC 25 Feb 08 06:09:52 PM UTC 25 6635561192 ps
T1703 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.3795880642 Feb 08 06:08:39 PM UTC 25 Feb 08 06:09:53 PM UTC 25 33575087272 ps
T1704 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.2901456351 Feb 08 06:09:02 PM UTC 25 Feb 08 06:09:54 PM UTC 25 5033756719 ps
T1705 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.2907203531 Feb 08 06:09:51 PM UTC 25 Feb 08 06:09:54 PM UTC 25 326858712 ps
T1706 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.2693516686 Feb 08 06:08:42 PM UTC 25 Feb 08 06:09:54 PM UTC 25 2550131222 ps
T1707 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.1561220625 Feb 08 06:08:49 PM UTC 25 Feb 08 06:09:55 PM UTC 25 2175355532 ps
T1708 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.1247530138 Feb 08 06:09:51 PM UTC 25 Feb 08 06:09:55 PM UTC 25 502598021 ps
T1709 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.3271868880 Feb 08 06:08:14 PM UTC 25 Feb 08 06:09:56 PM UTC 25 14962097222 ps
T1710 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_enable.3577755101 Feb 08 06:09:54 PM UTC 25 Feb 08 06:09:56 PM UTC 25 58436895 ps
T1711 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.3610335315 Feb 08 06:09:53 PM UTC 25 Feb 08 06:09:56 PM UTC 25 145461832 ps
T1712 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.4227221687 Feb 08 06:09:53 PM UTC 25 Feb 08 06:09:58 PM UTC 25 797087551 ps
T1713 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.2230805748 Feb 08 06:09:55 PM UTC 25 Feb 08 06:09:58 PM UTC 25 144916053 ps
T1714 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.2580524806 Feb 08 06:09:30 PM UTC 25 Feb 08 06:09:58 PM UTC 25 3277221765 ps
T1715 /workspaces/repo/scratch/os_regression/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.2485103207 Feb 08 06:09:55 PM UTC 25 Feb 08 06:09:58 PM UTC 25 216275628 ps