Total Groups Coverage Summary 

COVERED	EXPECTED	SCORE	COVERED	EXPECTED	INST SCORE	WEIGHT
1992	2010	99.10	1992	2010	99.10	1

Total groups in report: 35

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NAME	COVERED	EXPECTED	SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING	COMMENT
spi_device_env_pkg::spi_device_env_cov::cfg_settings_cg	7	14	50.00		1	100	1	0	64	64
tl_agent_pkg::pending_req_on_rst_cg	1	2	50.00	50.00	1	100	1	1	64	64
spi_device_env_pkg::spi_device_env_cov::all_modes_cg	8	11	72.73		1	100	1	0	64	64
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg	14	15	93.33	93.33	1	100	1	1	64	64
cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=7}	60	62	96.77		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_cmd_info_cg	120	122	98.36		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg	144	146	98.63		1	100	1	0	64	64
alert_esc_agent_pkg::alert_handshake_complete_cg	3	3	100.00	100.00	1	100	1	1	64	64
cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=7}	44	44	100.00		1	100	1	0	64	64
cip_base_pkg::intr_pins_cg::SHAPE{(num_interrupts - 1)=7}	44	44	100.00		1	100	1	0	64	64
cip_base_pkg::tl_intg_err_cg_wrap::tl_intg_err_cg	14	14	100.00	100.00	1	100	1	1	64	64
cip_base_pkg::tl_intg_err_mem_subword_cg_wrap::tl_intg_err_mem_subword_cg	24	24	100.00	100.00	1	100	1	1	64	64
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg	4	4	100.00	100.00	1	100	1	1	64	64
tb.dut.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg	2	2	100.00	100.00	1	100	1	1	64	64
spi_device_env_pkg::spi_device_env_cov::en4b_flash_cmd_clash_with_addr_mode_write_cg	1	1	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::ex4b_flash_cmd_clash_with_addr_mode_write_cg	1	1	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_command_while_busy_set_cg	2	2	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg	6	6	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg	174	174	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_status_cg	88	88	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::flash_upload_payload_size_cg	17	17	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::passthrough_addr_swap_cg	146	146	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg	194	194	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg	73	73	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::spi_device_addr_4b_enter_exit_command_cg	8	8	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::spi_device_buffer_boundary_cg	8	8	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::spi_device_write_enable_disable_cg	8	8	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::sw_update_addr4b_cg	1	1	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::tpm_cfg_cg	530	530	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::tpm_interleave_with_flash_item_cg	2	2	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::tpm_sts_cg	41	41	100.00		1	100	1	0	64	64
spi_device_env_pkg::spi_device_env_cov::tpm_transfer_size_cg	32	32	100.00		1	100	1	0	64	64
spi_device_env_pkg::tpm_read_hw_reg_cg_wrap::tpm_read_hw_reg_cg	1	1	100.00	100.00	1	100	1	1	64	64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=1}	1	1	100.00	100.00	1	100	1	1	64	64
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}	137	137	100.00	100.00	1	100	1	1	64	64