TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Saturday February 08 2025 05:05:54 UTC

GitHub Revision: 9f20940d49

Branch: os_regression

Name	Passing	Total	Pass Rate	Coverage
TL_AGENT	50	50	100.00	--
ADC_CTRL	918	920	99.78	97.79
AES/UNMASKED	1536	1602	95.88	97.09
AES/MASKED	1564	1602	97.63	98.38
AON_TIMER	421	430	97.91	89.75
CSRNG	1617	1630	99.20	97.35
EDN	1130	1130	100.00	95.61
ENTROPY_SRC	2493	2570	97.00	97.15
GPIO	939	970	96.80	99.63
HMAC	660	660	100.00	98.03
I2C	1856	2042	90.89	91.27
KEYMGR	1082	1110	97.48	97.78
KMAC/MASKED	1233	1250	98.64	94.15
KMAC/UNMASKED	1235	1250	98.80	91.78
LC_CTRL/VOLATILE_UNLOCK_DISABLED	1004	1030	97.48	97.16
LC_CTRL/VOLATILE_UNLOCK_ENABLED	1012	1030	98.25	97.24
OTBN	575	585	98.29	98.92
OTP_CTRL	1318	1343	98.14	94.89
PATTGEN	529	570	92.81	98.88
PRIM_ALERT	79	80	98.75	94.60
PRIM_ESC	20	20	100.00	92.29
PRIM_LFSR	200	200	100.00	98.31
PRIM_PRESENT	50	50	100.00	97.83
PRIM_PRINCE	500	500	100.00	100.00
PWM	417	420	99.29	98.66
ROM_CTRL/32KB	427	460	92.83	97.22
ROM_CTRL/64KB	424	460	92.17	97.28
RV_DM	467	468	99.79	82.47
RV_TIMER	578	620	93.23	99.61
SPI_HOST	829	840	98.69	91.02
SPI_DEVICE/1R1W	1131	1151	98.26	96.04
SPI_DEVICE/2P	1151	1151	100.00	96.07
SRAM_CTRL/MAIN	1034	1040	99.42	98.00
SRAM_CTRL/RET	1024	1040	98.46	97.98
SYSRST_CTRL	919	932	98.61	98.33
UART	1315	1320	99.62	99.11
USBDEV	3732	3800	98.21	95.44
ALERT_HANDLER	827	850	97.29	99.25
CLKMGR	1010	1010	100.00	98.52
FLASH_CTRL	1273	1281	99.38	96.03
PWRMGR	1119	1120	99.91	97.95
RSTMGR_CNSTY_CHK	10	10	100.00	95.87
RSTMGR	620	620	100.00	99.44
XBAR_MAIN	900	900	100.00	97.02
XBAR_PERI	900	900	100.00	99.24
CHIP	2930	2956	99.12	95.96